1 /* 2 * tegra_pcm.c - Tegra PCM driver 3 * 4 * Author: Stephen Warren <swarren@nvidia.com> 5 * Copyright (C) 2010,2012 - NVIDIA, Inc. 6 * 7 * Based on code copyright/by: 8 * 9 * Copyright (c) 2009-2010, NVIDIA Corporation. 10 * Scott Peterson <speterson@nvidia.com> 11 * Vijay Mali <vmali@nvidia.com> 12 * 13 * Copyright (C) 2010 Google, Inc. 14 * Iliyan Malchev <malchev@google.com> 15 * 16 * This program is free software; you can redistribute it and/or 17 * modify it under the terms of the GNU General Public License 18 * version 2 as published by the Free Software Foundation. 19 * 20 * This program is distributed in the hope that it will be useful, but 21 * WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 23 * General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 28 * 02110-1301 USA 29 * 30 */ 31 32 #include <linux/dma-mapping.h> 33 #include <linux/module.h> 34 #include <linux/slab.h> 35 #include <sound/core.h> 36 #include <sound/pcm.h> 37 #include <sound/pcm_params.h> 38 #include <sound/soc.h> 39 #include <sound/dmaengine_pcm.h> 40 41 #include "tegra_pcm.h" 42 43 static const struct snd_pcm_hardware tegra_pcm_hardware = { 44 .info = SNDRV_PCM_INFO_MMAP | 45 SNDRV_PCM_INFO_MMAP_VALID | 46 SNDRV_PCM_INFO_PAUSE | 47 SNDRV_PCM_INFO_RESUME | 48 SNDRV_PCM_INFO_INTERLEAVED, 49 .formats = SNDRV_PCM_FMTBIT_S16_LE, 50 .channels_min = 2, 51 .channels_max = 2, 52 .period_bytes_min = 1024, 53 .period_bytes_max = PAGE_SIZE, 54 .periods_min = 2, 55 .periods_max = 8, 56 .buffer_bytes_max = PAGE_SIZE * 8, 57 .fifo_size = 4, 58 }; 59 60 static int tegra_pcm_open(struct snd_pcm_substream *substream) 61 { 62 struct snd_soc_pcm_runtime *rtd = substream->private_data; 63 struct device *dev = rtd->platform->dev; 64 int ret; 65 66 /* Set HW params now that initialization is complete */ 67 snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware); 68 69 ret = snd_dmaengine_pcm_open(substream, NULL, NULL); 70 if (ret) { 71 dev_err(dev, "dmaengine pcm open failed with err %d\n", ret); 72 return ret; 73 } 74 75 return 0; 76 } 77 78 static int tegra_pcm_close(struct snd_pcm_substream *substream) 79 { 80 snd_dmaengine_pcm_close(substream); 81 return 0; 82 } 83 84 static int tegra_pcm_hw_params(struct snd_pcm_substream *substream, 85 struct snd_pcm_hw_params *params) 86 { 87 struct snd_soc_pcm_runtime *rtd = substream->private_data; 88 struct device *dev = rtd->platform->dev; 89 struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream); 90 struct tegra_pcm_dma_params *dmap; 91 struct dma_slave_config slave_config; 92 int ret; 93 94 dmap = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); 95 96 ret = snd_hwparams_to_dma_slave_config(substream, params, 97 &slave_config); 98 if (ret) { 99 dev_err(dev, "hw params config failed with err %d\n", ret); 100 return ret; 101 } 102 103 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { 104 slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 105 slave_config.dst_addr = dmap->addr; 106 slave_config.dst_maxburst = 4; 107 } else { 108 slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 109 slave_config.src_addr = dmap->addr; 110 slave_config.src_maxburst = 4; 111 } 112 slave_config.slave_id = dmap->req_sel; 113 114 ret = dmaengine_slave_config(chan, &slave_config); 115 if (ret < 0) { 116 dev_err(dev, "dma slave config failed with err %d\n", ret); 117 return ret; 118 } 119 120 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); 121 return 0; 122 } 123 124 static int tegra_pcm_hw_free(struct snd_pcm_substream *substream) 125 { 126 snd_pcm_set_runtime_buffer(substream, NULL); 127 return 0; 128 } 129 130 static int tegra_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 131 { 132 switch (cmd) { 133 case SNDRV_PCM_TRIGGER_START: 134 case SNDRV_PCM_TRIGGER_RESUME: 135 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 136 return snd_dmaengine_pcm_trigger(substream, 137 SNDRV_PCM_TRIGGER_START); 138 139 case SNDRV_PCM_TRIGGER_STOP: 140 case SNDRV_PCM_TRIGGER_SUSPEND: 141 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 142 return snd_dmaengine_pcm_trigger(substream, 143 SNDRV_PCM_TRIGGER_STOP); 144 default: 145 return -EINVAL; 146 } 147 return 0; 148 } 149 150 static int tegra_pcm_mmap(struct snd_pcm_substream *substream, 151 struct vm_area_struct *vma) 152 { 153 struct snd_pcm_runtime *runtime = substream->runtime; 154 155 return dma_mmap_writecombine(substream->pcm->card->dev, vma, 156 runtime->dma_area, 157 runtime->dma_addr, 158 runtime->dma_bytes); 159 } 160 161 static struct snd_pcm_ops tegra_pcm_ops = { 162 .open = tegra_pcm_open, 163 .close = tegra_pcm_close, 164 .ioctl = snd_pcm_lib_ioctl, 165 .hw_params = tegra_pcm_hw_params, 166 .hw_free = tegra_pcm_hw_free, 167 .trigger = tegra_pcm_trigger, 168 .pointer = snd_dmaengine_pcm_pointer, 169 .mmap = tegra_pcm_mmap, 170 }; 171 172 static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) 173 { 174 struct snd_pcm_substream *substream = pcm->streams[stream].substream; 175 struct snd_dma_buffer *buf = &substream->dma_buffer; 176 size_t size = tegra_pcm_hardware.buffer_bytes_max; 177 178 buf->area = dma_alloc_writecombine(pcm->card->dev, size, 179 &buf->addr, GFP_KERNEL); 180 if (!buf->area) 181 return -ENOMEM; 182 183 buf->dev.type = SNDRV_DMA_TYPE_DEV; 184 buf->dev.dev = pcm->card->dev; 185 buf->private_data = NULL; 186 buf->bytes = size; 187 188 return 0; 189 } 190 191 static void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream) 192 { 193 struct snd_pcm_substream *substream; 194 struct snd_dma_buffer *buf; 195 196 substream = pcm->streams[stream].substream; 197 if (!substream) 198 return; 199 200 buf = &substream->dma_buffer; 201 if (!buf->area) 202 return; 203 204 dma_free_writecombine(pcm->card->dev, buf->bytes, 205 buf->area, buf->addr); 206 buf->area = NULL; 207 } 208 209 static u64 tegra_dma_mask = DMA_BIT_MASK(32); 210 211 static int tegra_pcm_new(struct snd_soc_pcm_runtime *rtd) 212 { 213 struct snd_card *card = rtd->card->snd_card; 214 struct snd_pcm *pcm = rtd->pcm; 215 int ret = 0; 216 217 if (!card->dev->dma_mask) 218 card->dev->dma_mask = &tegra_dma_mask; 219 if (!card->dev->coherent_dma_mask) 220 card->dev->coherent_dma_mask = DMA_BIT_MASK(32); 221 222 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { 223 ret = tegra_pcm_preallocate_dma_buffer(pcm, 224 SNDRV_PCM_STREAM_PLAYBACK); 225 if (ret) 226 goto err; 227 } 228 229 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { 230 ret = tegra_pcm_preallocate_dma_buffer(pcm, 231 SNDRV_PCM_STREAM_CAPTURE); 232 if (ret) 233 goto err_free_play; 234 } 235 236 return 0; 237 238 err_free_play: 239 tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK); 240 err: 241 return ret; 242 } 243 244 static void tegra_pcm_free(struct snd_pcm *pcm) 245 { 246 tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE); 247 tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK); 248 } 249 250 static struct snd_soc_platform_driver tegra_pcm_platform = { 251 .ops = &tegra_pcm_ops, 252 .pcm_new = tegra_pcm_new, 253 .pcm_free = tegra_pcm_free, 254 }; 255 256 int __devinit tegra_pcm_platform_register(struct device *dev) 257 { 258 return snd_soc_register_platform(dev, &tegra_pcm_platform); 259 } 260 EXPORT_SYMBOL_GPL(tegra_pcm_platform_register); 261 262 void __devexit tegra_pcm_platform_unregister(struct device *dev) 263 { 264 snd_soc_unregister_platform(dev); 265 } 266 EXPORT_SYMBOL_GPL(tegra_pcm_platform_unregister); 267 268 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>"); 269 MODULE_DESCRIPTION("Tegra PCM ASoC driver"); 270 MODULE_LICENSE("GPL"); 271