1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STM32 ALSA SoC Digital Audio Interface (SAI) driver. 4 * 5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved 6 * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics. 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/module.h> 13 #include <linux/of_platform.h> 14 #include <linux/pinctrl/consumer.h> 15 #include <linux/reset.h> 16 17 #include <sound/dmaengine_pcm.h> 18 #include <sound/core.h> 19 20 #include "stm32_sai.h" 21 22 static const struct stm32_sai_conf stm32_sai_conf_f4 = { 23 .version = SAI_STM32F4, 24 .has_spdif = false, 25 }; 26 27 static const struct stm32_sai_conf stm32_sai_conf_h7 = { 28 .version = SAI_STM32H7, 29 .has_spdif = true, 30 }; 31 32 static const struct of_device_id stm32_sai_ids[] = { 33 { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 }, 34 { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 }, 35 {} 36 }; 37 38 static int stm32_sai_pclk_disable(struct device *dev) 39 { 40 struct stm32_sai_data *sai = dev_get_drvdata(dev); 41 42 clk_disable_unprepare(sai->pclk); 43 44 return 0; 45 } 46 47 static int stm32_sai_pclk_enable(struct device *dev) 48 { 49 struct stm32_sai_data *sai = dev_get_drvdata(dev); 50 int ret; 51 52 ret = clk_prepare_enable(sai->pclk); 53 if (ret) { 54 dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret); 55 return ret; 56 } 57 58 return 0; 59 } 60 61 static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci) 62 { 63 int ret; 64 65 /* Enable peripheral clock to allow GCR register access */ 66 ret = stm32_sai_pclk_enable(&sai->pdev->dev); 67 if (ret) 68 return ret; 69 70 writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base); 71 72 stm32_sai_pclk_disable(&sai->pdev->dev); 73 74 return 0; 75 } 76 77 static int stm32_sai_sync_conf_provider(struct stm32_sai_data *sai, int synco) 78 { 79 u32 prev_synco; 80 int ret; 81 82 /* Enable peripheral clock to allow GCR register access */ 83 ret = stm32_sai_pclk_enable(&sai->pdev->dev); 84 if (ret) 85 return ret; 86 87 dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n", 88 sai->pdev->dev.of_node, 89 synco == STM_SAI_SYNC_OUT_A ? "A" : "B"); 90 91 prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base)); 92 if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) { 93 dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n", 94 sai->pdev->dev.of_node, 95 prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B"); 96 stm32_sai_pclk_disable(&sai->pdev->dev); 97 return -EINVAL; 98 } 99 100 writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base); 101 102 stm32_sai_pclk_disable(&sai->pdev->dev); 103 104 return 0; 105 } 106 107 static int stm32_sai_set_sync(struct stm32_sai_data *sai_client, 108 struct device_node *np_provider, 109 int synco, int synci) 110 { 111 struct platform_device *pdev = of_find_device_by_node(np_provider); 112 struct stm32_sai_data *sai_provider; 113 int ret; 114 115 if (!pdev) { 116 dev_err(&sai_client->pdev->dev, 117 "Device not found for node %pOFn\n", np_provider); 118 of_node_put(np_provider); 119 return -ENODEV; 120 } 121 122 sai_provider = platform_get_drvdata(pdev); 123 if (!sai_provider) { 124 dev_err(&sai_client->pdev->dev, 125 "SAI sync provider data not found\n"); 126 ret = -EINVAL; 127 goto error; 128 } 129 130 /* Configure sync client */ 131 ret = stm32_sai_sync_conf_client(sai_client, synci); 132 if (ret < 0) 133 goto error; 134 135 /* Configure sync provider */ 136 ret = stm32_sai_sync_conf_provider(sai_provider, synco); 137 138 error: 139 put_device(&pdev->dev); 140 of_node_put(np_provider); 141 return ret; 142 } 143 144 static int stm32_sai_probe(struct platform_device *pdev) 145 { 146 struct stm32_sai_data *sai; 147 struct reset_control *rst; 148 struct resource *res; 149 const struct of_device_id *of_id; 150 151 sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL); 152 if (!sai) 153 return -ENOMEM; 154 155 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 156 sai->base = devm_ioremap_resource(&pdev->dev, res); 157 if (IS_ERR(sai->base)) 158 return PTR_ERR(sai->base); 159 160 of_id = of_match_device(stm32_sai_ids, &pdev->dev); 161 if (of_id) 162 sai->conf = (struct stm32_sai_conf *)of_id->data; 163 else 164 return -EINVAL; 165 166 if (!STM_SAI_IS_F4(sai)) { 167 sai->pclk = devm_clk_get(&pdev->dev, "pclk"); 168 if (IS_ERR(sai->pclk)) { 169 dev_err(&pdev->dev, "missing bus clock pclk\n"); 170 return PTR_ERR(sai->pclk); 171 } 172 } 173 174 sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k"); 175 if (IS_ERR(sai->clk_x8k)) { 176 dev_err(&pdev->dev, "missing x8k parent clock\n"); 177 return PTR_ERR(sai->clk_x8k); 178 } 179 180 sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k"); 181 if (IS_ERR(sai->clk_x11k)) { 182 dev_err(&pdev->dev, "missing x11k parent clock\n"); 183 return PTR_ERR(sai->clk_x11k); 184 } 185 186 /* init irqs */ 187 sai->irq = platform_get_irq(pdev, 0); 188 if (sai->irq < 0) { 189 dev_err(&pdev->dev, "no irq for node %s\n", pdev->name); 190 return sai->irq; 191 } 192 193 /* reset */ 194 rst = devm_reset_control_get_exclusive(&pdev->dev, NULL); 195 if (!IS_ERR(rst)) { 196 reset_control_assert(rst); 197 udelay(2); 198 reset_control_deassert(rst); 199 } 200 201 sai->pdev = pdev; 202 sai->set_sync = &stm32_sai_set_sync; 203 platform_set_drvdata(pdev, sai); 204 205 return devm_of_platform_populate(&pdev->dev); 206 } 207 208 #ifdef CONFIG_PM_SLEEP 209 /* 210 * When pins are shared by two sai sub instances, pins have to be defined 211 * in sai parent node. In this case, pins state is not managed by alsa fw. 212 * These pins are managed in suspend/resume callbacks. 213 */ 214 static int stm32_sai_suspend(struct device *dev) 215 { 216 struct stm32_sai_data *sai = dev_get_drvdata(dev); 217 int ret; 218 219 ret = stm32_sai_pclk_enable(dev); 220 if (ret) 221 return ret; 222 223 sai->gcr = readl_relaxed(sai->base); 224 stm32_sai_pclk_disable(dev); 225 226 return pinctrl_pm_select_sleep_state(dev); 227 } 228 229 static int stm32_sai_resume(struct device *dev) 230 { 231 struct stm32_sai_data *sai = dev_get_drvdata(dev); 232 int ret; 233 234 ret = stm32_sai_pclk_enable(dev); 235 if (ret) 236 return ret; 237 238 writel_relaxed(sai->gcr, sai->base); 239 stm32_sai_pclk_disable(dev); 240 241 return pinctrl_pm_select_default_state(dev); 242 } 243 #endif /* CONFIG_PM_SLEEP */ 244 245 static const struct dev_pm_ops stm32_sai_pm_ops = { 246 SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_suspend, stm32_sai_resume) 247 }; 248 249 MODULE_DEVICE_TABLE(of, stm32_sai_ids); 250 251 static struct platform_driver stm32_sai_driver = { 252 .driver = { 253 .name = "st,stm32-sai", 254 .of_match_table = stm32_sai_ids, 255 .pm = &stm32_sai_pm_ops, 256 }, 257 .probe = stm32_sai_probe, 258 }; 259 260 module_platform_driver(stm32_sai_driver); 261 262 MODULE_DESCRIPTION("STM32 Soc SAI Interface"); 263 MODULE_AUTHOR("Olivier Moysan <olivier.moysan@st.com>"); 264 MODULE_ALIAS("platform:st,stm32-sai"); 265 MODULE_LICENSE("GPL v2"); 266