1 /* 2 * wm8523.c -- WM8523 ALSA SoC Audio driver 3 * 4 * Copyright 2009 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/pm.h> 19 #include <linux/i2c.h> 20 #include <linux/platform_device.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/slab.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/initval.h> 28 #include <sound/tlv.h> 29 30 #include "wm8523.h" 31 32 #define WM8523_NUM_SUPPLIES 2 33 static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = { 34 "AVDD", 35 "LINEVDD", 36 }; 37 38 #define WM8523_NUM_RATES 7 39 40 /* codec private data */ 41 struct wm8523_priv { 42 enum snd_soc_control_type control_type; 43 struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES]; 44 unsigned int sysclk; 45 unsigned int rate_constraint_list[WM8523_NUM_RATES]; 46 struct snd_pcm_hw_constraint_list rate_constraint; 47 }; 48 49 static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = { 50 0x8523, /* R0 - DEVICE_ID */ 51 0x0001, /* R1 - REVISION */ 52 0x0000, /* R2 - PSCTRL1 */ 53 0x1812, /* R3 - AIF_CTRL1 */ 54 0x0000, /* R4 - AIF_CTRL2 */ 55 0x0001, /* R5 - DAC_CTRL3 */ 56 0x0190, /* R6 - DAC_GAINL */ 57 0x0190, /* R7 - DAC_GAINR */ 58 0x0000, /* R8 - ZERO_DETECT */ 59 }; 60 61 static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg) 62 { 63 switch (reg) { 64 case WM8523_DEVICE_ID: 65 case WM8523_REVISION: 66 return 1; 67 default: 68 return 0; 69 } 70 } 71 72 static int wm8523_reset(struct snd_soc_codec *codec) 73 { 74 return snd_soc_write(codec, WM8523_DEVICE_ID, 0); 75 } 76 77 static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0); 78 79 static const char *wm8523_zd_count_text[] = { 80 "1024", 81 "2048", 82 }; 83 84 static const struct soc_enum wm8523_zc_count = 85 SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text); 86 87 static const struct snd_kcontrol_new wm8523_snd_controls[] = { 88 SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR, 89 0, 448, 0, dac_tlv), 90 SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0), 91 SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0), 92 SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1), 93 SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0), 94 SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0), 95 SOC_ENUM("Zero Detect Count", wm8523_zc_count), 96 }; 97 98 static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = { 99 SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0), 100 SND_SOC_DAPM_OUTPUT("LINEVOUTL"), 101 SND_SOC_DAPM_OUTPUT("LINEVOUTR"), 102 }; 103 104 static const struct snd_soc_dapm_route intercon[] = { 105 { "LINEVOUTL", NULL, "DAC" }, 106 { "LINEVOUTR", NULL, "DAC" }, 107 }; 108 109 static int wm8523_add_widgets(struct snd_soc_codec *codec) 110 { 111 struct snd_soc_dapm_context *dapm = &codec->dapm; 112 113 snd_soc_dapm_new_controls(dapm, wm8523_dapm_widgets, 114 ARRAY_SIZE(wm8523_dapm_widgets)); 115 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); 116 117 return 0; 118 } 119 120 static struct { 121 int value; 122 int ratio; 123 } lrclk_ratios[WM8523_NUM_RATES] = { 124 { 1, 128 }, 125 { 2, 192 }, 126 { 3, 256 }, 127 { 4, 384 }, 128 { 5, 512 }, 129 { 6, 768 }, 130 { 7, 1152 }, 131 }; 132 133 static int wm8523_startup(struct snd_pcm_substream *substream, 134 struct snd_soc_dai *dai) 135 { 136 struct snd_soc_codec *codec = dai->codec; 137 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 138 139 /* The set of sample rates that can be supported depends on the 140 * MCLK supplied to the CODEC - enforce this. 141 */ 142 if (!wm8523->sysclk) { 143 dev_err(codec->dev, 144 "No MCLK configured, call set_sysclk() on init\n"); 145 return -EINVAL; 146 } 147 148 snd_pcm_hw_constraint_list(substream->runtime, 0, 149 SNDRV_PCM_HW_PARAM_RATE, 150 &wm8523->rate_constraint); 151 152 return 0; 153 } 154 155 static int wm8523_hw_params(struct snd_pcm_substream *substream, 156 struct snd_pcm_hw_params *params, 157 struct snd_soc_dai *dai) 158 { 159 struct snd_soc_pcm_runtime *rtd = substream->private_data; 160 struct snd_soc_codec *codec = rtd->codec; 161 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 162 int i; 163 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); 164 u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2); 165 166 /* Find a supported LRCLK ratio */ 167 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { 168 if (wm8523->sysclk / params_rate(params) == 169 lrclk_ratios[i].ratio) 170 break; 171 } 172 173 /* Should never happen, should be handled by constraints */ 174 if (i == ARRAY_SIZE(lrclk_ratios)) { 175 dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n", 176 wm8523->sysclk / params_rate(params)); 177 return -EINVAL; 178 } 179 180 aifctrl2 &= ~WM8523_SR_MASK; 181 aifctrl2 |= lrclk_ratios[i].value; 182 183 aifctrl1 &= ~WM8523_WL_MASK; 184 switch (params_format(params)) { 185 case SNDRV_PCM_FORMAT_S16_LE: 186 break; 187 case SNDRV_PCM_FORMAT_S20_3LE: 188 aifctrl1 |= 0x8; 189 break; 190 case SNDRV_PCM_FORMAT_S24_LE: 191 aifctrl1 |= 0x10; 192 break; 193 case SNDRV_PCM_FORMAT_S32_LE: 194 aifctrl1 |= 0x18; 195 break; 196 } 197 198 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); 199 snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2); 200 201 return 0; 202 } 203 204 static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai, 205 int clk_id, unsigned int freq, int dir) 206 { 207 struct snd_soc_codec *codec = codec_dai->codec; 208 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 209 unsigned int val; 210 int i; 211 212 wm8523->sysclk = freq; 213 214 wm8523->rate_constraint.count = 0; 215 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) { 216 val = freq / lrclk_ratios[i].ratio; 217 /* Check that it's a standard rate since core can't 218 * cope with others and having the odd rates confuses 219 * constraint matching. 220 */ 221 switch (val) { 222 case 8000: 223 case 11025: 224 case 16000: 225 case 22050: 226 case 32000: 227 case 44100: 228 case 48000: 229 case 64000: 230 case 88200: 231 case 96000: 232 case 176400: 233 case 192000: 234 dev_dbg(codec->dev, "Supported sample rate: %dHz\n", 235 val); 236 wm8523->rate_constraint_list[i] = val; 237 wm8523->rate_constraint.count++; 238 break; 239 default: 240 dev_dbg(codec->dev, "Skipping sample rate: %dHz\n", 241 val); 242 } 243 } 244 245 /* Need at least one supported rate... */ 246 if (wm8523->rate_constraint.count == 0) 247 return -EINVAL; 248 249 return 0; 250 } 251 252 253 static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai, 254 unsigned int fmt) 255 { 256 struct snd_soc_codec *codec = codec_dai->codec; 257 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1); 258 259 aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK | 260 WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK); 261 262 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 263 case SND_SOC_DAIFMT_CBM_CFM: 264 aifctrl1 |= WM8523_AIF_MSTR; 265 break; 266 case SND_SOC_DAIFMT_CBS_CFS: 267 break; 268 default: 269 return -EINVAL; 270 } 271 272 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 273 case SND_SOC_DAIFMT_I2S: 274 aifctrl1 |= 0x0002; 275 break; 276 case SND_SOC_DAIFMT_RIGHT_J: 277 break; 278 case SND_SOC_DAIFMT_LEFT_J: 279 aifctrl1 |= 0x0001; 280 break; 281 case SND_SOC_DAIFMT_DSP_A: 282 aifctrl1 |= 0x0003; 283 break; 284 case SND_SOC_DAIFMT_DSP_B: 285 aifctrl1 |= 0x0023; 286 break; 287 default: 288 return -EINVAL; 289 } 290 291 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 292 case SND_SOC_DAIFMT_NB_NF: 293 break; 294 case SND_SOC_DAIFMT_IB_IF: 295 aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV; 296 break; 297 case SND_SOC_DAIFMT_IB_NF: 298 aifctrl1 |= WM8523_BCLK_INV; 299 break; 300 case SND_SOC_DAIFMT_NB_IF: 301 aifctrl1 |= WM8523_LRCLK_INV; 302 break; 303 default: 304 return -EINVAL; 305 } 306 307 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1); 308 309 return 0; 310 } 311 312 static int wm8523_set_bias_level(struct snd_soc_codec *codec, 313 enum snd_soc_bias_level level) 314 { 315 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 316 u16 *reg_cache = codec->reg_cache; 317 int ret, i; 318 319 switch (level) { 320 case SND_SOC_BIAS_ON: 321 break; 322 323 case SND_SOC_BIAS_PREPARE: 324 /* Full power on */ 325 snd_soc_update_bits(codec, WM8523_PSCTRL1, 326 WM8523_SYS_ENA_MASK, 3); 327 break; 328 329 case SND_SOC_BIAS_STANDBY: 330 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 331 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), 332 wm8523->supplies); 333 if (ret != 0) { 334 dev_err(codec->dev, 335 "Failed to enable supplies: %d\n", 336 ret); 337 return ret; 338 } 339 340 /* Initial power up */ 341 snd_soc_update_bits(codec, WM8523_PSCTRL1, 342 WM8523_SYS_ENA_MASK, 1); 343 344 /* Sync back default/cached values */ 345 for (i = WM8523_AIF_CTRL1; 346 i < WM8523_MAX_REGISTER; i++) 347 snd_soc_write(codec, i, reg_cache[i]); 348 349 350 msleep(100); 351 } 352 353 /* Power up to mute */ 354 snd_soc_update_bits(codec, WM8523_PSCTRL1, 355 WM8523_SYS_ENA_MASK, 2); 356 357 break; 358 359 case SND_SOC_BIAS_OFF: 360 /* The chip runs through the power down sequence for us. */ 361 snd_soc_update_bits(codec, WM8523_PSCTRL1, 362 WM8523_SYS_ENA_MASK, 0); 363 msleep(100); 364 365 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), 366 wm8523->supplies); 367 break; 368 } 369 codec->dapm.bias_level = level; 370 return 0; 371 } 372 373 #define WM8523_RATES SNDRV_PCM_RATE_8000_192000 374 375 #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 376 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 377 378 static struct snd_soc_dai_ops wm8523_dai_ops = { 379 .startup = wm8523_startup, 380 .hw_params = wm8523_hw_params, 381 .set_sysclk = wm8523_set_dai_sysclk, 382 .set_fmt = wm8523_set_dai_fmt, 383 }; 384 385 static struct snd_soc_dai_driver wm8523_dai = { 386 .name = "wm8523-hifi", 387 .playback = { 388 .stream_name = "Playback", 389 .channels_min = 2, /* Mono modes not yet supported */ 390 .channels_max = 2, 391 .rates = WM8523_RATES, 392 .formats = WM8523_FORMATS, 393 }, 394 .ops = &wm8523_dai_ops, 395 }; 396 397 #ifdef CONFIG_PM 398 static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state) 399 { 400 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF); 401 return 0; 402 } 403 404 static int wm8523_resume(struct snd_soc_codec *codec) 405 { 406 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 407 return 0; 408 } 409 #else 410 #define wm8523_suspend NULL 411 #define wm8523_resume NULL 412 #endif 413 414 static int wm8523_probe(struct snd_soc_codec *codec) 415 { 416 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 417 int ret, i; 418 419 codec->hw_write = (hw_write_t)i2c_master_send; 420 wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0]; 421 wm8523->rate_constraint.count = 422 ARRAY_SIZE(wm8523->rate_constraint_list); 423 424 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type); 425 if (ret != 0) { 426 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 427 return ret; 428 } 429 430 for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++) 431 wm8523->supplies[i].supply = wm8523_supply_names[i]; 432 433 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies), 434 wm8523->supplies); 435 if (ret != 0) { 436 dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 437 return ret; 438 } 439 440 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies), 441 wm8523->supplies); 442 if (ret != 0) { 443 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 444 goto err_get; 445 } 446 447 ret = snd_soc_read(codec, WM8523_DEVICE_ID); 448 if (ret < 0) { 449 dev_err(codec->dev, "Failed to read ID register\n"); 450 goto err_enable; 451 } 452 if (ret != wm8523_reg[WM8523_DEVICE_ID]) { 453 dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret); 454 ret = -EINVAL; 455 goto err_enable; 456 } 457 458 ret = snd_soc_read(codec, WM8523_REVISION); 459 if (ret < 0) { 460 dev_err(codec->dev, "Failed to read revision register\n"); 461 goto err_enable; 462 } 463 dev_info(codec->dev, "revision %c\n", 464 (ret & WM8523_CHIP_REV_MASK) + 'A'); 465 466 ret = wm8523_reset(codec); 467 if (ret < 0) { 468 dev_err(codec->dev, "Failed to issue reset\n"); 469 goto err_enable; 470 } 471 472 /* Change some default settings - latch VU and enable ZC */ 473 snd_soc_update_bits(codec, WM8523_DAC_GAINR, 474 WM8523_DACR_VU, WM8523_DACR_VU); 475 snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC); 476 477 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 478 479 /* Bias level configuration will have done an extra enable */ 480 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); 481 482 snd_soc_add_controls(codec, wm8523_snd_controls, 483 ARRAY_SIZE(wm8523_snd_controls)); 484 wm8523_add_widgets(codec); 485 486 return 0; 487 488 err_enable: 489 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); 490 err_get: 491 regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); 492 493 return ret; 494 } 495 496 static int wm8523_remove(struct snd_soc_codec *codec) 497 { 498 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec); 499 500 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF); 501 regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies); 502 return 0; 503 } 504 505 static struct snd_soc_codec_driver soc_codec_dev_wm8523 = { 506 .probe = wm8523_probe, 507 .remove = wm8523_remove, 508 .suspend = wm8523_suspend, 509 .resume = wm8523_resume, 510 .set_bias_level = wm8523_set_bias_level, 511 .reg_cache_size = WM8523_REGISTER_COUNT, 512 .reg_word_size = sizeof(u16), 513 .reg_cache_default = wm8523_reg, 514 .volatile_register = wm8523_volatile_register, 515 }; 516 517 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 518 static __devinit int wm8523_i2c_probe(struct i2c_client *i2c, 519 const struct i2c_device_id *id) 520 { 521 struct wm8523_priv *wm8523; 522 int ret; 523 524 wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL); 525 if (wm8523 == NULL) 526 return -ENOMEM; 527 528 i2c_set_clientdata(i2c, wm8523); 529 wm8523->control_type = SND_SOC_I2C; 530 531 ret = snd_soc_register_codec(&i2c->dev, 532 &soc_codec_dev_wm8523, &wm8523_dai, 1); 533 if (ret < 0) 534 kfree(wm8523); 535 return ret; 536 537 } 538 539 static __devexit int wm8523_i2c_remove(struct i2c_client *client) 540 { 541 snd_soc_unregister_codec(&client->dev); 542 kfree(i2c_get_clientdata(client)); 543 return 0; 544 } 545 546 static const struct i2c_device_id wm8523_i2c_id[] = { 547 { "wm8523", 0 }, 548 { } 549 }; 550 MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id); 551 552 static struct i2c_driver wm8523_i2c_driver = { 553 .driver = { 554 .name = "wm8523-codec", 555 .owner = THIS_MODULE, 556 }, 557 .probe = wm8523_i2c_probe, 558 .remove = __devexit_p(wm8523_i2c_remove), 559 .id_table = wm8523_i2c_id, 560 }; 561 #endif 562 563 static int __init wm8523_modinit(void) 564 { 565 int ret; 566 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 567 ret = i2c_add_driver(&wm8523_i2c_driver); 568 if (ret != 0) { 569 printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n", 570 ret); 571 } 572 #endif 573 return 0; 574 } 575 module_init(wm8523_modinit); 576 577 static void __exit wm8523_exit(void) 578 { 579 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 580 i2c_del_driver(&wm8523_i2c_driver); 581 #endif 582 } 583 module_exit(wm8523_exit); 584 585 MODULE_DESCRIPTION("ASoC WM8523 driver"); 586 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 587 MODULE_LICENSE("GPL"); 588