1 /* 2 * Texas Instruments TLV320AIC26 low power audio CODEC 3 * ALSA SoC CODEC driver 4 * 5 * Copyright (C) 2008 Secret Lab Technologies Ltd. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/moduleparam.h> 10 #include <linux/init.h> 11 #include <linux/delay.h> 12 #include <linux/pm.h> 13 #include <linux/device.h> 14 #include <linux/sysfs.h> 15 #include <linux/spi/spi.h> 16 #include <linux/slab.h> 17 #include <sound/core.h> 18 #include <sound/pcm.h> 19 #include <sound/pcm_params.h> 20 #include <sound/soc.h> 21 #include <sound/initval.h> 22 23 #include "tlv320aic26.h" 24 25 MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver"); 26 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); 27 MODULE_LICENSE("GPL"); 28 29 /* AIC26 driver private data */ 30 struct aic26 { 31 struct spi_device *spi; 32 struct snd_soc_codec codec; 33 int master; 34 int datfm; 35 int mclk; 36 37 /* Keyclick parameters */ 38 int keyclick_amplitude; 39 int keyclick_freq; 40 int keyclick_len; 41 }; 42 43 /* --------------------------------------------------------------------- 44 * Register access routines 45 */ 46 static unsigned int aic26_reg_read(struct snd_soc_codec *codec, 47 unsigned int reg) 48 { 49 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 50 u16 *cache = codec->reg_cache; 51 u16 cmd, value; 52 u8 buffer[2]; 53 int rc; 54 55 if (reg >= AIC26_NUM_REGS) { 56 WARN_ON_ONCE(1); 57 return 0; 58 } 59 60 /* Do SPI transfer; first 16bits are command; remaining is 61 * register contents */ 62 cmd = AIC26_READ_COMMAND_WORD(reg); 63 buffer[0] = (cmd >> 8) & 0xff; 64 buffer[1] = cmd & 0xff; 65 rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2); 66 if (rc) { 67 dev_err(&aic26->spi->dev, "AIC26 reg read error\n"); 68 return -EIO; 69 } 70 value = (buffer[0] << 8) | buffer[1]; 71 72 /* Update the cache before returning with the value */ 73 cache[reg] = value; 74 return value; 75 } 76 77 static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec, 78 unsigned int reg) 79 { 80 u16 *cache = codec->reg_cache; 81 82 if (reg >= AIC26_NUM_REGS) { 83 WARN_ON_ONCE(1); 84 return 0; 85 } 86 87 return cache[reg]; 88 } 89 90 static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg, 91 unsigned int value) 92 { 93 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 94 u16 *cache = codec->reg_cache; 95 u16 cmd; 96 u8 buffer[4]; 97 int rc; 98 99 if (reg >= AIC26_NUM_REGS) { 100 WARN_ON_ONCE(1); 101 return -EINVAL; 102 } 103 104 /* Do SPI transfer; first 16bits are command; remaining is data 105 * to write into register */ 106 cmd = AIC26_WRITE_COMMAND_WORD(reg); 107 buffer[0] = (cmd >> 8) & 0xff; 108 buffer[1] = cmd & 0xff; 109 buffer[2] = value >> 8; 110 buffer[3] = value; 111 rc = spi_write(aic26->spi, buffer, 4); 112 if (rc) { 113 dev_err(&aic26->spi->dev, "AIC26 reg read error\n"); 114 return -EIO; 115 } 116 117 /* update cache before returning */ 118 cache[reg] = value; 119 return 0; 120 } 121 122 /* --------------------------------------------------------------------- 123 * Digital Audio Interface Operations 124 */ 125 static int aic26_hw_params(struct snd_pcm_substream *substream, 126 struct snd_pcm_hw_params *params, 127 struct snd_soc_dai *dai) 128 { 129 struct snd_soc_codec *codec = dai->codec; 130 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 131 int fsref, divisor, wlen, pval, jval, dval, qval; 132 u16 reg; 133 134 dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n", 135 substream, params); 136 dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params), 137 params_format(params)); 138 139 switch (params_rate(params)) { 140 case 8000: fsref = 48000; divisor = AIC26_DIV_6; break; 141 case 11025: fsref = 44100; divisor = AIC26_DIV_4; break; 142 case 12000: fsref = 48000; divisor = AIC26_DIV_4; break; 143 case 16000: fsref = 48000; divisor = AIC26_DIV_3; break; 144 case 22050: fsref = 44100; divisor = AIC26_DIV_2; break; 145 case 24000: fsref = 48000; divisor = AIC26_DIV_2; break; 146 case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break; 147 case 44100: fsref = 44100; divisor = AIC26_DIV_1; break; 148 case 48000: fsref = 48000; divisor = AIC26_DIV_1; break; 149 default: 150 dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL; 151 } 152 153 /* select data word length */ 154 switch (params_format(params)) { 155 case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break; 156 case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break; 157 case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break; 158 case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break; 159 default: 160 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; 161 } 162 163 /** 164 * Configure PLL 165 * fsref = (mclk * PLLM) / 2048 166 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal) 167 */ 168 pval = 1; 169 /* compute J portion of multiplier */ 170 jval = fsref / (aic26->mclk / 2048); 171 /* compute fractional DDDD component of multiplier */ 172 dval = fsref - (jval * (aic26->mclk / 2048)); 173 dval = (10000 * dval) / (aic26->mclk / 2048); 174 dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval); 175 qval = 0; 176 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2; 177 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg); 178 reg = dval << 2; 179 aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg); 180 181 /* Audio Control 3 (master mode, fsref rate) */ 182 reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3); 183 reg &= ~0xf800; 184 if (aic26->master) 185 reg |= 0x0800; 186 if (fsref == 48000) 187 reg |= 0x2000; 188 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg); 189 190 /* Audio Control 1 (FSref divisor) */ 191 reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1); 192 reg &= ~0x0fff; 193 reg |= wlen | aic26->datfm | (divisor << 3) | divisor; 194 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg); 195 196 return 0; 197 } 198 199 /** 200 * aic26_mute - Mute control to reduce noise when changing audio format 201 */ 202 static int aic26_mute(struct snd_soc_dai *dai, int mute) 203 { 204 struct snd_soc_codec *codec = dai->codec; 205 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 206 u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN); 207 208 dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n", 209 dai, mute); 210 211 if (mute) 212 reg |= 0x8080; 213 else 214 reg &= ~0x8080; 215 aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg); 216 217 return 0; 218 } 219 220 static int aic26_set_sysclk(struct snd_soc_dai *codec_dai, 221 int clk_id, unsigned int freq, int dir) 222 { 223 struct snd_soc_codec *codec = codec_dai->codec; 224 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 225 226 dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i," 227 " freq=%i, dir=%i)\n", 228 codec_dai, clk_id, freq, dir); 229 230 /* MCLK needs to fall between 2MHz and 50 MHz */ 231 if ((freq < 2000000) || (freq > 50000000)) 232 return -EINVAL; 233 234 aic26->mclk = freq; 235 return 0; 236 } 237 238 static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 239 { 240 struct snd_soc_codec *codec = codec_dai->codec; 241 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); 242 243 dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n", 244 codec_dai, fmt); 245 246 /* set master/slave audio interface */ 247 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 248 case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break; 249 case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break; 250 default: 251 dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL; 252 } 253 254 /* interface format */ 255 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 256 case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break; 257 case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break; 258 case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break; 259 case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break; 260 default: 261 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; 262 } 263 264 return 0; 265 } 266 267 /* --------------------------------------------------------------------- 268 * Digital Audio Interface Definition 269 */ 270 #define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 271 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\ 272 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 273 SNDRV_PCM_RATE_48000) 274 #define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\ 275 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE) 276 277 static const struct snd_soc_dai_ops aic26_dai_ops = { 278 .hw_params = aic26_hw_params, 279 .digital_mute = aic26_mute, 280 .set_sysclk = aic26_set_sysclk, 281 .set_fmt = aic26_set_fmt, 282 }; 283 284 static struct snd_soc_dai_driver aic26_dai = { 285 .name = "tlv320aic26-hifi", 286 .playback = { 287 .stream_name = "Playback", 288 .channels_min = 2, 289 .channels_max = 2, 290 .rates = AIC26_RATES, 291 .formats = AIC26_FORMATS, 292 }, 293 .capture = { 294 .stream_name = "Capture", 295 .channels_min = 2, 296 .channels_max = 2, 297 .rates = AIC26_RATES, 298 .formats = AIC26_FORMATS, 299 }, 300 .ops = &aic26_dai_ops, 301 }; 302 303 /* --------------------------------------------------------------------- 304 * ALSA controls 305 */ 306 static const char *aic26_capture_src_text[] = {"Mic", "Aux"}; 307 static const struct soc_enum aic26_capture_src_enum = 308 SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text); 309 310 static const struct snd_kcontrol_new aic26_snd_controls[] = { 311 /* Output */ 312 SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1), 313 SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1), 314 SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0), 315 SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1), 316 SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0), 317 SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0), 318 SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0), 319 SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0), 320 SOC_ENUM("Capture Source", aic26_capture_src_enum), 321 }; 322 323 /* --------------------------------------------------------------------- 324 * SPI device portion of driver: sysfs files for debugging 325 */ 326 327 static ssize_t aic26_keyclick_show(struct device *dev, 328 struct device_attribute *attr, char *buf) 329 { 330 struct aic26 *aic26 = dev_get_drvdata(dev); 331 int val, amp, freq, len; 332 333 val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2); 334 amp = (val >> 12) & 0x7; 335 freq = (125 << ((val >> 8) & 0x7)) >> 1; 336 len = 2 * (1 + ((val >> 4) & 0xf)); 337 338 return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len); 339 } 340 341 /* Any write to the keyclick attribute will trigger the keyclick event */ 342 static ssize_t aic26_keyclick_set(struct device *dev, 343 struct device_attribute *attr, 344 const char *buf, size_t count) 345 { 346 struct aic26 *aic26 = dev_get_drvdata(dev); 347 int val; 348 349 val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2); 350 val |= 0x8000; 351 aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val); 352 353 return count; 354 } 355 356 static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set); 357 358 /* --------------------------------------------------------------------- 359 * SoC CODEC portion of driver: probe and release routines 360 */ 361 static int aic26_probe(struct snd_soc_codec *codec) 362 { 363 int ret, err, i, reg; 364 365 dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n"); 366 367 /* Reset the codec to power on defaults */ 368 aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00); 369 370 /* Power up CODEC */ 371 aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0); 372 373 /* Audio Control 3 (master mode, fsref rate) */ 374 reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3); 375 reg &= ~0xf800; 376 reg |= 0x0800; /* set master mode */ 377 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg); 378 379 /* Fill register cache */ 380 for (i = 0; i < codec->driver->reg_cache_size; i++) 381 aic26_reg_read(codec, i); 382 383 /* Register the sysfs files for debugging */ 384 /* Create SysFS files */ 385 ret = device_create_file(codec->dev, &dev_attr_keyclick); 386 if (ret) 387 dev_info(codec->dev, "error creating sysfs files\n"); 388 389 /* register controls */ 390 dev_dbg(codec->dev, "Registering controls\n"); 391 err = snd_soc_add_codec_controls(codec, aic26_snd_controls, 392 ARRAY_SIZE(aic26_snd_controls)); 393 WARN_ON(err < 0); 394 395 return 0; 396 } 397 398 static struct snd_soc_codec_driver aic26_soc_codec_dev = { 399 .probe = aic26_probe, 400 .read = aic26_reg_read, 401 .write = aic26_reg_write, 402 .reg_cache_size = AIC26_NUM_REGS, 403 .reg_word_size = sizeof(u16), 404 }; 405 406 /* --------------------------------------------------------------------- 407 * SPI device portion of driver: probe and release routines and SPI 408 * driver registration. 409 */ 410 static int aic26_spi_probe(struct spi_device *spi) 411 { 412 struct aic26 *aic26; 413 int ret; 414 415 dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n"); 416 417 /* Allocate driver data */ 418 aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL); 419 if (!aic26) 420 return -ENOMEM; 421 422 /* Initialize the driver data */ 423 aic26->spi = spi; 424 dev_set_drvdata(&spi->dev, aic26); 425 aic26->master = 1; 426 427 ret = snd_soc_register_codec(&spi->dev, 428 &aic26_soc_codec_dev, &aic26_dai, 1); 429 return ret; 430 } 431 432 static int aic26_spi_remove(struct spi_device *spi) 433 { 434 snd_soc_unregister_codec(&spi->dev); 435 return 0; 436 } 437 438 static struct spi_driver aic26_spi = { 439 .driver = { 440 .name = "tlv320aic26-codec", 441 .owner = THIS_MODULE, 442 }, 443 .probe = aic26_spi_probe, 444 .remove = aic26_spi_remove, 445 }; 446 447 module_spi_driver(aic26_spi); 448