1 /* 2 * Copyright (C) 2005 David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19 #ifndef __LINUX_SPI_H 20 #define __LINUX_SPI_H 21 22 #include <linux/device.h> 23 #include <linux/mod_devicetable.h> 24 #include <linux/slab.h> 25 26 /* 27 * INTERFACES between SPI master-side drivers and SPI infrastructure. 28 * (There's no SPI slave support for Linux yet...) 29 */ 30 extern struct bus_type spi_bus_type; 31 32 /** 33 * struct spi_device - Master side proxy for an SPI slave device 34 * @dev: Driver model representation of the device. 35 * @master: SPI controller used with the device. 36 * @max_speed_hz: Maximum clock rate to be used with this chip 37 * (on this board); may be changed by the device's driver. 38 * The spi_transfer.speed_hz can override this for each transfer. 39 * @chip_select: Chipselect, distinguishing chips handled by @master. 40 * @mode: The spi mode defines how data is clocked out and in. 41 * This may be changed by the device's driver. 42 * The "active low" default for chipselect mode can be overridden 43 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for 44 * each word in a transfer (by specifying SPI_LSB_FIRST). 45 * @bits_per_word: Data transfers involve one or more words; word sizes 46 * like eight or 12 bits are common. In-memory wordsizes are 47 * powers of two bytes (e.g. 20 bit samples use 32 bits). 48 * This may be changed by the device's driver, or left at the 49 * default (0) indicating protocol words are eight bit bytes. 50 * The spi_transfer.bits_per_word can override this for each transfer. 51 * @irq: Negative, or the number passed to request_irq() to receive 52 * interrupts from this device. 53 * @controller_state: Controller's runtime state 54 * @controller_data: Board-specific definitions for controller, such as 55 * FIFO initialization parameters; from board_info.controller_data 56 * @modalias: Name of the driver to use with this device, or an alias 57 * for that name. This appears in the sysfs "modalias" attribute 58 * for driver coldplugging, and in uevents used for hotplugging 59 * 60 * A @spi_device is used to interchange data between an SPI slave 61 * (usually a discrete chip) and CPU memory. 62 * 63 * In @dev, the platform_data is used to hold information about this 64 * device that's meaningful to the device's protocol driver, but not 65 * to its controller. One example might be an identifier for a chip 66 * variant with slightly different functionality; another might be 67 * information about how this particular board wires the chip's pins. 68 */ 69 struct spi_device { 70 struct device dev; 71 struct spi_master *master; 72 u32 max_speed_hz; 73 u8 chip_select; 74 u8 mode; 75 #define SPI_CPHA 0x01 /* clock phase */ 76 #define SPI_CPOL 0x02 /* clock polarity */ 77 #define SPI_MODE_0 (0|0) /* (original MicroWire) */ 78 #define SPI_MODE_1 (0|SPI_CPHA) 79 #define SPI_MODE_2 (SPI_CPOL|0) 80 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 81 #define SPI_CS_HIGH 0x04 /* chipselect active high? */ 82 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ 83 #define SPI_3WIRE 0x10 /* SI/SO signals shared */ 84 #define SPI_LOOP 0x20 /* loopback mode */ 85 #define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */ 86 #define SPI_READY 0x80 /* slave pulls low to pause */ 87 u8 bits_per_word; 88 int irq; 89 void *controller_state; 90 void *controller_data; 91 char modalias[SPI_NAME_SIZE]; 92 93 /* 94 * likely need more hooks for more protocol options affecting how 95 * the controller talks to each chip, like: 96 * - memory packing (12 bit samples into low bits, others zeroed) 97 * - priority 98 * - drop chipselect after each word 99 * - chipselect delays 100 * - ... 101 */ 102 }; 103 104 static inline struct spi_device *to_spi_device(struct device *dev) 105 { 106 return dev ? container_of(dev, struct spi_device, dev) : NULL; 107 } 108 109 /* most drivers won't need to care about device refcounting */ 110 static inline struct spi_device *spi_dev_get(struct spi_device *spi) 111 { 112 return (spi && get_device(&spi->dev)) ? spi : NULL; 113 } 114 115 static inline void spi_dev_put(struct spi_device *spi) 116 { 117 if (spi) 118 put_device(&spi->dev); 119 } 120 121 /* ctldata is for the bus_master driver's runtime state */ 122 static inline void *spi_get_ctldata(struct spi_device *spi) 123 { 124 return spi->controller_state; 125 } 126 127 static inline void spi_set_ctldata(struct spi_device *spi, void *state) 128 { 129 spi->controller_state = state; 130 } 131 132 /* device driver data */ 133 134 static inline void spi_set_drvdata(struct spi_device *spi, void *data) 135 { 136 dev_set_drvdata(&spi->dev, data); 137 } 138 139 static inline void *spi_get_drvdata(struct spi_device *spi) 140 { 141 return dev_get_drvdata(&spi->dev); 142 } 143 144 struct spi_message; 145 146 147 148 /** 149 * struct spi_driver - Host side "protocol" driver 150 * @id_table: List of SPI devices supported by this driver 151 * @probe: Binds this driver to the spi device. Drivers can verify 152 * that the device is actually present, and may need to configure 153 * characteristics (such as bits_per_word) which weren't needed for 154 * the initial configuration done during system setup. 155 * @remove: Unbinds this driver from the spi device 156 * @shutdown: Standard shutdown callback used during system state 157 * transitions such as powerdown/halt and kexec 158 * @suspend: Standard suspend callback used during system state transitions 159 * @resume: Standard resume callback used during system state transitions 160 * @driver: SPI device drivers should initialize the name and owner 161 * field of this structure. 162 * 163 * This represents the kind of device driver that uses SPI messages to 164 * interact with the hardware at the other end of a SPI link. It's called 165 * a "protocol" driver because it works through messages rather than talking 166 * directly to SPI hardware (which is what the underlying SPI controller 167 * driver does to pass those messages). These protocols are defined in the 168 * specification for the device(s) supported by the driver. 169 * 170 * As a rule, those device protocols represent the lowest level interface 171 * supported by a driver, and it will support upper level interfaces too. 172 * Examples of such upper levels include frameworks like MTD, networking, 173 * MMC, RTC, filesystem character device nodes, and hardware monitoring. 174 */ 175 struct spi_driver { 176 const struct spi_device_id *id_table; 177 int (*probe)(struct spi_device *spi); 178 int (*remove)(struct spi_device *spi); 179 void (*shutdown)(struct spi_device *spi); 180 int (*suspend)(struct spi_device *spi, pm_message_t mesg); 181 int (*resume)(struct spi_device *spi); 182 struct device_driver driver; 183 }; 184 185 static inline struct spi_driver *to_spi_driver(struct device_driver *drv) 186 { 187 return drv ? container_of(drv, struct spi_driver, driver) : NULL; 188 } 189 190 extern int spi_register_driver(struct spi_driver *sdrv); 191 192 /** 193 * spi_unregister_driver - reverse effect of spi_register_driver 194 * @sdrv: the driver to unregister 195 * Context: can sleep 196 */ 197 static inline void spi_unregister_driver(struct spi_driver *sdrv) 198 { 199 if (sdrv) 200 driver_unregister(&sdrv->driver); 201 } 202 203 204 /** 205 * struct spi_master - interface to SPI master controller 206 * @dev: device interface to this driver 207 * @bus_num: board-specific (and often SOC-specific) identifier for a 208 * given SPI controller. 209 * @num_chipselect: chipselects are used to distinguish individual 210 * SPI slaves, and are numbered from zero to num_chipselects. 211 * each slave has a chipselect signal, but it's common that not 212 * every chipselect is connected to a slave. 213 * @dma_alignment: SPI controller constraint on DMA buffers alignment. 214 * @mode_bits: flags understood by this controller driver 215 * @flags: other constraints relevant to this driver 216 * @bus_lock_spinlock: spinlock for SPI bus locking 217 * @bus_lock_mutex: mutex for SPI bus locking 218 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use 219 * @setup: updates the device mode and clocking records used by a 220 * device's SPI controller; protocol code may call this. This 221 * must fail if an unrecognized or unsupported mode is requested. 222 * It's always safe to call this unless transfers are pending on 223 * the device whose settings are being modified. 224 * @transfer: adds a message to the controller's transfer queue. 225 * @cleanup: frees controller-specific state 226 * 227 * Each SPI master controller can communicate with one or more @spi_device 228 * children. These make a small bus, sharing MOSI, MISO and SCK signals 229 * but not chip select signals. Each device may be configured to use a 230 * different clock rate, since those shared signals are ignored unless 231 * the chip is selected. 232 * 233 * The driver for an SPI controller manages access to those devices through 234 * a queue of spi_message transactions, copying data between CPU memory and 235 * an SPI slave device. For each such message it queues, it calls the 236 * message's completion function when the transaction completes. 237 */ 238 struct spi_master { 239 struct device dev; 240 241 /* other than negative (== assign one dynamically), bus_num is fully 242 * board-specific. usually that simplifies to being SOC-specific. 243 * example: one SOC has three SPI controllers, numbered 0..2, 244 * and one board's schematics might show it using SPI-2. software 245 * would normally use bus_num=2 for that controller. 246 */ 247 s16 bus_num; 248 249 /* chipselects will be integral to many controllers; some others 250 * might use board-specific GPIOs. 251 */ 252 u16 num_chipselect; 253 254 /* some SPI controllers pose alignment requirements on DMAable 255 * buffers; let protocol drivers know about these requirements. 256 */ 257 u16 dma_alignment; 258 259 /* spi_device.mode flags understood by this controller driver */ 260 u16 mode_bits; 261 262 /* other constraints relevant to this driver */ 263 u16 flags; 264 #define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ 265 #define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */ 266 #define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */ 267 268 /* lock and mutex for SPI bus locking */ 269 spinlock_t bus_lock_spinlock; 270 struct mutex bus_lock_mutex; 271 272 /* flag indicating that the SPI bus is locked for exclusive use */ 273 bool bus_lock_flag; 274 275 /* Setup mode and clock, etc (spi driver may call many times). 276 * 277 * IMPORTANT: this may be called when transfers to another 278 * device are active. DO NOT UPDATE SHARED REGISTERS in ways 279 * which could break those transfers. 280 */ 281 int (*setup)(struct spi_device *spi); 282 283 /* bidirectional bulk transfers 284 * 285 * + The transfer() method may not sleep; its main role is 286 * just to add the message to the queue. 287 * + For now there's no remove-from-queue operation, or 288 * any other request management 289 * + To a given spi_device, message queueing is pure fifo 290 * 291 * + The master's main job is to process its message queue, 292 * selecting a chip then transferring data 293 * + If there are multiple spi_device children, the i/o queue 294 * arbitration algorithm is unspecified (round robin, fifo, 295 * priority, reservations, preemption, etc) 296 * 297 * + Chipselect stays active during the entire message 298 * (unless modified by spi_transfer.cs_change != 0). 299 * + The message transfers use clock and SPI mode parameters 300 * previously established by setup() for this device 301 */ 302 int (*transfer)(struct spi_device *spi, 303 struct spi_message *mesg); 304 305 /* called on release() to free memory provided by spi_master */ 306 void (*cleanup)(struct spi_device *spi); 307 }; 308 309 static inline void *spi_master_get_devdata(struct spi_master *master) 310 { 311 return dev_get_drvdata(&master->dev); 312 } 313 314 static inline void spi_master_set_devdata(struct spi_master *master, void *data) 315 { 316 dev_set_drvdata(&master->dev, data); 317 } 318 319 static inline struct spi_master *spi_master_get(struct spi_master *master) 320 { 321 if (!master || !get_device(&master->dev)) 322 return NULL; 323 return master; 324 } 325 326 static inline void spi_master_put(struct spi_master *master) 327 { 328 if (master) 329 put_device(&master->dev); 330 } 331 332 333 /* the spi driver core manages memory for the spi_master classdev */ 334 extern struct spi_master * 335 spi_alloc_master(struct device *host, unsigned size); 336 337 extern int spi_register_master(struct spi_master *master); 338 extern void spi_unregister_master(struct spi_master *master); 339 340 extern struct spi_master *spi_busnum_to_master(u16 busnum); 341 342 /*---------------------------------------------------------------------------*/ 343 344 /* 345 * I/O INTERFACE between SPI controller and protocol drivers 346 * 347 * Protocol drivers use a queue of spi_messages, each transferring data 348 * between the controller and memory buffers. 349 * 350 * The spi_messages themselves consist of a series of read+write transfer 351 * segments. Those segments always read the same number of bits as they 352 * write; but one or the other is easily ignored by passing a null buffer 353 * pointer. (This is unlike most types of I/O API, because SPI hardware 354 * is full duplex.) 355 * 356 * NOTE: Allocation of spi_transfer and spi_message memory is entirely 357 * up to the protocol driver, which guarantees the integrity of both (as 358 * well as the data buffers) for as long as the message is queued. 359 */ 360 361 /** 362 * struct spi_transfer - a read/write buffer pair 363 * @tx_buf: data to be written (dma-safe memory), or NULL 364 * @rx_buf: data to be read (dma-safe memory), or NULL 365 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped 366 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped 367 * @len: size of rx and tx buffers (in bytes) 368 * @speed_hz: Select a speed other than the device default for this 369 * transfer. If 0 the default (from @spi_device) is used. 370 * @bits_per_word: select a bits_per_word other than the device default 371 * for this transfer. If 0 the default (from @spi_device) is used. 372 * @cs_change: affects chipselect after this transfer completes 373 * @delay_usecs: microseconds to delay after this transfer before 374 * (optionally) changing the chipselect status, then starting 375 * the next transfer or completing this @spi_message. 376 * @transfer_list: transfers are sequenced through @spi_message.transfers 377 * 378 * SPI transfers always write the same number of bytes as they read. 379 * Protocol drivers should always provide @rx_buf and/or @tx_buf. 380 * In some cases, they may also want to provide DMA addresses for 381 * the data being transferred; that may reduce overhead, when the 382 * underlying driver uses dma. 383 * 384 * If the transmit buffer is null, zeroes will be shifted out 385 * while filling @rx_buf. If the receive buffer is null, the data 386 * shifted in will be discarded. Only "len" bytes shift out (or in). 387 * It's an error to try to shift out a partial word. (For example, by 388 * shifting out three bytes with word size of sixteen or twenty bits; 389 * the former uses two bytes per word, the latter uses four bytes.) 390 * 391 * In-memory data values are always in native CPU byte order, translated 392 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So 393 * for example when bits_per_word is sixteen, buffers are 2N bytes long 394 * (@len = 2N) and hold N sixteen bit words in CPU byte order. 395 * 396 * When the word size of the SPI transfer is not a power-of-two multiple 397 * of eight bits, those in-memory words include extra bits. In-memory 398 * words are always seen by protocol drivers as right-justified, so the 399 * undefined (rx) or unused (tx) bits are always the most significant bits. 400 * 401 * All SPI transfers start with the relevant chipselect active. Normally 402 * it stays selected until after the last transfer in a message. Drivers 403 * can affect the chipselect signal using cs_change. 404 * 405 * (i) If the transfer isn't the last one in the message, this flag is 406 * used to make the chipselect briefly go inactive in the middle of the 407 * message. Toggling chipselect in this way may be needed to terminate 408 * a chip command, letting a single spi_message perform all of group of 409 * chip transactions together. 410 * 411 * (ii) When the transfer is the last one in the message, the chip may 412 * stay selected until the next transfer. On multi-device SPI busses 413 * with nothing blocking messages going to other devices, this is just 414 * a performance hint; starting a message to another device deselects 415 * this one. But in other cases, this can be used to ensure correctness. 416 * Some devices need protocol transactions to be built from a series of 417 * spi_message submissions, where the content of one message is determined 418 * by the results of previous messages and where the whole transaction 419 * ends when the chipselect goes intactive. 420 * 421 * The code that submits an spi_message (and its spi_transfers) 422 * to the lower layers is responsible for managing its memory. 423 * Zero-initialize every field you don't set up explicitly, to 424 * insulate against future API updates. After you submit a message 425 * and its transfers, ignore them until its completion callback. 426 */ 427 struct spi_transfer { 428 /* it's ok if tx_buf == rx_buf (right?) 429 * for MicroWire, one buffer must be null 430 * buffers must work with dma_*map_single() calls, unless 431 * spi_message.is_dma_mapped reports a pre-existing mapping 432 */ 433 const void *tx_buf; 434 void *rx_buf; 435 unsigned len; 436 437 dma_addr_t tx_dma; 438 dma_addr_t rx_dma; 439 440 unsigned cs_change:1; 441 u8 bits_per_word; 442 u16 delay_usecs; 443 u32 speed_hz; 444 445 struct list_head transfer_list; 446 }; 447 448 /** 449 * struct spi_message - one multi-segment SPI transaction 450 * @transfers: list of transfer segments in this transaction 451 * @spi: SPI device to which the transaction is queued 452 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual 453 * addresses for each transfer buffer 454 * @complete: called to report transaction completions 455 * @context: the argument to complete() when it's called 456 * @actual_length: the total number of bytes that were transferred in all 457 * successful segments 458 * @status: zero for success, else negative errno 459 * @queue: for use by whichever driver currently owns the message 460 * @state: for use by whichever driver currently owns the message 461 * 462 * A @spi_message is used to execute an atomic sequence of data transfers, 463 * each represented by a struct spi_transfer. The sequence is "atomic" 464 * in the sense that no other spi_message may use that SPI bus until that 465 * sequence completes. On some systems, many such sequences can execute as 466 * as single programmed DMA transfer. On all systems, these messages are 467 * queued, and might complete after transactions to other devices. Messages 468 * sent to a given spi_device are alway executed in FIFO order. 469 * 470 * The code that submits an spi_message (and its spi_transfers) 471 * to the lower layers is responsible for managing its memory. 472 * Zero-initialize every field you don't set up explicitly, to 473 * insulate against future API updates. After you submit a message 474 * and its transfers, ignore them until its completion callback. 475 */ 476 struct spi_message { 477 struct list_head transfers; 478 479 struct spi_device *spi; 480 481 unsigned is_dma_mapped:1; 482 483 /* REVISIT: we might want a flag affecting the behavior of the 484 * last transfer ... allowing things like "read 16 bit length L" 485 * immediately followed by "read L bytes". Basically imposing 486 * a specific message scheduling algorithm. 487 * 488 * Some controller drivers (message-at-a-time queue processing) 489 * could provide that as their default scheduling algorithm. But 490 * others (with multi-message pipelines) could need a flag to 491 * tell them about such special cases. 492 */ 493 494 /* completion is reported through a callback */ 495 void (*complete)(void *context); 496 void *context; 497 unsigned actual_length; 498 int status; 499 500 /* for optional use by whatever driver currently owns the 501 * spi_message ... between calls to spi_async and then later 502 * complete(), that's the spi_master controller driver. 503 */ 504 struct list_head queue; 505 void *state; 506 }; 507 508 static inline void spi_message_init(struct spi_message *m) 509 { 510 memset(m, 0, sizeof *m); 511 INIT_LIST_HEAD(&m->transfers); 512 } 513 514 static inline void 515 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) 516 { 517 list_add_tail(&t->transfer_list, &m->transfers); 518 } 519 520 static inline void 521 spi_transfer_del(struct spi_transfer *t) 522 { 523 list_del(&t->transfer_list); 524 } 525 526 /* It's fine to embed message and transaction structures in other data 527 * structures so long as you don't free them while they're in use. 528 */ 529 530 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) 531 { 532 struct spi_message *m; 533 534 m = kzalloc(sizeof(struct spi_message) 535 + ntrans * sizeof(struct spi_transfer), 536 flags); 537 if (m) { 538 int i; 539 struct spi_transfer *t = (struct spi_transfer *)(m + 1); 540 541 INIT_LIST_HEAD(&m->transfers); 542 for (i = 0; i < ntrans; i++, t++) 543 spi_message_add_tail(t, m); 544 } 545 return m; 546 } 547 548 static inline void spi_message_free(struct spi_message *m) 549 { 550 kfree(m); 551 } 552 553 extern int spi_setup(struct spi_device *spi); 554 extern int spi_async(struct spi_device *spi, struct spi_message *message); 555 extern int spi_async_locked(struct spi_device *spi, 556 struct spi_message *message); 557 558 /*---------------------------------------------------------------------------*/ 559 560 /* All these synchronous SPI transfer routines are utilities layered 561 * over the core async transfer primitive. Here, "synchronous" means 562 * they will sleep uninterruptibly until the async transfer completes. 563 */ 564 565 extern int spi_sync(struct spi_device *spi, struct spi_message *message); 566 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message); 567 extern int spi_bus_lock(struct spi_master *master); 568 extern int spi_bus_unlock(struct spi_master *master); 569 570 /** 571 * spi_write - SPI synchronous write 572 * @spi: device to which data will be written 573 * @buf: data buffer 574 * @len: data buffer size 575 * Context: can sleep 576 * 577 * This writes the buffer and returns zero or a negative error code. 578 * Callable only from contexts that can sleep. 579 */ 580 static inline int 581 spi_write(struct spi_device *spi, const u8 *buf, size_t len) 582 { 583 struct spi_transfer t = { 584 .tx_buf = buf, 585 .len = len, 586 }; 587 struct spi_message m; 588 589 spi_message_init(&m); 590 spi_message_add_tail(&t, &m); 591 return spi_sync(spi, &m); 592 } 593 594 /** 595 * spi_read - SPI synchronous read 596 * @spi: device from which data will be read 597 * @buf: data buffer 598 * @len: data buffer size 599 * Context: can sleep 600 * 601 * This reads the buffer and returns zero or a negative error code. 602 * Callable only from contexts that can sleep. 603 */ 604 static inline int 605 spi_read(struct spi_device *spi, u8 *buf, size_t len) 606 { 607 struct spi_transfer t = { 608 .rx_buf = buf, 609 .len = len, 610 }; 611 struct spi_message m; 612 613 spi_message_init(&m); 614 spi_message_add_tail(&t, &m); 615 return spi_sync(spi, &m); 616 } 617 618 /* this copies txbuf and rxbuf data; for small transfers only! */ 619 extern int spi_write_then_read(struct spi_device *spi, 620 const u8 *txbuf, unsigned n_tx, 621 u8 *rxbuf, unsigned n_rx); 622 623 /** 624 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read 625 * @spi: device with which data will be exchanged 626 * @cmd: command to be written before data is read back 627 * Context: can sleep 628 * 629 * This returns the (unsigned) eight bit number returned by the 630 * device, or else a negative error code. Callable only from 631 * contexts that can sleep. 632 */ 633 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) 634 { 635 ssize_t status; 636 u8 result; 637 638 status = spi_write_then_read(spi, &cmd, 1, &result, 1); 639 640 /* return negative errno or unsigned value */ 641 return (status < 0) ? status : result; 642 } 643 644 /** 645 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read 646 * @spi: device with which data will be exchanged 647 * @cmd: command to be written before data is read back 648 * Context: can sleep 649 * 650 * This returns the (unsigned) sixteen bit number returned by the 651 * device, or else a negative error code. Callable only from 652 * contexts that can sleep. 653 * 654 * The number is returned in wire-order, which is at least sometimes 655 * big-endian. 656 */ 657 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) 658 { 659 ssize_t status; 660 u16 result; 661 662 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2); 663 664 /* return negative errno or unsigned value */ 665 return (status < 0) ? status : result; 666 } 667 668 /*---------------------------------------------------------------------------*/ 669 670 /* 671 * INTERFACE between board init code and SPI infrastructure. 672 * 673 * No SPI driver ever sees these SPI device table segments, but 674 * it's how the SPI core (or adapters that get hotplugged) grows 675 * the driver model tree. 676 * 677 * As a rule, SPI devices can't be probed. Instead, board init code 678 * provides a table listing the devices which are present, with enough 679 * information to bind and set up the device's driver. There's basic 680 * support for nonstatic configurations too; enough to handle adding 681 * parport adapters, or microcontrollers acting as USB-to-SPI bridges. 682 */ 683 684 /** 685 * struct spi_board_info - board-specific template for a SPI device 686 * @modalias: Initializes spi_device.modalias; identifies the driver. 687 * @platform_data: Initializes spi_device.platform_data; the particular 688 * data stored there is driver-specific. 689 * @controller_data: Initializes spi_device.controller_data; some 690 * controllers need hints about hardware setup, e.g. for DMA. 691 * @irq: Initializes spi_device.irq; depends on how the board is wired. 692 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits 693 * from the chip datasheet and board-specific signal quality issues. 694 * @bus_num: Identifies which spi_master parents the spi_device; unused 695 * by spi_new_device(), and otherwise depends on board wiring. 696 * @chip_select: Initializes spi_device.chip_select; depends on how 697 * the board is wired. 698 * @mode: Initializes spi_device.mode; based on the chip datasheet, board 699 * wiring (some devices support both 3WIRE and standard modes), and 700 * possibly presence of an inverter in the chipselect path. 701 * 702 * When adding new SPI devices to the device tree, these structures serve 703 * as a partial device template. They hold information which can't always 704 * be determined by drivers. Information that probe() can establish (such 705 * as the default transfer wordsize) is not included here. 706 * 707 * These structures are used in two places. Their primary role is to 708 * be stored in tables of board-specific device descriptors, which are 709 * declared early in board initialization and then used (much later) to 710 * populate a controller's device tree after the that controller's driver 711 * initializes. A secondary (and atypical) role is as a parameter to 712 * spi_new_device() call, which happens after those controller drivers 713 * are active in some dynamic board configuration models. 714 */ 715 struct spi_board_info { 716 /* the device name and module name are coupled, like platform_bus; 717 * "modalias" is normally the driver name. 718 * 719 * platform_data goes to spi_device.dev.platform_data, 720 * controller_data goes to spi_device.controller_data, 721 * irq is copied too 722 */ 723 char modalias[SPI_NAME_SIZE]; 724 const void *platform_data; 725 void *controller_data; 726 int irq; 727 728 /* slower signaling on noisy or low voltage boards */ 729 u32 max_speed_hz; 730 731 732 /* bus_num is board specific and matches the bus_num of some 733 * spi_master that will probably be registered later. 734 * 735 * chip_select reflects how this chip is wired to that master; 736 * it's less than num_chipselect. 737 */ 738 u16 bus_num; 739 u16 chip_select; 740 741 /* mode becomes spi_device.mode, and is essential for chips 742 * where the default of SPI_CS_HIGH = 0 is wrong. 743 */ 744 u8 mode; 745 746 /* ... may need additional spi_device chip config data here. 747 * avoid stuff protocol drivers can set; but include stuff 748 * needed to behave without being bound to a driver: 749 * - quirks like clock rate mattering when not selected 750 */ 751 }; 752 753 #ifdef CONFIG_SPI 754 extern int 755 spi_register_board_info(struct spi_board_info const *info, unsigned n); 756 #else 757 /* board init code may ignore whether SPI is configured or not */ 758 static inline int 759 spi_register_board_info(struct spi_board_info const *info, unsigned n) 760 { return 0; } 761 #endif 762 763 764 /* If you're hotplugging an adapter with devices (parport, usb, etc) 765 * use spi_new_device() to describe each device. You can also call 766 * spi_unregister_device() to start making that device vanish, but 767 * normally that would be handled by spi_unregister_master(). 768 * 769 * You can also use spi_alloc_device() and spi_add_device() to use a two 770 * stage registration sequence for each spi_device. This gives the caller 771 * some more control over the spi_device structure before it is registered, 772 * but requires that caller to initialize fields that would otherwise 773 * be defined using the board info. 774 */ 775 extern struct spi_device * 776 spi_alloc_device(struct spi_master *master); 777 778 extern int 779 spi_add_device(struct spi_device *spi); 780 781 extern struct spi_device * 782 spi_new_device(struct spi_master *, struct spi_board_info *); 783 784 static inline void 785 spi_unregister_device(struct spi_device *spi) 786 { 787 if (spi) 788 device_unregister(&spi->dev); 789 } 790 791 extern const struct spi_device_id * 792 spi_get_device_id(const struct spi_device *sdev); 793 794 #endif /* __LINUX_SPI_H */ 795