1 /* 2 * Register declarations for DA9052 PMICs. 3 * 4 * Copyright(c) 2011 Dialog Semiconductor Ltd. 5 * 6 * Author: David Dajun Chen <dchen@diasemi.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * 22 */ 23 24 #ifndef __LINUX_MFD_DA9052_REG_H 25 #define __LINUX_MFD_DA9052_REG_H 26 27 /* PAGE REGISTERS */ 28 #define DA9052_PAGE0_CON_REG 0 29 #define DA9052_PAGE1_CON_REG 128 30 31 /* STATUS REGISTERS */ 32 #define DA9052_STATUS_A_REG 1 33 #define DA9052_STATUS_B_REG 2 34 #define DA9052_STATUS_C_REG 3 35 #define DA9052_STATUS_D_REG 4 36 37 /* PARK REGISTER */ 38 #define DA9052_PARK_REGISTER DA9052_STATUS_D_REG 39 40 /* EVENT REGISTERS */ 41 #define DA9052_EVENT_A_REG 5 42 #define DA9052_EVENT_B_REG 6 43 #define DA9052_EVENT_C_REG 7 44 #define DA9052_EVENT_D_REG 8 45 #define DA9052_FAULTLOG_REG 9 46 47 /* IRQ REGISTERS */ 48 #define DA9052_IRQ_MASK_A_REG 10 49 #define DA9052_IRQ_MASK_B_REG 11 50 #define DA9052_IRQ_MASK_C_REG 12 51 #define DA9052_IRQ_MASK_D_REG 13 52 53 /* CONTROL REGISTERS */ 54 #define DA9052_CONTROL_A_REG 14 55 #define DA9052_CONTROL_B_REG 15 56 #define DA9052_CONTROL_C_REG 16 57 #define DA9052_CONTROL_D_REG 17 58 59 #define DA9052_PDDIS_REG 18 60 #define DA9052_INTERFACE_REG 19 61 #define DA9052_RESET_REG 20 62 63 /* GPIO REGISTERS */ 64 #define DA9052_GPIO_0_1_REG 21 65 #define DA9052_GPIO_2_3_REG 22 66 #define DA9052_GPIO_4_5_REG 23 67 #define DA9052_GPIO_6_7_REG 24 68 #define DA9052_GPIO_14_15_REG 28 69 70 /* POWER SEQUENCER CONTROL REGISTERS */ 71 #define DA9052_ID_0_1_REG 29 72 #define DA9052_ID_2_3_REG 30 73 #define DA9052_ID_4_5_REG 31 74 #define DA9052_ID_6_7_REG 32 75 #define DA9052_ID_8_9_REG 33 76 #define DA9052_ID_10_11_REG 34 77 #define DA9052_ID_12_13_REG 35 78 #define DA9052_ID_14_15_REG 36 79 #define DA9052_ID_16_17_REG 37 80 #define DA9052_ID_18_19_REG 38 81 #define DA9052_ID_20_21_REG 39 82 #define DA9052_SEQ_STATUS_REG 40 83 #define DA9052_SEQ_A_REG 41 84 #define DA9052_SEQ_B_REG 42 85 #define DA9052_SEQ_TIMER_REG 43 86 87 /* LDO AND BUCK REGISTERS */ 88 #define DA9052_BUCKA_REG 44 89 #define DA9052_BUCKB_REG 45 90 #define DA9052_BUCKCORE_REG 46 91 #define DA9052_BUCKPRO_REG 47 92 #define DA9052_BUCKMEM_REG 48 93 #define DA9052_BUCKPERI_REG 49 94 #define DA9052_LDO1_REG 50 95 #define DA9052_LDO2_REG 51 96 #define DA9052_LDO3_REG 52 97 #define DA9052_LDO4_REG 53 98 #define DA9052_LDO5_REG 54 99 #define DA9052_LDO6_REG 55 100 #define DA9052_LDO7_REG 56 101 #define DA9052_LDO8_REG 57 102 #define DA9052_LDO9_REG 58 103 #define DA9052_LDO10_REG 59 104 #define DA9052_SUPPLY_REG 60 105 #define DA9052_PULLDOWN_REG 61 106 #define DA9052_CHGBUCK_REG 62 107 #define DA9052_WAITCONT_REG 63 108 #define DA9052_ISET_REG 64 109 #define DA9052_BATCHG_REG 65 110 111 /* BATTERY CONTROL REGISTRS */ 112 #define DA9052_CHG_CONT_REG 66 113 #define DA9052_INPUT_CONT_REG 67 114 #define DA9052_CHG_TIME_REG 68 115 #define DA9052_BBAT_CONT_REG 69 116 117 /* LED CONTROL REGISTERS */ 118 #define DA9052_BOOST_REG 70 119 #define DA9052_LED_CONT_REG 71 120 #define DA9052_LEDMIN123_REG 72 121 #define DA9052_LED1_CONF_REG 73 122 #define DA9052_LED2_CONF_REG 74 123 #define DA9052_LED3_CONF_REG 75 124 #define DA9052_LED1CONT_REG 76 125 #define DA9052_LED2CONT_REG 77 126 #define DA9052_LED3CONT_REG 78 127 #define DA9052_LED_CONT_4_REG 79 128 #define DA9052_LED_CONT_5_REG 80 129 130 /* ADC CONTROL REGISTERS */ 131 #define DA9052_ADC_MAN_REG 81 132 #define DA9052_ADC_CONT_REG 82 133 #define DA9052_ADC_RES_L_REG 83 134 #define DA9052_ADC_RES_H_REG 84 135 #define DA9052_VDD_RES_REG 85 136 #define DA9052_VDD_MON_REG 86 137 138 #define DA9052_ICHG_AV_REG 87 139 #define DA9052_ICHG_THD_REG 88 140 #define DA9052_ICHG_END_REG 89 141 #define DA9052_TBAT_RES_REG 90 142 #define DA9052_TBAT_HIGHP_REG 91 143 #define DA9052_TBAT_HIGHN_REG 92 144 #define DA9052_TBAT_LOW_REG 93 145 #define DA9052_T_OFFSET_REG 94 146 147 #define DA9052_ADCIN4_RES_REG 95 148 #define DA9052_AUTO4_HIGH_REG 96 149 #define DA9052_AUTO4_LOW_REG 97 150 #define DA9052_ADCIN5_RES_REG 98 151 #define DA9052_AUTO5_HIGH_REG 99 152 #define DA9052_AUTO5_LOW_REG 100 153 #define DA9052_ADCIN6_RES_REG 101 154 #define DA9052_AUTO6_HIGH_REG 102 155 #define DA9052_AUTO6_LOW_REG 103 156 157 #define DA9052_TJUNC_RES_REG 104 158 159 /* TSI CONTROL REGISTERS */ 160 #define DA9052_TSI_CONT_A_REG 105 161 #define DA9052_TSI_CONT_B_REG 106 162 #define DA9052_TSI_X_MSB_REG 107 163 #define DA9052_TSI_Y_MSB_REG 108 164 #define DA9052_TSI_LSB_REG 109 165 #define DA9052_TSI_Z_MSB_REG 110 166 167 /* RTC COUNT REGISTERS */ 168 #define DA9052_COUNT_S_REG 111 169 #define DA9052_COUNT_MI_REG 112 170 #define DA9052_COUNT_H_REG 113 171 #define DA9052_COUNT_D_REG 114 172 #define DA9052_COUNT_MO_REG 115 173 #define DA9052_COUNT_Y_REG 116 174 175 /* RTC CONTROL REGISTERS */ 176 #define DA9052_ALARM_MI_REG 117 177 #define DA9052_ALARM_H_REG 118 178 #define DA9052_ALARM_D_REG 119 179 #define DA9052_ALARM_MO_REG 120 180 #define DA9052_ALARM_Y_REG 121 181 #define DA9052_SECOND_A_REG 122 182 #define DA9052_SECOND_B_REG 123 183 #define DA9052_SECOND_C_REG 124 184 #define DA9052_SECOND_D_REG 125 185 186 /* PAGE CONFIGURATION BIT */ 187 #define DA9052_PAGE_CONF 0X80 188 189 /* STATUS REGISTER A BITS */ 190 #define DA9052_STATUSA_VDATDET 0X80 191 #define DA9052_STATUSA_VBUSSEL 0X40 192 #define DA9052_STATUSA_DCINSEL 0X20 193 #define DA9052_STATUSA_VBUSDET 0X10 194 #define DA9052_STATUSA_DCINDET 0X08 195 #define DA9052_STATUSA_IDGND 0X04 196 #define DA9052_STATUSA_IDFLOAT 0X02 197 #define DA9052_STATUSA_NONKEY 0X01 198 199 /* STATUS REGISTER B BITS */ 200 #define DA9052_STATUSB_COMPDET 0X80 201 #define DA9052_STATUSB_SEQUENCING 0X40 202 #define DA9052_STATUSB_GPFB2 0X20 203 #define DA9052_STATUSB_CHGTO 0X10 204 #define DA9052_STATUSB_CHGEND 0X08 205 #define DA9052_STATUSB_CHGLIM 0X04 206 #define DA9052_STATUSB_CHGPRE 0X02 207 #define DA9052_STATUSB_CHGATT 0X01 208 209 /* STATUS REGISTER C BITS */ 210 #define DA9052_STATUSC_GPI7 0X80 211 #define DA9052_STATUSC_GPI6 0X40 212 #define DA9052_STATUSC_GPI5 0X20 213 #define DA9052_STATUSC_GPI4 0X10 214 #define DA9052_STATUSC_GPI3 0X08 215 #define DA9052_STATUSC_GPI2 0X04 216 #define DA9052_STATUSC_GPI1 0X02 217 #define DA9052_STATUSC_GPI0 0X01 218 219 /* STATUS REGISTER D BITS */ 220 #define DA9052_STATUSD_GPI15 0X80 221 #define DA9052_STATUSD_GPI14 0X40 222 #define DA9052_STATUSD_GPI13 0X20 223 #define DA9052_STATUSD_GPI12 0X10 224 #define DA9052_STATUSD_GPI11 0X08 225 #define DA9052_STATUSD_GPI10 0X04 226 #define DA9052_STATUSD_GPI9 0X02 227 #define DA9052_STATUSD_GPI8 0X01 228 229 /* EVENT REGISTER A BITS */ 230 #define DA9052_EVENTA_ECOMP1V2 0X80 231 #define DA9052_EVENTA_ESEQRDY 0X40 232 #define DA9052_EVENTA_EALRAM 0X20 233 #define DA9052_EVENTA_EVDDLOW 0X10 234 #define DA9052_EVENTA_EVBUSREM 0X08 235 #define DA9052_EVENTA_EDCINREM 0X04 236 #define DA9052_EVENTA_EVBUSDET 0X02 237 #define DA9052_EVENTA_EDCINDET 0X01 238 239 /* EVENT REGISTER B BITS */ 240 #define DA9052_EVENTB_ETSIREADY 0X80 241 #define DA9052_EVENTB_EPENDOWN 0X40 242 #define DA9052_EVENTB_EADCEOM 0X20 243 #define DA9052_EVENTB_ETBAT 0X10 244 #define DA9052_EVENTB_ECHGEND 0X08 245 #define DA9052_EVENTB_EIDGND 0X04 246 #define DA9052_EVENTB_EIDFLOAT 0X02 247 #define DA9052_EVENTB_ENONKEY 0X01 248 249 /* EVENT REGISTER C BITS */ 250 #define DA9052_EVENTC_EGPI7 0X80 251 #define DA9052_EVENTC_EGPI6 0X40 252 #define DA9052_EVENTC_EGPI5 0X20 253 #define DA9052_EVENTC_EGPI4 0X10 254 #define DA9052_EVENTC_EGPI3 0X08 255 #define DA9052_EVENTC_EGPI2 0X04 256 #define DA9052_EVENTC_EGPI1 0X02 257 #define DA9052_EVENTC_EGPI0 0X01 258 259 /* EVENT REGISTER D BITS */ 260 #define DA9052_EVENTD_EGPI15 0X80 261 #define DA9052_EVENTD_EGPI14 0X40 262 #define DA9052_EVENTD_EGPI13 0X20 263 #define DA9052_EVENTD_EGPI12 0X10 264 #define DA9052_EVENTD_EGPI11 0X08 265 #define DA9052_EVENTD_EGPI10 0X04 266 #define DA9052_EVENTD_EGPI9 0X02 267 #define DA9052_EVENTD_EGPI8 0X01 268 269 /* IRQ MASK REGISTERS BITS */ 270 #define DA9052_M_NONKEY 0X0100 271 272 /* TSI EVENT REGISTERS BITS */ 273 #define DA9052_E_PEN_DOWN 0X4000 274 #define DA9052_E_TSI_READY 0X8000 275 276 /* FAULT LOG REGISTER BITS */ 277 #define DA9052_FAULTLOG_WAITSET 0X80 278 #define DA9052_FAULTLOG_NSDSET 0X40 279 #define DA9052_FAULTLOG_KEYSHUT 0X20 280 #define DA9052_FAULTLOG_TEMPOVER 0X08 281 #define DA9052_FAULTLOG_VDDSTART 0X04 282 #define DA9052_FAULTLOG_VDDFAULT 0X02 283 #define DA9052_FAULTLOG_TWDERROR 0X01 284 285 /* CONTROL REGISTER A BITS */ 286 #define DA9052_CONTROLA_GPIV 0X80 287 #define DA9052_CONTROLA_PMOTYPE 0X20 288 #define DA9052_CONTROLA_PMOV 0X10 289 #define DA9052_CONTROLA_PMIV 0X08 290 #define DA9052_CONTROLA_PMIFV 0X08 291 #define DA9052_CONTROLA_PWR1EN 0X04 292 #define DA9052_CONTROLA_PWREN 0X02 293 #define DA9052_CONTROLA_SYSEN 0X01 294 295 /* CONTROL REGISTER B BITS */ 296 #define DA9052_CONTROLB_SHUTDOWN 0X80 297 #define DA9052_CONTROLB_DEEPSLEEP 0X40 298 #define DA9052_CONTROL_B_WRITEMODE 0X20 299 #define DA9052_CONTROLB_BBATEN 0X10 300 #define DA9052_CONTROLB_OTPREADEN 0X08 301 #define DA9052_CONTROLB_AUTOBOOT 0X04 302 #define DA9052_CONTROLB_ACTDIODE 0X02 303 #define DA9052_CONTROLB_BUCKMERGE 0X01 304 305 /* CONTROL REGISTER C BITS */ 306 #define DA9052_CONTROLC_BLINKDUR 0X80 307 #define DA9052_CONTROLC_BLINKFRQ 0X60 308 #define DA9052_CONTROLC_DEBOUNCING 0X1C 309 #define DA9052_CONTROLC_PMFB2PIN 0X02 310 #define DA9052_CONTROLC_PMFB1PIN 0X01 311 312 /* CONTROL REGISTER D BITS */ 313 #define DA9052_CONTROLD_WATCHDOG 0X80 314 #define DA9052_CONTROLD_ACCDETEN 0X40 315 #define DA9052_CONTROLD_GPI1415SD 0X20 316 #define DA9052_CONTROLD_NONKEYSD 0X10 317 #define DA9052_CONTROLD_KEEPACTEN 0X08 318 #define DA9052_CONTROLD_TWDSCALE 0X07 319 320 /* POWER DOWN DISABLE REGISTER BITS */ 321 #define DA9052_PDDIS_PMCONTPD 0X80 322 #define DA9052_PDDIS_OUT32KPD 0X40 323 #define DA9052_PDDIS_CHGBBATPD 0X20 324 #define DA9052_PDDIS_CHGPD 0X10 325 #define DA9052_PDDIS_HS2WIREPD 0X08 326 #define DA9052_PDDIS_PMIFPD 0X04 327 #define DA9052_PDDIS_GPADCPD 0X02 328 #define DA9052_PDDIS_GPIOPD 0X01 329 330 /* CONTROL REGISTER D BITS */ 331 #define DA9052_INTERFACE_IFBASEADDR 0XE0 332 #define DA9052_INTERFACE_NCSPOL 0X10 333 #define DA9052_INTERFACE_RWPOL 0X08 334 #define DA9052_INTERFACE_CPHA 0X04 335 #define DA9052_INTERFACE_CPOL 0X02 336 #define DA9052_INTERFACE_IFTYPE 0X01 337 338 /* CONTROL REGISTER D BITS */ 339 #define DA9052_RESET_RESETEVENT 0XC0 340 #define DA9052_RESET_RESETTIMER 0X3F 341 342 /* GPIO REGISTERS */ 343 /* GPIO CONTROL REGISTER BITS */ 344 #define DA9052_GPIO_EVEN_PORT_PIN 0X03 345 #define DA9052_GPIO_EVEN_PORT_TYPE 0X04 346 #define DA9052_GPIO_EVEN_PORT_MODE 0X08 347 348 #define DA9052_GPIO_ODD_PORT_PIN 0X30 349 #define DA9052_GPIO_ODD_PORT_TYPE 0X40 350 #define DA9052_GPIO_ODD_PORT_MODE 0X80 351 352 /*POWER SEQUENCER REGISTER BITS */ 353 /* SEQ CONTROL REGISTER BITS FOR ID 0 AND 1 */ 354 #define DA9052_ID01_LDO1STEP 0XF0 355 #define DA9052_ID01_SYSPRE 0X04 356 #define DA9052_ID01_DEFSUPPLY 0X02 357 #define DA9052_ID01_NRESMODE 0X01 358 359 /* SEQ CONTROL REGISTER BITS FOR ID 2 AND 3 */ 360 #define DA9052_ID23_LDO3STEP 0XF0 361 #define DA9052_ID23_LDO2STEP 0X0F 362 363 /* SEQ CONTROL REGISTER BITS FOR ID 4 AND 5 */ 364 #define DA9052_ID45_LDO5STEP 0XF0 365 #define DA9052_ID45_LDO4STEP 0X0F 366 367 /* SEQ CONTROL REGISTER BITS FOR ID 6 AND 7 */ 368 #define DA9052_ID67_LDO7STEP 0XF0 369 #define DA9052_ID67_LDO6STEP 0X0F 370 371 /* SEQ CONTROL REGISTER BITS FOR ID 8 AND 9 */ 372 #define DA9052_ID89_LDO9STEP 0XF0 373 #define DA9052_ID89_LDO8STEP 0X0F 374 375 /* SEQ CONTROL REGISTER BITS FOR ID 10 AND 11 */ 376 #define DA9052_ID1011_PDDISSTEP 0XF0 377 #define DA9052_ID1011_LDO10STEP 0X0F 378 379 /* SEQ CONTROL REGISTER BITS FOR ID 12 AND 13 */ 380 #define DA9052_ID1213_VMEMSWSTEP 0XF0 381 #define DA9052_ID1213_VPERISWSTEP 0X0F 382 383 /* SEQ CONTROL REGISTER BITS FOR ID 14 AND 15 */ 384 #define DA9052_ID1415_BUCKPROSTEP 0XF0 385 #define DA9052_ID1415_BUCKCORESTEP 0X0F 386 387 /* SEQ CONTROL REGISTER BITS FOR ID 16 AND 17 */ 388 #define DA9052_ID1617_BUCKPERISTEP 0XF0 389 #define DA9052_ID1617_BUCKMEMSTEP 0X0F 390 391 /* SEQ CONTROL REGISTER BITS FOR ID 18 AND 19 */ 392 #define DA9052_ID1819_GPRISE2STEP 0XF0 393 #define DA9052_ID1819_GPRISE1STEP 0X0F 394 395 /* SEQ CONTROL REGISTER BITS FOR ID 20 AND 21 */ 396 #define DA9052_ID2021_GPFALL2STEP 0XF0 397 #define DA9052_ID2021_GPFALL1STEP 0X0F 398 399 /* POWER SEQ STATUS REGISTER BITS */ 400 #define DA9052_SEQSTATUS_SEQPOINTER 0XF0 401 #define DA9052_SEQSTATUS_WAITSTEP 0X0F 402 403 /* POWER SEQ A REGISTER BITS */ 404 #define DA9052_SEQA_POWEREND 0XF0 405 #define DA9052_SEQA_SYSTEMEND 0X0F 406 407 /* POWER SEQ B REGISTER BITS */ 408 #define DA9052_SEQB_PARTDOWN 0XF0 409 #define DA9052_SEQB_MAXCOUNT 0X0F 410 411 /* POWER SEQ TIMER REGISTER BITS */ 412 #define DA9052_SEQTIMER_SEQDUMMY 0XF0 413 #define DA9052_SEQTIMER_SEQTIME 0X0F 414 415 /*POWER SUPPLY CONTROL REGISTER BITS */ 416 /* BUCK REGISTER A BITS */ 417 #define DA9052_BUCKA_BPROILIM 0XC0 418 #define DA9052_BUCKA_BPROMODE 0X30 419 #define DA9052_BUCKA_BCOREILIM 0X0C 420 #define DA9052_BUCKA_BCOREMODE 0X03 421 422 /* BUCK REGISTER B BITS */ 423 #define DA9052_BUCKB_BERIILIM 0XC0 424 #define DA9052_BUCKB_BPERIMODE 0X30 425 #define DA9052_BUCKB_BMEMILIM 0X0C 426 #define DA9052_BUCKB_BMEMMODE 0X03 427 428 /* BUCKCORE REGISTER BITS */ 429 #define DA9052_BUCKCORE_BCORECONF 0X80 430 #define DA9052_BUCKCORE_BCOREEN 0X40 431 #define DA9052_BUCKCORE_VBCORE 0X3F 432 433 /* BUCKPRO REGISTER BITS */ 434 #define DA9052_BUCKPRO_BPROCONF 0X80 435 #define DA9052_BUCKPRO_BPROEN 0X40 436 #define DA9052_BUCKPRO_VBPRO 0X3F 437 438 /* BUCKMEM REGISTER BITS */ 439 #define DA9052_BUCKMEM_BMEMCONF 0X80 440 #define DA9052_BUCKMEM_BMEMEN 0X40 441 #define DA9052_BUCKMEM_VBMEM 0X3F 442 443 /* BUCKPERI REGISTER BITS */ 444 #define DA9052_BUCKPERI_BPERICONF 0X80 445 #define DA9052_BUCKPERI_BPERIEN 0X40 446 #define DA9052_BUCKPERI_BPERIHS 0X20 447 #define DA9052_BUCKPERI_VBPERI 0X1F 448 449 /* LDO1 REGISTER BITS */ 450 #define DA9052_LDO1_LDO1CONF 0X80 451 #define DA9052_LDO1_LDO1EN 0X40 452 #define DA9052_LDO1_VLDO1 0X1F 453 454 /* LDO2 REGISTER BITS */ 455 #define DA9052_LDO2_LDO2CONF 0X80 456 #define DA9052_LDO2_LDO2EN 0X40 457 #define DA9052_LDO2_VLDO2 0X3F 458 459 /* LDO3 REGISTER BITS */ 460 #define DA9052_LDO3_LDO3CONF 0X80 461 #define DA9052_LDO3_LDO3EN 0X40 462 #define DA9052_LDO3_VLDO3 0X3F 463 464 /* LDO4 REGISTER BITS */ 465 #define DA9052_LDO4_LDO4CONF 0X80 466 #define DA9052_LDO4_LDO4EN 0X40 467 #define DA9052_LDO4_VLDO4 0X3F 468 469 /* LDO5 REGISTER BITS */ 470 #define DA9052_LDO5_LDO5CONF 0X80 471 #define DA9052_LDO5_LDO5EN 0X40 472 #define DA9052_LDO5_VLDO5 0X3F 473 474 /* LDO6 REGISTER BITS */ 475 #define DA9052_LDO6_LDO6CONF 0X80 476 #define DA9052_LDO6_LDO6EN 0X40 477 #define DA9052_LDO6_VLDO6 0X3F 478 479 /* LDO7 REGISTER BITS */ 480 #define DA9052_LDO7_LDO7CONF 0X80 481 #define DA9052_LDO7_LDO7EN 0X40 482 #define DA9052_LDO7_VLDO7 0X3F 483 484 /* LDO8 REGISTER BITS */ 485 #define DA9052_LDO8_LDO8CONF 0X80 486 #define DA9052_LDO8_LDO8EN 0X40 487 #define DA9052_LDO8_VLDO8 0X3F 488 489 /* LDO9 REGISTER BITS */ 490 #define DA9052_LDO9_LDO9CONF 0X80 491 #define DA9052_LDO9_LDO9EN 0X40 492 #define DA9052_LDO9_VLDO9 0X3F 493 494 /* LDO10 REGISTER BITS */ 495 #define DA9052_LDO10_LDO10CONF 0X80 496 #define DA9052_LDO10_LDO10EN 0X40 497 #define DA9052_LDO10_VLDO10 0X3F 498 499 /* SUPPLY REGISTER BITS */ 500 #define DA9052_SUPPLY_VLOCK 0X80 501 #define DA9052_SUPPLY_VMEMSWEN 0X40 502 #define DA9052_SUPPLY_VPERISWEN 0X20 503 #define DA9052_SUPPLY_VLDO3GO 0X10 504 #define DA9052_SUPPLY_VLDO2GO 0X08 505 #define DA9052_SUPPLY_VBMEMGO 0X04 506 #define DA9052_SUPPLY_VBPROGO 0X02 507 #define DA9052_SUPPLY_VBCOREGO 0X01 508 509 /* PULLDOWN REGISTER BITS */ 510 #define DA9052_PULLDOWN_LDO5PDDIS 0X20 511 #define DA9052_PULLDOWN_LDO2PDDIS 0X10 512 #define DA9052_PULLDOWN_LDO1PDDIS 0X08 513 #define DA9052_PULLDOWN_MEMPDDIS 0X04 514 #define DA9052_PULLDOWN_PROPDDIS 0X02 515 #define DA9052_PULLDOWN_COREPDDIS 0X01 516 517 /* BAT CHARGER REGISTER BITS */ 518 /* CHARGER BUCK REGISTER BITS */ 519 #define DA9052_CHGBUCK_CHGTEMP 0X80 520 #define DA9052_CHGBUCK_CHGUSBILIM 0X40 521 #define DA9052_CHGBUCK_CHGBUCKLP 0X20 522 #define DA9052_CHGBUCK_CHGBUCKEN 0X10 523 #define DA9052_CHGBUCK_ISETBUCK 0X0F 524 525 /* WAIT COUNTER REGISTER BITS */ 526 #define DA9052_WAITCONT_WAITDIR 0X80 527 #define DA9052_WAITCONT_RTCCLOCK 0X40 528 #define DA9052_WAITCONT_WAITMODE 0X20 529 #define DA9052_WAITCONT_EN32KOUT 0X10 530 #define DA9052_WAITCONT_DELAYTIME 0X0F 531 532 /* ISET CONTROL REGISTER BITS */ 533 #define DA9052_ISET_ISETDCIN 0XF0 534 #define DA9052_ISET_ISETVBUS 0X0F 535 536 /* BATTERY CHARGER CONTROL REGISTER BITS */ 537 #define DA9052_BATCHG_ICHGPRE 0XC0 538 #define DA9052_BATCHG_ICHGBAT 0X3F 539 540 /* CHARGER COUNTER REGISTER BITS */ 541 #define DA9052_CHG_CONT_VCHG_BAT 0XF8 542 #define DA9052_CHG_CONT_TCTR 0X07 543 544 /* INPUT CONTROL REGISTER BITS */ 545 #define DA9052_INPUT_CONT_TCTR_MODE 0X80 546 #define DA9052_INPUT_CONT_VBUS_SUSP 0X10 547 #define DA9052_INPUT_CONT_DCIN_SUSP 0X08 548 549 /* CHARGING TIME REGISTER BITS */ 550 #define DA9052_CHGTIME_CHGTIME 0XFF 551 552 /* BACKUP BATTERY CONTROL REGISTER BITS */ 553 #define DA9052_BBATCONT_BCHARGERISET 0XF0 554 #define DA9052_BBATCONT_BCHARGERVSET 0X0F 555 556 /* LED REGISTERS BITS */ 557 /* LED BOOST REGISTER BITS */ 558 #define DA9052_BOOST_EBFAULT 0X80 559 #define DA9052_BOOST_MBFAULT 0X40 560 #define DA9052_BOOST_BOOSTFRQ 0X20 561 #define DA9052_BOOST_BOOSTILIM 0X10 562 #define DA9052_BOOST_LED3INEN 0X08 563 #define DA9052_BOOST_LED2INEN 0X04 564 #define DA9052_BOOST_LED1INEN 0X02 565 #define DA9052_BOOST_BOOSTEN 0X01 566 567 /* LED CONTROL REGISTER BITS */ 568 #define DA9052_LEDCONT_SELLEDMODE 0X80 569 #define DA9052_LEDCONT_LED3ICONT 0X40 570 #define DA9052_LEDCONT_LED3RAMP 0X20 571 #define DA9052_LEDCONT_LED3EN 0X10 572 #define DA9052_LEDCONT_LED2RAMP 0X08 573 #define DA9052_LEDCONT_LED2EN 0X04 574 #define DA9052_LEDCONT_LED1RAMP 0X02 575 #define DA9052_LEDCONT_LED1EN 0X01 576 577 /* LEDMIN123 REGISTER BIT */ 578 #define DA9052_LEDMIN123_LEDMINCURRENT 0XFF 579 580 /* LED1CONF REGISTER BIT */ 581 #define DA9052_LED1CONF_LED1CURRENT 0XFF 582 583 /* LED2CONF REGISTER BIT */ 584 #define DA9052_LED2CONF_LED2CURRENT 0XFF 585 586 /* LED3CONF REGISTER BIT */ 587 #define DA9052_LED3CONF_LED3CURRENT 0XFF 588 589 /* LED COUNT REGISTER BIT */ 590 #define DA9052_LED_CONT_DIM 0X80 591 592 /* ADC MAN REGISTERS BITS */ 593 #define DA9052_ADC_MAN_MAN_CONV 0X10 594 #define DA9052_ADC_MAN_MUXSEL_VDDOUT 0X00 595 #define DA9052_ADC_MAN_MUXSEL_ICH 0X01 596 #define DA9052_ADC_MAN_MUXSEL_TBAT 0X02 597 #define DA9052_ADC_MAN_MUXSEL_VBAT 0X03 598 #define DA9052_ADC_MAN_MUXSEL_AD4 0X04 599 #define DA9052_ADC_MAN_MUXSEL_AD5 0X05 600 #define DA9052_ADC_MAN_MUXSEL_AD6 0X06 601 #define DA9052_ADC_MAN_MUXSEL_VBBAT 0X09 602 603 /* ADC CONTROL REGSISTERS BITS */ 604 #define DA9052_ADCCONT_COMP1V2EN 0X80 605 #define DA9052_ADCCONT_ADCMODE 0X40 606 #define DA9052_ADCCONT_TBATISRCEN 0X20 607 #define DA9052_ADCCONT_AD4ISRCEN 0X10 608 #define DA9052_ADCCONT_AUTOAD6EN 0X08 609 #define DA9052_ADCCONT_AUTOAD5EN 0X04 610 #define DA9052_ADCCONT_AUTOAD4EN 0X02 611 #define DA9052_ADCCONT_AUTOVDDEN 0X01 612 613 /* ADC 10 BIT MANUAL CONVERSION RESULT LOW REGISTER */ 614 #define DA9052_ADC_RES_LSB 0X03 615 616 /* ADC 10 BIT MANUAL CONVERSION RESULT HIGH REGISTER */ 617 #define DA9052_ADCRESH_ADCRESMSB 0XFF 618 619 /* VDD RES REGSISTER BIT*/ 620 #define DA9052_VDDRES_VDDOUTRES 0XFF 621 622 /* VDD MON REGSISTER BIT */ 623 #define DA9052_VDDMON_VDDOUTMON 0XFF 624 625 /* ICHG_AV REGSISTER BIT */ 626 #define DA9052_ICHGAV_ICHGAV 0XFF 627 628 /* ICHG_THD REGSISTER BIT */ 629 #define DA9052_ICHGTHD_ICHGTHD 0XFF 630 631 /* ICHG_END REGSISTER BIT */ 632 #define DA9052_ICHGEND_ICHGEND 0XFF 633 634 /* TBAT_RES REGSISTER BIT */ 635 #define DA9052_TBATRES_TBATRES 0XFF 636 637 /* TBAT_HIGHP REGSISTER BIT */ 638 #define DA9052_TBATHIGHP_TBATHIGHP 0XFF 639 640 /* TBAT_HIGHN REGSISTER BIT */ 641 #define DA9052_TBATHIGHN_TBATHIGHN 0XFF 642 643 /* TBAT_LOW REGSISTER BIT */ 644 #define DA9052_TBATLOW_TBATLOW 0XFF 645 646 /* T_OFFSET REGSISTER BIT */ 647 #define DA9052_TOFFSET_TOFFSET 0XFF 648 649 /* ADCIN4_RES REGSISTER BIT */ 650 #define DA9052_ADCIN4RES_ADCIN4RES 0XFF 651 652 /* ADCIN4_HIGH REGSISTER BIT */ 653 #define DA9052_AUTO4HIGH_AUTO4HIGH 0XFF 654 655 /* ADCIN4_LOW REGSISTER BIT */ 656 #define DA9052_AUTO4LOW_AUTO4LOW 0XFF 657 658 /* ADCIN5_RES REGSISTER BIT */ 659 #define DA9052_ADCIN5RES_ADCIN5RES 0XFF 660 661 /* ADCIN5_HIGH REGSISTER BIT */ 662 #define DA9052_AUTO5HIGH_AUTOHIGH 0XFF 663 664 /* ADCIN5_LOW REGSISTER BIT */ 665 #define DA9052_AUTO5LOW_AUTO5LOW 0XFF 666 667 /* ADCIN6_RES REGSISTER BIT */ 668 #define DA9052_ADCIN6RES_ADCIN6RES 0XFF 669 670 /* ADCIN6_HIGH REGSISTER BIT */ 671 #define DA9052_AUTO6HIGH_AUTO6HIGH 0XFF 672 673 /* ADCIN6_LOW REGSISTER BIT */ 674 #define DA9052_AUTO6LOW_AUTO6LOW 0XFF 675 676 /* TJUNC_RES REGSISTER BIT*/ 677 #define DA9052_TJUNCRES_TJUNCRES 0XFF 678 679 /* TSI REGISTER */ 680 /* TSI CONTROL REGISTER A BITS */ 681 #define DA9052_TSICONTA_TSIDELAY 0XC0 682 #define DA9052_TSICONTA_TSISKIP 0X38 683 #define DA9052_TSICONTA_TSIMODE 0X04 684 #define DA9052_TSICONTA_PENDETEN 0X02 685 #define DA9052_TSICONTA_AUTOTSIEN 0X01 686 687 /* TSI CONTROL REGISTER B BITS */ 688 #define DA9052_TSICONTB_ADCREF 0X80 689 #define DA9052_TSICONTB_TSIMAN 0X40 690 #define DA9052_TSICONTB_TSIMUX 0X30 691 #define DA9052_TSICONTB_TSISEL3 0X08 692 #define DA9052_TSICONTB_TSISEL2 0X04 693 #define DA9052_TSICONTB_TSISEL1 0X02 694 #define DA9052_TSICONTB_TSISEL0 0X01 695 696 /* TSI X CO-ORDINATE MSB RESULT REGISTER BITS */ 697 #define DA9052_TSIXMSB_TSIXM 0XFF 698 699 /* TSI Y CO-ORDINATE MSB RESULT REGISTER BITS */ 700 #define DA9052_TSIYMSB_TSIYM 0XFF 701 702 /* TSI CO-ORDINATE LSB RESULT REGISTER BITS */ 703 #define DA9052_TSILSB_PENDOWN 0X40 704 #define DA9052_TSILSB_TSIZL 0X30 705 #define DA9052_TSILSB_TSIYL 0X0C 706 #define DA9052_TSILSB_TSIXL 0X03 707 708 /* TSI Z MEASUREMENT MSB RESULT REGISTER BIT */ 709 #define DA9052_TSIZMSB_TSIZM 0XFF 710 711 /* RTC REGISTER */ 712 /* RTC TIMER SECONDS REGISTER BITS */ 713 #define DA9052_COUNTS_MONITOR 0X40 714 #define DA9052_RTC_SEC 0X3F 715 716 /* RTC TIMER MINUTES REGISTER BIT */ 717 #define DA9052_RTC_MIN 0X3F 718 719 /* RTC TIMER HOUR REGISTER BIT */ 720 #define DA9052_RTC_HOUR 0X1F 721 722 /* RTC TIMER DAYS REGISTER BIT */ 723 #define DA9052_RTC_DAY 0X1F 724 725 /* RTC TIMER MONTHS REGISTER BIT */ 726 #define DA9052_RTC_MONTH 0X0F 727 728 /* RTC TIMER YEARS REGISTER BIT */ 729 #define DA9052_RTC_YEAR 0X3F 730 731 /* RTC ALARM MINUTES REGISTER BITS */ 732 #define DA9052_ALARMM_I_TICK_TYPE 0X80 733 #define DA9052_ALARMMI_ALARMTYPE 0X40 734 735 /* RTC ALARM YEARS REGISTER BITS */ 736 #define DA9052_ALARM_Y_TICK_ON 0X80 737 #define DA9052_ALARM_Y_ALARM_ON 0X40 738 739 /* RTC SECONDS REGISTER A BITS */ 740 #define DA9052_SECONDA_SECONDSA 0XFF 741 742 /* RTC SECONDS REGISTER B BITS */ 743 #define DA9052_SECONDB_SECONDSB 0XFF 744 745 /* RTC SECONDS REGISTER C BITS */ 746 #define DA9052_SECONDC_SECONDSC 0XFF 747 748 /* RTC SECONDS REGISTER D BITS */ 749 #define DA9052_SECONDD_SECONDSD 0XFF 750 751 #endif 752 /* __LINUX_MFD_DA9052_REG_H */ 753