1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Support code for Analog Devices Sigma-Delta ADCs 4 * 5 * Copyright 2012 Analog Devices Inc. 6 * Author: Lars-Peter Clausen <lars@metafoo.de> 7 */ 8 #ifndef __AD_SIGMA_DELTA_H__ 9 #define __AD_SIGMA_DELTA_H__ 10 11 enum ad_sigma_delta_mode { 12 AD_SD_MODE_CONTINUOUS = 0, 13 AD_SD_MODE_SINGLE = 1, 14 AD_SD_MODE_IDLE = 2, 15 AD_SD_MODE_POWERDOWN = 3, 16 }; 17 18 /** 19 * struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices 20 * @mode: Calibration mode. 21 * @channel: Calibration channel. 22 */ 23 struct ad_sd_calib_data { 24 unsigned int mode; 25 unsigned int channel; 26 }; 27 28 struct ad_sigma_delta; 29 struct iio_dev; 30 31 /** 32 * struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options 33 * @set_channel: Will be called to select the current channel, may be NULL. 34 * @set_mode: Will be called to select the current mode, may be NULL. 35 * @postprocess_sample: Is called for each sampled data word, can be used to 36 * modify or drop the sample data, it, may be NULL. 37 * @has_registers: true if the device has writable and readable registers, false 38 * if there is just one read-only sample data shift register. 39 * @addr_shift: Shift of the register address in the communications register. 40 * @read_mask: Mask for the communications register having the read bit set. 41 * @data_reg: Address of the data register, if 0 the default address of 0x3 will 42 * be used. 43 * @irq_flags: flags for the interrupt used by the triggered buffer 44 */ 45 struct ad_sigma_delta_info { 46 int (*set_channel)(struct ad_sigma_delta *, unsigned int channel); 47 int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode); 48 int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample); 49 bool has_registers; 50 unsigned int addr_shift; 51 unsigned int read_mask; 52 unsigned int data_reg; 53 unsigned long irq_flags; 54 }; 55 56 /** 57 * struct ad_sigma_delta - Sigma Delta device struct 58 * @spi: The spi device associated with the Sigma Delta device. 59 * @trig: The IIO trigger associated with the Sigma Delta device. 60 * 61 * Most of the fields are private to the sigma delta library code and should not 62 * be accessed by individual drivers. 63 */ 64 struct ad_sigma_delta { 65 struct spi_device *spi; 66 struct iio_trigger *trig; 67 68 /* private: */ 69 struct completion completion; 70 bool irq_dis; 71 72 bool bus_locked; 73 bool keep_cs_asserted; 74 75 uint8_t comm; 76 77 const struct ad_sigma_delta_info *info; 78 79 /* 80 * DMA (thus cache coherency maintenance) requires the 81 * transfer buffers to live in their own cache lines. 82 */ 83 uint8_t data[4] ____cacheline_aligned; 84 }; 85 86 static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd, 87 unsigned int channel) 88 { 89 if (sd->info->set_channel) 90 return sd->info->set_channel(sd, channel); 91 92 return 0; 93 } 94 95 static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd, 96 unsigned int mode) 97 { 98 if (sd->info->set_mode) 99 return sd->info->set_mode(sd, mode); 100 101 return 0; 102 } 103 104 static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd, 105 unsigned int raw_sample) 106 { 107 if (sd->info->postprocess_sample) 108 return sd->info->postprocess_sample(sd, raw_sample); 109 110 return 0; 111 } 112 113 void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm); 114 int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, 115 unsigned int size, unsigned int val); 116 int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, 117 unsigned int size, unsigned int *val); 118 119 int ad_sd_reset(struct ad_sigma_delta *sigma_delta, 120 unsigned int reset_length); 121 122 int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, 123 const struct iio_chan_spec *chan, int *val); 124 int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, 125 unsigned int mode, unsigned int channel); 126 int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta, 127 const struct ad_sd_calib_data *cd, unsigned int n); 128 int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, 129 struct spi_device *spi, const struct ad_sigma_delta_info *info); 130 131 int ad_sd_setup_buffer_and_trigger(struct iio_dev *indio_dev); 132 void ad_sd_cleanup_buffer_and_trigger(struct iio_dev *indio_dev); 133 134 int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig); 135 136 #define __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 137 _storagebits, _shift, _extend_name, _type, _mask_all) \ 138 { \ 139 .type = (_type), \ 140 .differential = (_channel2 == -1 ? 0 : 1), \ 141 .indexed = 1, \ 142 .channel = (_channel1), \ 143 .channel2 = (_channel2), \ 144 .address = (_address), \ 145 .extend_name = (_extend_name), \ 146 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 147 BIT(IIO_CHAN_INFO_OFFSET), \ 148 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 149 .info_mask_shared_by_all = _mask_all, \ 150 .scan_index = (_si), \ 151 .scan_type = { \ 152 .sign = 'u', \ 153 .realbits = (_bits), \ 154 .storagebits = (_storagebits), \ 155 .shift = (_shift), \ 156 .endianness = IIO_BE, \ 157 }, \ 158 } 159 160 #define AD_SD_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 161 _storagebits, _shift) \ 162 __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \ 163 _storagebits, _shift, NULL, IIO_VOLTAGE, \ 164 BIT(IIO_CHAN_INFO_SAMP_FREQ)) 165 166 #define AD_SD_SHORTED_CHANNEL(_si, _channel, _address, _bits, \ 167 _storagebits, _shift) \ 168 __AD_SD_CHANNEL(_si, _channel, _channel, _address, _bits, \ 169 _storagebits, _shift, "shorted", IIO_VOLTAGE, \ 170 BIT(IIO_CHAN_INFO_SAMP_FREQ)) 171 172 #define AD_SD_CHANNEL(_si, _channel, _address, _bits, \ 173 _storagebits, _shift) \ 174 __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ 175 _storagebits, _shift, NULL, IIO_VOLTAGE, \ 176 BIT(IIO_CHAN_INFO_SAMP_FREQ)) 177 178 #define AD_SD_CHANNEL_NO_SAMP_FREQ(_si, _channel, _address, _bits, \ 179 _storagebits, _shift) \ 180 __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ 181 _storagebits, _shift, NULL, IIO_VOLTAGE, 0) 182 183 #define AD_SD_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \ 184 __AD_SD_CHANNEL(_si, 0, -1, _address, _bits, \ 185 _storagebits, _shift, NULL, IIO_TEMP, \ 186 BIT(IIO_CHAN_INFO_SAMP_FREQ)) 187 188 #define AD_SD_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \ 189 _shift) \ 190 __AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \ 191 _storagebits, _shift, "supply", IIO_VOLTAGE, \ 192 BIT(IIO_CHAN_INFO_SAMP_FREQ)) 193 194 #endif 195