1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. 4 */ 5 6 #ifndef __LINUX_CLK_TEGRA_H_ 7 #define __LINUX_CLK_TEGRA_H_ 8 9 #include <linux/types.h> 10 #include <linux/bug.h> 11 12 /* 13 * Tegra CPU clock and reset control ops 14 * 15 * wait_for_reset: 16 * keep waiting until the CPU in reset state 17 * put_in_reset: 18 * put the CPU in reset state 19 * out_of_reset: 20 * release the CPU from reset state 21 * enable_clock: 22 * CPU clock un-gate 23 * disable_clock: 24 * CPU clock gate 25 * rail_off_ready: 26 * CPU is ready for rail off 27 * suspend: 28 * save the clock settings when CPU go into low-power state 29 * resume: 30 * restore the clock settings when CPU exit low-power state 31 */ 32 struct tegra_cpu_car_ops { 33 void (*wait_for_reset)(u32 cpu); 34 void (*put_in_reset)(u32 cpu); 35 void (*out_of_reset)(u32 cpu); 36 void (*enable_clock)(u32 cpu); 37 void (*disable_clock)(u32 cpu); 38 #ifdef CONFIG_PM_SLEEP 39 bool (*rail_off_ready)(void); 40 void (*suspend)(void); 41 void (*resume)(void); 42 #endif 43 }; 44 45 extern struct tegra_cpu_car_ops *tegra_cpu_car_ops; 46 47 static inline void tegra_wait_cpu_in_reset(u32 cpu) 48 { 49 if (WARN_ON(!tegra_cpu_car_ops->wait_for_reset)) 50 return; 51 52 tegra_cpu_car_ops->wait_for_reset(cpu); 53 } 54 55 static inline void tegra_put_cpu_in_reset(u32 cpu) 56 { 57 if (WARN_ON(!tegra_cpu_car_ops->put_in_reset)) 58 return; 59 60 tegra_cpu_car_ops->put_in_reset(cpu); 61 } 62 63 static inline void tegra_cpu_out_of_reset(u32 cpu) 64 { 65 if (WARN_ON(!tegra_cpu_car_ops->out_of_reset)) 66 return; 67 68 tegra_cpu_car_ops->out_of_reset(cpu); 69 } 70 71 static inline void tegra_enable_cpu_clock(u32 cpu) 72 { 73 if (WARN_ON(!tegra_cpu_car_ops->enable_clock)) 74 return; 75 76 tegra_cpu_car_ops->enable_clock(cpu); 77 } 78 79 static inline void tegra_disable_cpu_clock(u32 cpu) 80 { 81 if (WARN_ON(!tegra_cpu_car_ops->disable_clock)) 82 return; 83 84 tegra_cpu_car_ops->disable_clock(cpu); 85 } 86 87 #ifdef CONFIG_PM_SLEEP 88 static inline bool tegra_cpu_rail_off_ready(void) 89 { 90 if (WARN_ON(!tegra_cpu_car_ops->rail_off_ready)) 91 return false; 92 93 return tegra_cpu_car_ops->rail_off_ready(); 94 } 95 96 static inline void tegra_cpu_clock_suspend(void) 97 { 98 if (WARN_ON(!tegra_cpu_car_ops->suspend)) 99 return; 100 101 tegra_cpu_car_ops->suspend(); 102 } 103 104 static inline void tegra_cpu_clock_resume(void) 105 { 106 if (WARN_ON(!tegra_cpu_car_ops->resume)) 107 return; 108 109 tegra_cpu_car_ops->resume(); 110 } 111 #endif 112 113 extern void tegra210_xusb_pll_hw_control_enable(void); 114 extern void tegra210_xusb_pll_hw_sequence_start(void); 115 extern void tegra210_sata_pll_hw_control_enable(void); 116 extern void tegra210_sata_pll_hw_sequence_start(void); 117 extern void tegra210_set_sata_pll_seq_sw(bool state); 118 extern void tegra210_put_utmipll_in_iddq(void); 119 extern void tegra210_put_utmipll_out_iddq(void); 120 extern int tegra210_clk_handle_mbist_war(unsigned int id); 121 122 #endif /* __LINUX_CLK_TEGRA_H_ */ 123