1 /* 2 * cs42l42.h -- CS42L42 ALSA SoC audio driver DT bindings header 3 * 4 * Copyright 2016 Cirrus Logic, Inc. 5 * 6 * Author: James Schulman <james.schulman@cirrus.com> 7 * Author: Brian Austin <brian.austin@cirrus.com> 8 * Author: Michael White <michael.white@cirrus.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 */ 15 16 #ifndef __DT_CS42L42_H 17 #define __DT_CS42L42_H 18 19 /* HPOUT Load Capacity */ 20 #define CS42L42_HPOUT_LOAD_1NF 0 21 #define CS42L42_HPOUT_LOAD_10NF 1 22 23 /* HPOUT Clamp to GND Override */ 24 #define CS42L42_HPOUT_CLAMP_EN 0 25 #define CS42L42_HPOUT_CLAMP_DIS 1 26 27 /* Tip Sense Inversion */ 28 #define CS42L42_TS_INV_DIS 0 29 #define CS42L42_TS_INV_EN 1 30 31 /* Tip Sense Debounce */ 32 #define CS42L42_TS_DBNCE_0 0 33 #define CS42L42_TS_DBNCE_125 1 34 #define CS42L42_TS_DBNCE_250 2 35 #define CS42L42_TS_DBNCE_500 3 36 #define CS42L42_TS_DBNCE_750 4 37 #define CS42L42_TS_DBNCE_1000 5 38 #define CS42L42_TS_DBNCE_1250 6 39 #define CS42L42_TS_DBNCE_1500 7 40 41 /* Button Press Software Debounce Times */ 42 #define CS42L42_BTN_DET_INIT_DBNCE_MIN 0 43 #define CS42L42_BTN_DET_INIT_DBNCE_DEFAULT 100 44 #define CS42L42_BTN_DET_INIT_DBNCE_MAX 200 45 46 #define CS42L42_BTN_DET_EVENT_DBNCE_MIN 0 47 #define CS42L42_BTN_DET_EVENT_DBNCE_DEFAULT 10 48 #define CS42L42_BTN_DET_EVENT_DBNCE_MAX 20 49 50 /* Button Detect Level Sensitivities */ 51 #define CS42L42_NUM_BIASES 4 52 53 #define CS42L42_HS_DET_LEVEL_15 0x0F 54 #define CS42L42_HS_DET_LEVEL_8 0x08 55 #define CS42L42_HS_DET_LEVEL_4 0x04 56 #define CS42L42_HS_DET_LEVEL_1 0x01 57 58 #define CS42L42_HS_DET_LEVEL_MIN 0 59 #define CS42L42_HS_DET_LEVEL_MAX 0x3F 60 61 /* HS Bias Ramp Rate */ 62 63 #define CS42L42_HSBIAS_RAMP_FAST_RISE_SLOW_FALL 0 64 #define CS42L42_HSBIAS_RAMP_FAST 1 65 #define CS42L42_HSBIAS_RAMP_SLOW 2 66 #define CS42L42_HSBIAS_RAMP_SLOWEST 3 67 68 #define CS42L42_HSBIAS_RAMP_TIME0 10 69 #define CS42L42_HSBIAS_RAMP_TIME1 40 70 #define CS42L42_HSBIAS_RAMP_TIME2 90 71 #define CS42L42_HSBIAS_RAMP_TIME3 170 72 73 #endif /* __DT_CS42L42_H */ 74