1 /* 2 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved. 3 * Copyright 2008 Luotao Fu, kernel@pengutronix.de 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/platform_device.h> 23 #include <linux/clk.h> 24 #include <linux/slab.h> 25 #include <linux/delay.h> 26 #include <linux/io.h> 27 28 #include "../w1.h" 29 #include "../w1_int.h" 30 #include "../w1_log.h" 31 32 /* According to the mx27 Datasheet the reset procedure should take up to about 33 * 1350us. We set the timeout to 500*100us = 50ms for sure */ 34 #define MXC_W1_RESET_TIMEOUT 500 35 36 /* 37 * MXC W1 Register offsets 38 */ 39 #define MXC_W1_CONTROL 0x00 40 #define MXC_W1_TIME_DIVIDER 0x02 41 #define MXC_W1_RESET 0x04 42 #define MXC_W1_COMMAND 0x06 43 #define MXC_W1_TXRX 0x08 44 #define MXC_W1_INTERRUPT 0x0A 45 #define MXC_W1_INTERRUPT_EN 0x0C 46 47 struct mxc_w1_device { 48 void __iomem *regs; 49 unsigned int clkdiv; 50 struct clk *clk; 51 struct w1_bus_master bus_master; 52 }; 53 54 /* 55 * this is the low level routine to 56 * reset the device on the One Wire interface 57 * on the hardware 58 */ 59 static u8 mxc_w1_ds2_reset_bus(void *data) 60 { 61 u8 reg_val; 62 unsigned int timeout_cnt = 0; 63 struct mxc_w1_device *dev = data; 64 65 __raw_writeb(0x80, (dev->regs + MXC_W1_CONTROL)); 66 67 while (1) { 68 reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL); 69 70 if (((reg_val >> 7) & 0x1) == 0 || 71 timeout_cnt > MXC_W1_RESET_TIMEOUT) 72 break; 73 else 74 timeout_cnt++; 75 76 udelay(100); 77 } 78 return (reg_val >> 7) & 0x1; 79 } 80 81 /* 82 * this is the low level routine to read/write a bit on the One Wire 83 * interface on the hardware. It does write 0 if parameter bit is set 84 * to 0, otherwise a write 1/read. 85 */ 86 static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit) 87 { 88 struct mxc_w1_device *mdev = data; 89 void __iomem *ctrl_addr = mdev->regs + MXC_W1_CONTROL; 90 unsigned int timeout_cnt = 400; /* Takes max. 120us according to 91 * datasheet. 92 */ 93 94 __raw_writeb((1 << (5 - bit)), ctrl_addr); 95 96 while (timeout_cnt--) { 97 if (!((__raw_readb(ctrl_addr) >> (5 - bit)) & 0x1)) 98 break; 99 100 udelay(1); 101 } 102 103 return ((__raw_readb(ctrl_addr)) >> 3) & 0x1; 104 } 105 106 static int __devinit mxc_w1_probe(struct platform_device *pdev) 107 { 108 struct mxc_w1_device *mdev; 109 struct resource *res; 110 int err = 0; 111 112 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 113 if (!res) 114 return -ENODEV; 115 116 mdev = kzalloc(sizeof(struct mxc_w1_device), GFP_KERNEL); 117 if (!mdev) 118 return -ENOMEM; 119 120 mdev->clk = clk_get(&pdev->dev, "owire"); 121 if (!mdev->clk) { 122 err = -ENODEV; 123 goto failed_clk; 124 } 125 126 mdev->clkdiv = (clk_get_rate(mdev->clk) / 1000000) - 1; 127 128 res = request_mem_region(res->start, resource_size(res), 129 "mxc_w1"); 130 if (!res) { 131 err = -EBUSY; 132 goto failed_req; 133 } 134 135 mdev->regs = ioremap(res->start, resource_size(res)); 136 if (!mdev->regs) { 137 printk(KERN_ERR "Cannot map frame buffer registers\n"); 138 goto failed_ioremap; 139 } 140 141 clk_prepare_enable(mdev->clk); 142 __raw_writeb(mdev->clkdiv, mdev->regs + MXC_W1_TIME_DIVIDER); 143 144 mdev->bus_master.data = mdev; 145 mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus; 146 mdev->bus_master.touch_bit = mxc_w1_ds2_touch_bit; 147 148 err = w1_add_master_device(&mdev->bus_master); 149 150 if (err) 151 goto failed_add; 152 153 platform_set_drvdata(pdev, mdev); 154 return 0; 155 156 failed_add: 157 iounmap(mdev->regs); 158 failed_ioremap: 159 release_mem_region(res->start, resource_size(res)); 160 failed_req: 161 clk_put(mdev->clk); 162 failed_clk: 163 kfree(mdev); 164 return err; 165 } 166 167 /* 168 * disassociate the w1 device from the driver 169 */ 170 static int __devexit mxc_w1_remove(struct platform_device *pdev) 171 { 172 struct mxc_w1_device *mdev = platform_get_drvdata(pdev); 173 struct resource *res; 174 175 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 176 177 w1_remove_master_device(&mdev->bus_master); 178 179 iounmap(mdev->regs); 180 release_mem_region(res->start, resource_size(res)); 181 clk_disable_unprepare(mdev->clk); 182 clk_put(mdev->clk); 183 184 platform_set_drvdata(pdev, NULL); 185 186 return 0; 187 } 188 189 static struct platform_driver mxc_w1_driver = { 190 .driver = { 191 .name = "mxc_w1", 192 }, 193 .probe = mxc_w1_probe, 194 .remove = mxc_w1_remove, 195 }; 196 197 static int __init mxc_w1_init(void) 198 { 199 return platform_driver_register(&mxc_w1_driver); 200 } 201 202 static void mxc_w1_exit(void) 203 { 204 platform_driver_unregister(&mxc_w1_driver); 205 } 206 207 module_init(mxc_w1_init); 208 module_exit(mxc_w1_exit); 209 210 MODULE_LICENSE("GPL"); 211 MODULE_AUTHOR("Freescale Semiconductors Inc"); 212 MODULE_DESCRIPTION("Driver for One-Wire on MXC"); 213