xref: /linux/drivers/video/fbdev/grvga.c (revision f8941e6c4c712948663ec5d7bbb546f1a0f4e3f6)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Driver for Aeroflex Gaisler SVGACTRL framebuffer device.
4  *
5  * 2011 (c) Aeroflex Gaisler AB
6  *
7  * Full documentation of the core can be found here:
8  * https://www.gaisler.com/products/grlib/grip.pdf
9  *
10  * Contributors: Kristoffer Glembo <kristoffer@gaisler.com>
11  */
12 
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/of.h>
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/string.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/slab.h>
23 #include <linux/tty.h>
24 #include <linux/mm.h>
25 #include <linux/fb.h>
26 #include <linux/io.h>
27 
28 struct grvga_regs {
29 	u32 status; 		/* 0x00 */
30 	u32 video_length; 	/* 0x04 */
31 	u32 front_porch;	/* 0x08 */
32 	u32 sync_length;	/* 0x0C */
33 	u32 line_length;	/* 0x10 */
34 	u32 fb_pos;		/* 0x14 */
35 	u32 clk_vector[4];	/* 0x18 */
36 	u32 clut;	        /* 0x20 */
37 };
38 
39 struct grvga_par {
40 	struct grvga_regs *regs;
41 	u32 color_palette[16];  /* 16 entry pseudo palette used by fbcon in true color mode */
42 	int clk_sel;
43 	int fb_alloced;         /* = 1 if framebuffer is allocated in main memory */
44 };
45 
46 
47 static const struct fb_videomode grvga_modedb[] = {
48     {
49 	/* 640x480 @ 60 Hz */
50 	NULL, 60, 640, 480, 40000, 48, 16, 39, 11, 96, 2,
51 	0, FB_VMODE_NONINTERLACED
52     }, {
53 	/* 800x600 @ 60 Hz */
54 	NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4,
55 	0, FB_VMODE_NONINTERLACED
56     }, {
57 	/* 800x600 @ 72 Hz */
58 	NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6,
59 	0, FB_VMODE_NONINTERLACED
60     }, {
61 	/* 1024x768 @ 60 Hz */
62 	NULL, 60, 1024, 768, 15385, 160, 24, 29, 3, 136, 6,
63 	0, FB_VMODE_NONINTERLACED
64     }
65  };
66 
67 static const struct fb_fix_screeninfo grvga_fix = {
68 	.id =		"AG SVGACTRL",
69 	.type =		FB_TYPE_PACKED_PIXELS,
70 	.visual =       FB_VISUAL_PSEUDOCOLOR,
71 	.xpanstep =	0,
72 	.ypanstep =	1,
73 	.ywrapstep =	0,
74 	.accel =	FB_ACCEL_NONE,
75 };
76 
77 static int grvga_check_var(struct fb_var_screeninfo *var,
78 			   struct fb_info *info)
79 {
80 	struct grvga_par *par = info->par;
81 	int i;
82 
83 	if (!var->xres)
84 		var->xres = 1;
85 	if (!var->yres)
86 		var->yres = 1;
87 	if (var->bits_per_pixel <= 8)
88 		var->bits_per_pixel = 8;
89 	else if (var->bits_per_pixel <= 16)
90 		var->bits_per_pixel = 16;
91 	else if (var->bits_per_pixel <= 24)
92 		var->bits_per_pixel = 24;
93 	else if (var->bits_per_pixel <= 32)
94 		var->bits_per_pixel = 32;
95 	else
96 		return -EINVAL;
97 
98 	var->xres_virtual = var->xres;
99 	var->yres_virtual = 2*var->yres;
100 
101 	if (info->fix.smem_len) {
102 		if ((var->yres_virtual*var->xres_virtual*var->bits_per_pixel/8) > info->fix.smem_len)
103 			return -ENOMEM;
104 	}
105 
106 	/* Which clocks that are available can be read out in these registers */
107 	for (i = 0; i <= 3 ; i++) {
108 		if (var->pixclock == par->regs->clk_vector[i])
109 			break;
110 	}
111 	if (i <= 3)
112 		par->clk_sel = i;
113 	else
114 		return -EINVAL;
115 
116 	switch (info->var.bits_per_pixel) {
117 	case 8:
118 		var->red   = (struct fb_bitfield) {0, 8, 0};      /* offset, length, msb-right */
119 		var->green = (struct fb_bitfield) {0, 8, 0};
120 		var->blue  = (struct fb_bitfield) {0, 8, 0};
121 		var->transp = (struct fb_bitfield) {0, 0, 0};
122 		break;
123 	case 16:
124 		var->red   = (struct fb_bitfield) {11, 5, 0};
125 		var->green = (struct fb_bitfield) {5, 6, 0};
126 		var->blue  = (struct fb_bitfield) {0, 5, 0};
127 		var->transp = (struct fb_bitfield) {0, 0, 0};
128 		break;
129 	case 24:
130 	case 32:
131 		var->red   = (struct fb_bitfield) {16, 8, 0};
132 		var->green = (struct fb_bitfield) {8, 8, 0};
133 		var->blue  = (struct fb_bitfield) {0, 8, 0};
134 		var->transp = (struct fb_bitfield) {24, 8, 0};
135 		break;
136 	default:
137 		return -EINVAL;
138 	}
139 
140 	return 0;
141 }
142 
143 static int grvga_set_par(struct fb_info *info)
144 {
145 
146 	u32 func = 0;
147 	struct grvga_par *par = info->par;
148 
149 	__raw_writel(((info->var.yres - 1) << 16) | (info->var.xres - 1),
150 		     &par->regs->video_length);
151 
152 	__raw_writel((info->var.lower_margin << 16) | (info->var.right_margin),
153 		     &par->regs->front_porch);
154 
155 	__raw_writel((info->var.vsync_len << 16) | (info->var.hsync_len),
156 		     &par->regs->sync_length);
157 
158 	__raw_writel(((info->var.yres + info->var.lower_margin + info->var.upper_margin + info->var.vsync_len - 1) << 16) |
159 		     (info->var.xres + info->var.right_margin + info->var.left_margin + info->var.hsync_len - 1),
160 		     &par->regs->line_length);
161 
162 	switch (info->var.bits_per_pixel) {
163 	case 8:
164 		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
165 		func = 1;
166 		break;
167 	case 16:
168 		info->fix.visual = FB_VISUAL_TRUECOLOR;
169 		func = 2;
170 		break;
171 	case 24:
172 	case 32:
173 		info->fix.visual = FB_VISUAL_TRUECOLOR;
174 		func = 3;
175 		break;
176 	default:
177 		return -EINVAL;
178 	}
179 
180 	__raw_writel((par->clk_sel << 6) | (func << 4) | 1,
181 		     &par->regs->status);
182 
183 	info->fix.line_length = (info->var.xres_virtual*info->var.bits_per_pixel)/8;
184 	return 0;
185 }
186 
187 static int grvga_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *info)
188 {
189 	struct grvga_par *par;
190 	par = info->par;
191 
192 	if (regno >= 256)	/* Size of CLUT */
193 		return -EINVAL;
194 
195 	if (info->var.grayscale) {
196 		/* grayscale = 0.30*R + 0.59*G + 0.11*B */
197 		red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
198 	}
199 
200 
201 
202 #define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
203 
204 	red    = CNVT_TOHW(red,   info->var.red.length);
205 	green  = CNVT_TOHW(green, info->var.green.length);
206 	blue   = CNVT_TOHW(blue,  info->var.blue.length);
207 	transp = CNVT_TOHW(transp, info->var.transp.length);
208 
209 #undef CNVT_TOHW
210 
211 	/* In PSEUDOCOLOR we use the hardware CLUT */
212 	if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR)
213 		__raw_writel((regno << 24) | (red << 16) | (green << 8) | blue,
214 			     &par->regs->clut);
215 
216 	/* Truecolor uses the pseudo palette */
217 	else if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
218 		u32 v;
219 		if (regno >= 16)
220 			return -EINVAL;
221 
222 
223 		v =     (red    << info->var.red.offset)   |
224 			(green  << info->var.green.offset) |
225 			(blue   << info->var.blue.offset)  |
226 			(transp << info->var.transp.offset);
227 
228 		((u32 *) (info->pseudo_palette))[regno] = v;
229 	}
230 	return 0;
231 }
232 
233 static int grvga_pan_display(struct fb_var_screeninfo *var,
234 			     struct fb_info *info)
235 {
236 	struct grvga_par *par = info->par;
237 	struct fb_fix_screeninfo *fix = &info->fix;
238 	u32 base_addr;
239 
240 	if (var->xoffset != 0)
241 		return -EINVAL;
242 
243 	base_addr = fix->smem_start + (var->yoffset * fix->line_length);
244 	base_addr &= ~3UL;
245 
246 	/* Set framebuffer base address  */
247 	__raw_writel(base_addr,
248 		     &par->regs->fb_pos);
249 
250 	return 0;
251 }
252 
253 static const struct fb_ops grvga_ops = {
254 	.owner          = THIS_MODULE,
255 	.fb_check_var   = grvga_check_var,
256 	.fb_set_par	= grvga_set_par,
257 	.fb_setcolreg   = grvga_setcolreg,
258 	.fb_pan_display = grvga_pan_display,
259 	.fb_fillrect	= cfb_fillrect,
260 	.fb_copyarea	= cfb_copyarea,
261 	.fb_imageblit	= cfb_imageblit
262 };
263 
264 static int grvga_parse_custom(char *options,
265 			      struct fb_var_screeninfo *screendata)
266 {
267 	char *this_opt;
268 	int count = 0;
269 	if (!options || !*options)
270 		return -1;
271 
272 	while ((this_opt = strsep(&options, " ")) != NULL) {
273 		if (!*this_opt)
274 			continue;
275 
276 		switch (count) {
277 		case 0:
278 			screendata->pixclock = simple_strtoul(this_opt, NULL, 0);
279 			count++;
280 			break;
281 		case 1:
282 			screendata->xres = screendata->xres_virtual = simple_strtoul(this_opt, NULL, 0);
283 			count++;
284 			break;
285 		case 2:
286 			screendata->right_margin = simple_strtoul(this_opt, NULL, 0);
287 			count++;
288 			break;
289 		case 3:
290 			screendata->hsync_len = simple_strtoul(this_opt, NULL, 0);
291 			count++;
292 			break;
293 		case 4:
294 			screendata->left_margin = simple_strtoul(this_opt, NULL, 0);
295 			count++;
296 			break;
297 		case 5:
298 			screendata->yres = screendata->yres_virtual = simple_strtoul(this_opt, NULL, 0);
299 			count++;
300 			break;
301 		case 6:
302 			screendata->lower_margin = simple_strtoul(this_opt, NULL, 0);
303 			count++;
304 			break;
305 		case 7:
306 			screendata->vsync_len = simple_strtoul(this_opt, NULL, 0);
307 			count++;
308 			break;
309 		case 8:
310 			screendata->upper_margin = simple_strtoul(this_opt, NULL, 0);
311 			count++;
312 			break;
313 		case 9:
314 			screendata->bits_per_pixel = simple_strtoul(this_opt, NULL, 0);
315 			count++;
316 			break;
317 		default:
318 			return -1;
319 		}
320 	}
321 	screendata->activate  = FB_ACTIVATE_NOW;
322 	screendata->vmode     = FB_VMODE_NONINTERLACED;
323 	return 0;
324 }
325 
326 static int grvga_probe(struct platform_device *dev)
327 {
328 	struct fb_info *info;
329 	int retval = -ENOMEM;
330 	unsigned long virtual_start;
331 	unsigned long grvga_fix_addr = 0;
332 	unsigned long physical_start = 0;
333 	unsigned long grvga_mem_size = 0;
334 	struct grvga_par *par = NULL;
335 	char *options = NULL, *mode_opt = NULL;
336 
337 	info = framebuffer_alloc(sizeof(struct grvga_par), &dev->dev);
338 	if (!info)
339 		return -ENOMEM;
340 
341 	/* Expecting: "grvga: modestring, [addr:<framebuffer physical address>], [size:<framebuffer size>]
342 	 *
343 	 * If modestring is custom:<custom mode string> we parse the string which then contains all videoparameters
344 	 * If address is left out, we allocate memory,
345 	 * if size is left out we only allocate enough to support the given mode.
346 	 */
347 	if (fb_get_options("grvga", &options)) {
348 		retval = -ENODEV;
349 		goto free_fb;
350 	}
351 
352 	if (!options || !*options)
353 		options =  "640x480-8@60";
354 
355 	while (1) {
356 		char *this_opt = strsep(&options, ",");
357 
358 		if (!this_opt)
359 			break;
360 
361 		if (!strncmp(this_opt, "custom", 6)) {
362 			if (grvga_parse_custom(this_opt, &info->var) < 0) {
363 				dev_err(&dev->dev, "Failed to parse custom mode (%s).\n", this_opt);
364 				retval = -EINVAL;
365 				goto free_fb;
366 			}
367 		} else if (!strncmp(this_opt, "addr", 4))
368 			grvga_fix_addr = simple_strtoul(this_opt + 5, NULL, 16);
369 		else if (!strncmp(this_opt, "size", 4))
370 			grvga_mem_size = simple_strtoul(this_opt + 5, NULL, 0);
371 		else
372 			mode_opt = this_opt;
373 	}
374 
375 	par = info->par;
376 	info->fbops = &grvga_ops;
377 	info->fix = grvga_fix;
378 	info->pseudo_palette = par->color_palette;
379 	info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN;
380 	info->fix.smem_len = grvga_mem_size;
381 
382 	if (!devm_request_mem_region(&dev->dev, dev->resource[0].start,
383 		    resource_size(&dev->resource[0]), "grlib-svgactrl regs")) {
384 		dev_err(&dev->dev, "registers already mapped\n");
385 		retval = -EBUSY;
386 		goto free_fb;
387 	}
388 
389 	par->regs = of_ioremap(&dev->resource[0], 0,
390 			       resource_size(&dev->resource[0]),
391 			       "grlib-svgactrl regs");
392 
393 	if (!par->regs) {
394 		dev_err(&dev->dev, "failed to map registers\n");
395 		retval = -ENOMEM;
396 		goto free_fb;
397 	}
398 
399 	retval = fb_alloc_cmap(&info->cmap, 256, 0);
400 	if (retval < 0) {
401 		dev_err(&dev->dev, "failed to allocate mem with fb_alloc_cmap\n");
402 		retval = -ENOMEM;
403 		goto unmap_regs;
404 	}
405 
406 	if (mode_opt) {
407 		retval = fb_find_mode(&info->var, info, mode_opt,
408 				      grvga_modedb, sizeof(grvga_modedb), &grvga_modedb[0], 8);
409 		if (!retval || retval == 4) {
410 			retval = -EINVAL;
411 			goto dealloc_cmap;
412 		}
413 	}
414 
415 	if (!grvga_mem_size)
416 		grvga_mem_size = info->var.xres_virtual * info->var.yres_virtual * info->var.bits_per_pixel/8;
417 
418 	if (grvga_fix_addr) {
419 		/* Got framebuffer base address from argument list */
420 
421 		physical_start = grvga_fix_addr;
422 
423 		if (!devm_request_mem_region(&dev->dev, physical_start,
424 					     grvga_mem_size, dev->name)) {
425 			dev_err(&dev->dev, "failed to request memory region\n");
426 			retval = -ENOMEM;
427 			goto dealloc_cmap;
428 		}
429 
430 		virtual_start = (unsigned long) ioremap(physical_start, grvga_mem_size);
431 
432 		if (!virtual_start) {
433 			dev_err(&dev->dev, "error mapping framebuffer memory\n");
434 			retval = -ENOMEM;
435 			goto dealloc_cmap;
436 		}
437 	} else {	/* Allocate frambuffer memory */
438 
439 		unsigned long page;
440 
441 		virtual_start = (unsigned long) __get_free_pages(GFP_DMA,
442 								 get_order(grvga_mem_size));
443 		if (!virtual_start) {
444 			dev_err(&dev->dev,
445 				"unable to allocate framebuffer memory (%lu bytes)\n",
446 				grvga_mem_size);
447 			retval = -ENOMEM;
448 			goto dealloc_cmap;
449 		}
450 
451 		physical_start = dma_map_single(&dev->dev, (void *)virtual_start, grvga_mem_size, DMA_TO_DEVICE);
452 
453 		/* Set page reserved so that mmap will work. This is necessary
454 		 * since we'll be remapping normal memory.
455 		 */
456 		for (page = virtual_start;
457 		     page < PAGE_ALIGN(virtual_start + grvga_mem_size);
458 		     page += PAGE_SIZE) {
459 			SetPageReserved(virt_to_page(page));
460 		}
461 
462 		par->fb_alloced = 1;
463 	}
464 
465 	memset((unsigned long *) virtual_start, 0, grvga_mem_size);
466 
467 	info->screen_base = (char __iomem *) virtual_start;
468 	info->fix.smem_start = physical_start;
469 	info->fix.smem_len   = grvga_mem_size;
470 
471 	dev_set_drvdata(&dev->dev, info);
472 
473 	dev_info(&dev->dev,
474 		 "Aeroflex Gaisler framebuffer device (fb%d), %dx%d-%d, using %luK of video memory @ %p\n",
475 		 info->node, info->var.xres, info->var.yres, info->var.bits_per_pixel,
476 		 grvga_mem_size >> 10, info->screen_base);
477 
478 	retval = register_framebuffer(info);
479 	if (retval < 0) {
480 		dev_err(&dev->dev, "failed to register framebuffer\n");
481 		goto free_mem;
482 	}
483 
484 	__raw_writel(physical_start, &par->regs->fb_pos);
485 	__raw_writel(__raw_readl(&par->regs->status) | 1,  /* Enable framebuffer */
486 		     &par->regs->status);
487 
488 	return 0;
489 
490 free_mem:
491 	if (grvga_fix_addr)
492 		iounmap((void *)virtual_start);
493 	else
494 		kfree((void *)virtual_start);
495 dealloc_cmap:
496 	fb_dealloc_cmap(&info->cmap);
497 unmap_regs:
498 	of_iounmap(&dev->resource[0], par->regs,
499 		   resource_size(&dev->resource[0]));
500 free_fb:
501 	framebuffer_release(info);
502 
503 	return retval;
504 }
505 
506 static void grvga_remove(struct platform_device *device)
507 {
508 	struct fb_info *info = dev_get_drvdata(&device->dev);
509 	struct grvga_par *par;
510 
511 	if (info) {
512 		par = info->par;
513 		unregister_framebuffer(info);
514 		fb_dealloc_cmap(&info->cmap);
515 
516 		of_iounmap(&device->resource[0], par->regs,
517 			   resource_size(&device->resource[0]));
518 
519 		if (!par->fb_alloced)
520 			iounmap(info->screen_base);
521 		else
522 			kfree((void *)info->screen_base);
523 
524 		framebuffer_release(info);
525 	}
526 }
527 
528 static struct of_device_id svgactrl_of_match[] = {
529 	{
530 		.name = "GAISLER_SVGACTRL",
531 	},
532 	{
533 		.name = "01_063",
534 	},
535 	{},
536 };
537 MODULE_DEVICE_TABLE(of, svgactrl_of_match);
538 
539 static struct platform_driver grvga_driver = {
540 	.driver = {
541 		.name = "grlib-svgactrl",
542 		.of_match_table = svgactrl_of_match,
543 	},
544 	.probe		= grvga_probe,
545 	.remove_new	= grvga_remove,
546 };
547 
548 module_platform_driver(grvga_driver);
549 
550 MODULE_LICENSE("GPL");
551 MODULE_AUTHOR("Aeroflex Gaisler");
552 MODULE_DESCRIPTION("Aeroflex Gaisler framebuffer device driver");
553