1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2020 - 2022, Google LLC 4 * 5 * MAXIM TCPCI based TCPC driver 6 */ 7 8 #include <linux/interrupt.h> 9 #include <linux/i2c.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/regmap.h> 13 #include <linux/usb/pd.h> 14 #include <linux/usb/tcpci.h> 15 #include <linux/usb/tcpm.h> 16 #include <linux/usb/typec.h> 17 18 #include "tcpci_maxim.h" 19 20 #define PD_ACTIVITY_TIMEOUT_MS 10000 21 22 #define TCPC_VENDOR_ALERT 0x80 23 #define TCPC_VENDOR_USBSW_CTRL 0x93 24 #define TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA 0x9 25 #define TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA 0 26 27 #define TCPC_RECEIVE_BUFFER_COUNT_OFFSET 0 28 #define TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET 1 29 #define TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET 2 30 31 /* 32 * LongMessage not supported, hence 32 bytes for buf to be read from RECEIVE_BUFFER. 33 * DEVICE_CAPABILITIES_2.LongMessage = 0, the value in READABLE_BYTE_COUNT reg shall be 34 * less than or equal to 31. Since, RECEIVE_BUFFER len = 31 + 1(READABLE_BYTE_COUNT). 35 */ 36 #define TCPC_RECEIVE_BUFFER_LEN 32 37 38 #define MAX_BUCK_BOOST_SID 0x69 39 #define MAX_BUCK_BOOST_OP 0xb9 40 #define MAX_BUCK_BOOST_OFF 0 41 #define MAX_BUCK_BOOST_SOURCE 0xa 42 #define MAX_BUCK_BOOST_SINK 0x5 43 44 static const struct regmap_range max_tcpci_tcpci_range[] = { 45 regmap_reg_range(0x00, 0x95) 46 }; 47 48 static const struct regmap_access_table max_tcpci_tcpci_write_table = { 49 .yes_ranges = max_tcpci_tcpci_range, 50 .n_yes_ranges = ARRAY_SIZE(max_tcpci_tcpci_range), 51 }; 52 53 static const struct regmap_config max_tcpci_regmap_config = { 54 .reg_bits = 8, 55 .val_bits = 8, 56 .max_register = 0x95, 57 .wr_table = &max_tcpci_tcpci_write_table, 58 }; 59 60 static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata) 61 { 62 return container_of(tdata, struct max_tcpci_chip, data); 63 } 64 65 static void max_tcpci_init_regs(struct max_tcpci_chip *chip) 66 { 67 u16 alert_mask = 0; 68 int ret; 69 70 ret = max_tcpci_write16(chip, TCPC_ALERT, 0xffff); 71 if (ret < 0) { 72 dev_err(chip->dev, "Error writing to TCPC_ALERT ret:%d\n", ret); 73 return; 74 } 75 76 ret = max_tcpci_write16(chip, TCPC_VENDOR_ALERT, 0xffff); 77 if (ret < 0) { 78 dev_err(chip->dev, "Error writing to TCPC_VENDOR_ALERT ret:%d\n", ret); 79 return; 80 } 81 82 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, 0xff); 83 if (ret < 0) { 84 dev_err(chip->dev, "Unable to clear TCPC_ALERT_EXTENDED ret:%d\n", ret); 85 return; 86 } 87 88 /* Enable VSAFE0V detection */ 89 ret = max_tcpci_write8(chip, TCPC_EXTENDED_STATUS_MASK, TCPC_EXTENDED_STATUS_VSAFE0V); 90 if (ret < 0) { 91 dev_err(chip->dev, "Unable to unmask TCPC_EXTENDED_STATUS_VSAFE0V ret:%d\n", ret); 92 return; 93 } 94 95 /* Vconn Over Current Protection */ 96 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS_MASK, TCPC_FAULT_STATUS_MASK_VCONN_OC); 97 if (ret < 0) 98 return; 99 100 alert_mask = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_TX_FAILED | 101 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_RX_STATUS | TCPC_ALERT_CC_STATUS | 102 TCPC_ALERT_VBUS_DISCNCT | TCPC_ALERT_RX_BUF_OVF | TCPC_ALERT_POWER_STATUS | 103 /* Enable Extended alert for detecting Fast Role Swap Signal */ 104 TCPC_ALERT_EXTND | TCPC_ALERT_EXTENDED_STATUS | TCPC_ALERT_FAULT; 105 106 ret = max_tcpci_write16(chip, TCPC_ALERT_MASK, alert_mask); 107 if (ret < 0) { 108 dev_err(chip->dev, 109 "Error enabling TCPC_ALERT: TCPC_ALERT_MASK write failed ret:%d\n", ret); 110 return; 111 } 112 113 /* Enable vbus voltage monitoring and voltage alerts */ 114 ret = max_tcpci_write8(chip, TCPC_POWER_CTRL, 0); 115 if (ret < 0) { 116 dev_err(chip->dev, "Error writing to TCPC_POWER_CTRL ret:%d\n", ret); 117 return; 118 } 119 120 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED_MASK, TCPC_SINK_FAST_ROLE_SWAP); 121 if (ret < 0) 122 return; 123 } 124 125 static void process_rx(struct max_tcpci_chip *chip, u16 status) 126 { 127 struct pd_message msg; 128 u8 count, frame_type, rx_buf[TCPC_RECEIVE_BUFFER_LEN]; 129 int ret, payload_index; 130 u8 *rx_buf_ptr; 131 132 /* 133 * READABLE_BYTE_COUNT: Indicates the number of bytes in the RX_BUF_BYTE_x registers 134 * plus one (for the RX_BUF_FRAME_TYPE) Table 4-36. 135 * Read the count and frame type. 136 */ 137 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, 2); 138 if (ret < 0) { 139 dev_err(chip->dev, "TCPC_RX_BYTE_CNT read failed ret:%d\n", ret); 140 return; 141 } 142 143 count = rx_buf[TCPC_RECEIVE_BUFFER_COUNT_OFFSET]; 144 frame_type = rx_buf[TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET]; 145 146 if (count == 0 || frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP) { 147 max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS); 148 dev_err(chip->dev, "%s\n", count == 0 ? "error: count is 0" : 149 "error frame_type is not SOP"); 150 return; 151 } 152 153 if (count > sizeof(struct pd_message) || count + 1 > TCPC_RECEIVE_BUFFER_LEN) { 154 dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d\n", count); 155 return; 156 } 157 158 /* 159 * Read count + 1 as RX_BUF_BYTE_x is hidden and can only be read through 160 * TCPC_RX_BYTE_CNT 161 */ 162 count += 1; 163 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, count); 164 if (ret < 0) { 165 dev_err(chip->dev, "Error: TCPC_RX_BYTE_CNT read failed: %d\n", ret); 166 return; 167 } 168 169 rx_buf_ptr = rx_buf + TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET; 170 msg.header = cpu_to_le16(*(u16 *)rx_buf_ptr); 171 rx_buf_ptr = rx_buf_ptr + sizeof(msg.header); 172 for (payload_index = 0; payload_index < pd_header_cnt_le(msg.header); payload_index++, 173 rx_buf_ptr += sizeof(msg.payload[0])) 174 msg.payload[payload_index] = cpu_to_le32(*(u32 *)rx_buf_ptr); 175 176 /* 177 * Read complete, clear RX status alert bit. 178 * Clear overflow as well if set. 179 */ 180 ret = max_tcpci_write16(chip, TCPC_ALERT, status & TCPC_ALERT_RX_BUF_OVF ? 181 TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF : 182 TCPC_ALERT_RX_STATUS); 183 if (ret < 0) 184 return; 185 186 tcpm_pd_receive(chip->port, &msg); 187 } 188 189 static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, bool source, bool sink) 190 { 191 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata); 192 u8 buffer_source[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SOURCE}; 193 u8 buffer_sink[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SINK}; 194 u8 buffer_none[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_OFF}; 195 struct i2c_client *i2c = chip->client; 196 int ret; 197 198 struct i2c_msg msgs[] = { 199 { 200 .addr = MAX_BUCK_BOOST_SID, 201 .flags = i2c->flags & I2C_M_TEN, 202 .len = 2, 203 .buf = source ? buffer_source : sink ? buffer_sink : buffer_none, 204 }, 205 }; 206 207 if (source && sink) { 208 dev_err(chip->dev, "Both source and sink set\n"); 209 return -EINVAL; 210 } 211 212 ret = i2c_transfer(i2c->adapter, msgs, 1); 213 214 return ret < 0 ? ret : 1; 215 } 216 217 static void process_power_status(struct max_tcpci_chip *chip) 218 { 219 u8 pwr_status; 220 int ret; 221 222 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &pwr_status); 223 if (ret < 0) 224 return; 225 226 if (pwr_status == 0xff) 227 max_tcpci_init_regs(chip); 228 else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS) 229 tcpm_sourcing_vbus(chip->port); 230 else 231 tcpm_vbus_change(chip->port); 232 } 233 234 static void max_tcpci_frs_sourcing_vbus(struct tcpci *tcpci, struct tcpci_data *tdata) 235 { 236 /* 237 * For Fast Role Swap case, Boost turns on autonomously without 238 * AP intervention, but, needs AP to enable source mode explicitly 239 * for AP to regain control. 240 */ 241 max_tcpci_set_vbus(tcpci, tdata, true, false); 242 } 243 244 static void process_tx(struct max_tcpci_chip *chip, u16 status) 245 { 246 if (status & TCPC_ALERT_TX_SUCCESS) 247 tcpm_pd_transmit_complete(chip->port, TCPC_TX_SUCCESS); 248 else if (status & TCPC_ALERT_TX_DISCARDED) 249 tcpm_pd_transmit_complete(chip->port, TCPC_TX_DISCARDED); 250 else if (status & TCPC_ALERT_TX_FAILED) 251 tcpm_pd_transmit_complete(chip->port, TCPC_TX_FAILED); 252 253 /* Reinit regs as Hard reset sets them to default value */ 254 if ((status & TCPC_ALERT_TX_SUCCESS) && (status & TCPC_ALERT_TX_FAILED)) 255 max_tcpci_init_regs(chip); 256 } 257 258 /* Enable USB switches when partner is USB communications capable */ 259 static void max_tcpci_set_partner_usb_comm_capable(struct tcpci *tcpci, struct tcpci_data *data, 260 bool capable) 261 { 262 struct max_tcpci_chip *chip = tdata_to_max_tcpci(data); 263 int ret; 264 265 ret = max_tcpci_write8(chip, TCPC_VENDOR_USBSW_CTRL, capable ? 266 TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA : 267 TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA); 268 269 if (ret < 0) 270 dev_err(chip->dev, "Failed to enable USB switches"); 271 } 272 273 static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status) 274 { 275 u16 mask; 276 int ret; 277 u8 reg_status; 278 279 /* 280 * Clear alert status for everything except RX_STATUS, which shouldn't 281 * be cleared until we have successfully retrieved message. 282 */ 283 if (status & ~TCPC_ALERT_RX_STATUS) { 284 mask = status & TCPC_ALERT_RX_BUF_OVF ? 285 status & ~(TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF) : 286 status & ~TCPC_ALERT_RX_STATUS; 287 ret = max_tcpci_write16(chip, TCPC_ALERT, mask); 288 if (ret < 0) { 289 dev_err(chip->dev, "ALERT clear failed\n"); 290 return ret; 291 } 292 } 293 294 if (status & TCPC_ALERT_RX_BUF_OVF && !(status & TCPC_ALERT_RX_STATUS)) { 295 ret = max_tcpci_write16(chip, TCPC_ALERT, (TCPC_ALERT_RX_STATUS | 296 TCPC_ALERT_RX_BUF_OVF)); 297 if (ret < 0) { 298 dev_err(chip->dev, "ALERT clear failed\n"); 299 return ret; 300 } 301 } 302 303 if (status & TCPC_ALERT_FAULT) { 304 ret = max_tcpci_read8(chip, TCPC_FAULT_STATUS, ®_status); 305 if (ret < 0) 306 return ret; 307 308 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS, reg_status); 309 if (ret < 0) 310 return ret; 311 312 if (reg_status & TCPC_FAULT_STATUS_VCONN_OC) 313 tcpm_port_error_recovery(chip->port); 314 } 315 316 if (status & TCPC_ALERT_EXTND) { 317 ret = max_tcpci_read8(chip, TCPC_ALERT_EXTENDED, ®_status); 318 if (ret < 0) 319 return ret; 320 321 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, reg_status); 322 if (ret < 0) 323 return ret; 324 325 if (reg_status & TCPC_SINK_FAST_ROLE_SWAP) { 326 dev_info(chip->dev, "FRS Signal\n"); 327 tcpm_sink_frs(chip->port); 328 } 329 } 330 331 if (status & TCPC_ALERT_EXTENDED_STATUS) { 332 ret = max_tcpci_read8(chip, TCPC_EXTENDED_STATUS, (u8 *)®_status); 333 if (ret >= 0 && (reg_status & TCPC_EXTENDED_STATUS_VSAFE0V)) 334 tcpm_vbus_change(chip->port); 335 } 336 337 if (status & TCPC_ALERT_RX_STATUS) 338 process_rx(chip, status); 339 340 if (status & TCPC_ALERT_VBUS_DISCNCT) 341 tcpm_vbus_change(chip->port); 342 343 if (status & TCPC_ALERT_CC_STATUS) { 344 if (chip->contaminant_state == DETECTED || tcpm_port_is_toggling(chip->port)) { 345 if (!max_contaminant_is_contaminant(chip, false)) 346 tcpm_port_clean(chip->port); 347 } else { 348 tcpm_cc_change(chip->port); 349 } 350 } 351 352 if (status & TCPC_ALERT_POWER_STATUS) 353 process_power_status(chip); 354 355 if (status & TCPC_ALERT_RX_HARD_RST) { 356 tcpm_pd_hard_reset(chip->port); 357 max_tcpci_init_regs(chip); 358 } 359 360 if (status & TCPC_ALERT_TX_SUCCESS || status & TCPC_ALERT_TX_DISCARDED || status & 361 TCPC_ALERT_TX_FAILED) 362 process_tx(chip, status); 363 364 return IRQ_HANDLED; 365 } 366 367 static irqreturn_t max_tcpci_irq(int irq, void *dev_id) 368 { 369 struct max_tcpci_chip *chip = dev_id; 370 u16 status; 371 irqreturn_t irq_return = IRQ_HANDLED; 372 int ret; 373 374 if (!chip->port) 375 return IRQ_HANDLED; 376 377 ret = max_tcpci_read16(chip, TCPC_ALERT, &status); 378 if (ret < 0) { 379 dev_err(chip->dev, "ALERT read failed\n"); 380 return ret; 381 } 382 while (status) { 383 irq_return = _max_tcpci_irq(chip, status); 384 /* Do not return if the ALERT is already set. */ 385 ret = max_tcpci_read16(chip, TCPC_ALERT, &status); 386 if (ret < 0) 387 break; 388 } 389 390 return irq_return; 391 } 392 393 static irqreturn_t max_tcpci_isr(int irq, void *dev_id) 394 { 395 struct max_tcpci_chip *chip = dev_id; 396 397 pm_wakeup_event(chip->dev, PD_ACTIVITY_TIMEOUT_MS); 398 399 if (!chip->port) 400 return IRQ_HANDLED; 401 402 return IRQ_WAKE_THREAD; 403 } 404 405 static int max_tcpci_init_alert(struct max_tcpci_chip *chip, struct i2c_client *client) 406 { 407 int ret; 408 409 ret = devm_request_threaded_irq(chip->dev, client->irq, max_tcpci_isr, max_tcpci_irq, 410 (IRQF_TRIGGER_LOW | IRQF_ONESHOT), dev_name(chip->dev), 411 chip); 412 413 if (ret < 0) 414 return ret; 415 416 enable_irq_wake(client->irq); 417 return 0; 418 } 419 420 static int max_tcpci_start_toggling(struct tcpci *tcpci, struct tcpci_data *tdata, 421 enum typec_cc_status cc) 422 { 423 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata); 424 425 max_tcpci_init_regs(chip); 426 427 return 0; 428 } 429 430 static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data) 431 { 432 /* 433 * Generic TCPCI overwrites the regs once this driver initializes 434 * them. Prevent this by returning -1. 435 */ 436 return -1; 437 } 438 439 static void max_tcpci_check_contaminant(struct tcpci *tcpci, struct tcpci_data *tdata) 440 { 441 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata); 442 443 if (!max_contaminant_is_contaminant(chip, true)) 444 tcpm_port_clean(chip->port); 445 } 446 447 static int max_tcpci_probe(struct i2c_client *client) 448 { 449 int ret; 450 struct max_tcpci_chip *chip; 451 u8 power_status; 452 453 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); 454 if (!chip) 455 return -ENOMEM; 456 457 chip->client = client; 458 chip->data.regmap = devm_regmap_init_i2c(client, &max_tcpci_regmap_config); 459 if (IS_ERR(chip->data.regmap)) { 460 dev_err(&client->dev, "Regmap init failed\n"); 461 return PTR_ERR(chip->data.regmap); 462 } 463 464 chip->dev = &client->dev; 465 i2c_set_clientdata(client, chip); 466 467 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &power_status); 468 if (ret < 0) 469 return ret; 470 471 /* Chip level tcpci callbacks */ 472 chip->data.set_vbus = max_tcpci_set_vbus; 473 chip->data.start_drp_toggling = max_tcpci_start_toggling; 474 chip->data.TX_BUF_BYTE_x_hidden = true; 475 chip->data.init = tcpci_init; 476 chip->data.frs_sourcing_vbus = max_tcpci_frs_sourcing_vbus; 477 chip->data.auto_discharge_disconnect = true; 478 chip->data.vbus_vsafe0v = true; 479 chip->data.set_partner_usb_comm_capable = max_tcpci_set_partner_usb_comm_capable; 480 chip->data.check_contaminant = max_tcpci_check_contaminant; 481 482 max_tcpci_init_regs(chip); 483 chip->tcpci = tcpci_register_port(chip->dev, &chip->data); 484 if (IS_ERR(chip->tcpci)) { 485 dev_err(&client->dev, "TCPCI port registration failed\n"); 486 return PTR_ERR(chip->tcpci); 487 } 488 chip->port = tcpci_get_tcpm_port(chip->tcpci); 489 ret = max_tcpci_init_alert(chip, client); 490 if (ret < 0) 491 goto unreg_port; 492 493 device_init_wakeup(chip->dev, true); 494 return 0; 495 496 unreg_port: 497 tcpci_unregister_port(chip->tcpci); 498 499 return ret; 500 } 501 502 static void max_tcpci_remove(struct i2c_client *client) 503 { 504 struct max_tcpci_chip *chip = i2c_get_clientdata(client); 505 506 if (!IS_ERR_OR_NULL(chip->tcpci)) 507 tcpci_unregister_port(chip->tcpci); 508 } 509 510 static const struct i2c_device_id max_tcpci_id[] = { 511 { "maxtcpc", 0 }, 512 { } 513 }; 514 MODULE_DEVICE_TABLE(i2c, max_tcpci_id); 515 516 #ifdef CONFIG_OF 517 static const struct of_device_id max_tcpci_of_match[] = { 518 { .compatible = "maxim,max33359", }, 519 {}, 520 }; 521 MODULE_DEVICE_TABLE(of, max_tcpci_of_match); 522 #endif 523 524 static struct i2c_driver max_tcpci_i2c_driver = { 525 .driver = { 526 .name = "maxtcpc", 527 .of_match_table = of_match_ptr(max_tcpci_of_match), 528 }, 529 .probe = max_tcpci_probe, 530 .remove = max_tcpci_remove, 531 .id_table = max_tcpci_id, 532 }; 533 module_i2c_driver(max_tcpci_i2c_driver); 534 535 MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>"); 536 MODULE_DESCRIPTION("Maxim TCPCI based USB Type-C Port Controller Interface Driver"); 537 MODULE_LICENSE("GPL v2"); 538