xref: /linux/drivers/thermal/intel/intel_pch_thermal.c (revision a460513ed4b6994bfeb7bd86f72853140bc1ac12)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* intel_pch_thermal.c - Intel PCH Thermal driver
3  *
4  * Copyright (c) 2015, Intel Corporation.
5  *
6  * Authors:
7  *     Tushar Dave <tushar.n.dave@intel.com>
8  */
9 
10 #include <linux/acpi.h>
11 #include <linux/delay.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/pm.h>
16 #include <linux/suspend.h>
17 #include <linux/thermal.h>
18 #include <linux/types.h>
19 #include <linux/units.h>
20 
21 /* Intel PCH thermal Device IDs */
22 #define PCH_THERMAL_DID_HSW_1	0x9C24 /* Haswell PCH */
23 #define PCH_THERMAL_DID_HSW_2	0x8C24 /* Haswell PCH */
24 #define PCH_THERMAL_DID_WPT	0x9CA4 /* Wildcat Point */
25 #define PCH_THERMAL_DID_SKL	0x9D31 /* Skylake PCH */
26 #define PCH_THERMAL_DID_SKL_H	0xA131 /* Skylake PCH 100 series */
27 #define PCH_THERMAL_DID_CNL	0x9Df9 /* CNL PCH */
28 #define PCH_THERMAL_DID_CNL_H	0xA379 /* CNL-H PCH */
29 #define PCH_THERMAL_DID_CNL_LP	0x02F9 /* CNL-LP PCH */
30 #define PCH_THERMAL_DID_CML_H	0X06F9 /* CML-H PCH */
31 #define PCH_THERMAL_DID_LWB	0xA1B1 /* Lewisburg PCH */
32 
33 /* Wildcat Point-LP  PCH Thermal registers */
34 #define WPT_TEMP	0x0000	/* Temperature */
35 #define WPT_TSC	0x04	/* Thermal Sensor Control */
36 #define WPT_TSS	0x06	/* Thermal Sensor Status */
37 #define WPT_TSEL	0x08	/* Thermal Sensor Enable and Lock */
38 #define WPT_TSREL	0x0A	/* Thermal Sensor Report Enable and Lock */
39 #define WPT_TSMIC	0x0C	/* Thermal Sensor SMI Control */
40 #define WPT_CTT	0x0010	/* Catastrophic Trip Point */
41 #define WPT_TSPM	0x001C	/* Thermal Sensor Power Management */
42 #define WPT_TAHV	0x0014	/* Thermal Alert High Value */
43 #define WPT_TALV	0x0018	/* Thermal Alert Low Value */
44 #define WPT_TL		0x00000040	/* Throttle Value */
45 #define WPT_PHL	0x0060	/* PCH Hot Level */
46 #define WPT_PHLC	0x62	/* PHL Control */
47 #define WPT_TAS	0x80	/* Thermal Alert Status */
48 #define WPT_TSPIEN	0x82	/* PCI Interrupt Event Enables */
49 #define WPT_TSGPEN	0x84	/* General Purpose Event Enables */
50 
51 /*  Wildcat Point-LP  PCH Thermal Register bit definitions */
52 #define WPT_TEMP_TSR	0x01ff	/* Temp TS Reading */
53 #define WPT_TSC_CPDE	0x01	/* Catastrophic Power-Down Enable */
54 #define WPT_TSS_TSDSS	0x10	/* Thermal Sensor Dynamic Shutdown Status */
55 #define WPT_TSS_GPES	0x08	/* GPE status */
56 #define WPT_TSEL_ETS	0x01    /* Enable TS */
57 #define WPT_TSEL_PLDB	0x80	/* TSEL Policy Lock-Down Bit */
58 #define WPT_TL_TOL	0x000001FF	/* T0 Level */
59 #define WPT_TL_T1L	0x1ff00000	/* T1 Level */
60 #define WPT_TL_TTEN	0x20000000	/* TT Enable */
61 
62 /* Resolution of 1/2 degree C and an offset of -50C */
63 #define PCH_TEMP_OFFSET	(-50)
64 #define GET_WPT_TEMP(x)	((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET)
65 #define WPT_TEMP_OFFSET	(PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE)
66 #define GET_PCH_TEMP(x)	(((x) / 2) + PCH_TEMP_OFFSET)
67 
68 /* Amount of time for each cooling delay, 100ms by default for now */
69 static unsigned int delay_timeout = 100;
70 module_param(delay_timeout, int, 0644);
71 MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration.");
72 
73 /* Number of iterations for cooling delay, 10 counts by default for now */
74 static unsigned int delay_cnt = 10;
75 module_param(delay_cnt, int, 0644);
76 MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay.");
77 
78 static char driver_name[] = "Intel PCH thermal driver";
79 
80 struct pch_thermal_device {
81 	void __iomem *hw_base;
82 	const struct pch_dev_ops *ops;
83 	struct pci_dev *pdev;
84 	struct thermal_zone_device *tzd;
85 	int crt_trip_id;
86 	unsigned long crt_temp;
87 	int hot_trip_id;
88 	unsigned long hot_temp;
89 	int psv_trip_id;
90 	unsigned long psv_temp;
91 	bool bios_enabled;
92 };
93 
94 #ifdef CONFIG_ACPI
95 
96 /*
97  * On some platforms, there is a companion ACPI device, which adds
98  * passive trip temperature using _PSV method. There is no specific
99  * passive temperature setting in MMIO interface of this PCI device.
100  */
101 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
102 				      int *nr_trips)
103 {
104 	struct acpi_device *adev;
105 
106 	ptd->psv_trip_id = -1;
107 
108 	adev = ACPI_COMPANION(&ptd->pdev->dev);
109 	if (adev) {
110 		unsigned long long r;
111 		acpi_status status;
112 
113 		status = acpi_evaluate_integer(adev->handle, "_PSV", NULL,
114 					       &r);
115 		if (ACPI_SUCCESS(status)) {
116 			unsigned long trip_temp;
117 
118 			trip_temp = deci_kelvin_to_millicelsius(r);
119 			if (trip_temp) {
120 				ptd->psv_temp = trip_temp;
121 				ptd->psv_trip_id = *nr_trips;
122 				++(*nr_trips);
123 			}
124 		}
125 	}
126 }
127 #else
128 static void pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
129 				      int *nr_trips)
130 {
131 	ptd->psv_trip_id = -1;
132 
133 }
134 #endif
135 
136 static int pch_wpt_init(struct pch_thermal_device *ptd, int *nr_trips)
137 {
138 	u8 tsel;
139 	u16 trip_temp;
140 
141 	*nr_trips = 0;
142 
143 	/* Check if BIOS has already enabled thermal sensor */
144 	if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) {
145 		ptd->bios_enabled = true;
146 		goto read_trips;
147 	}
148 
149 	tsel = readb(ptd->hw_base + WPT_TSEL);
150 	/*
151 	 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO.
152 	 * If so, thermal sensor cannot enable. Bail out.
153 	 */
154 	if (tsel & WPT_TSEL_PLDB) {
155 		dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
156 		return -ENODEV;
157 	}
158 
159 	writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
160 	if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) {
161 		dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
162 		return -ENODEV;
163 	}
164 
165 read_trips:
166 	ptd->crt_trip_id = -1;
167 	trip_temp = readw(ptd->hw_base + WPT_CTT);
168 	trip_temp &= 0x1FF;
169 	if (trip_temp) {
170 		ptd->crt_temp = GET_WPT_TEMP(trip_temp);
171 		ptd->crt_trip_id = 0;
172 		++(*nr_trips);
173 	}
174 
175 	ptd->hot_trip_id = -1;
176 	trip_temp = readw(ptd->hw_base + WPT_PHL);
177 	trip_temp &= 0x1FF;
178 	if (trip_temp) {
179 		ptd->hot_temp = GET_WPT_TEMP(trip_temp);
180 		ptd->hot_trip_id = *nr_trips;
181 		++(*nr_trips);
182 	}
183 
184 	pch_wpt_add_acpi_psv_trip(ptd, nr_trips);
185 
186 	return 0;
187 }
188 
189 static int pch_wpt_get_temp(struct pch_thermal_device *ptd, int *temp)
190 {
191 	*temp = GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
192 
193 	return 0;
194 }
195 
196 static int pch_wpt_suspend(struct pch_thermal_device *ptd)
197 {
198 	u8 tsel;
199 	u8 pch_delay_cnt = 1;
200 	u16 pch_thr_temp, pch_cur_temp;
201 
202 	/* Shutdown the thermal sensor if it is not enabled by BIOS */
203 	if (!ptd->bios_enabled) {
204 		tsel = readb(ptd->hw_base + WPT_TSEL);
205 		writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL);
206 		return 0;
207 	}
208 
209 	/* Do not check temperature if it is not a S0ix capable platform */
210 #ifdef CONFIG_ACPI
211 	if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
212 		return 0;
213 #else
214 	return 0;
215 #endif
216 
217 	/* Do not check temperature if it is not s2idle */
218 	if (pm_suspend_via_firmware())
219 		return 0;
220 
221 	/* Get the PCH temperature threshold value */
222 	pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM));
223 
224 	/* Get the PCH current temperature value */
225 	pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
226 
227 	/*
228 	 * If current PCH temperature is higher than configured PCH threshold
229 	 * value, run some delay loop with sleep to let the current temperature
230 	 * go down below the threshold value which helps to allow system enter
231 	 * lower power S0ix suspend state. Even after delay loop if PCH current
232 	 * temperature stays above threshold, notify the warning message
233 	 * which helps to indentify the reason why S0ix entry was rejected.
234 	 */
235 	while (pch_delay_cnt <= delay_cnt) {
236 		if (pch_cur_temp <= pch_thr_temp)
237 			break;
238 
239 		dev_warn(&ptd->pdev->dev,
240 			"CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n",
241 			pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout);
242 		msleep(delay_timeout);
243 		/* Read the PCH current temperature for next cycle. */
244 		pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
245 		pch_delay_cnt++;
246 	}
247 
248 	if (pch_cur_temp > pch_thr_temp)
249 		dev_warn(&ptd->pdev->dev,
250 			"CPU-PCH is hot [%dC] even after delay, continue to suspend. S0ix might fail\n",
251 			pch_cur_temp);
252 	else
253 		dev_info(&ptd->pdev->dev,
254 			"CPU-PCH is cool [%dC], continue to suspend\n", pch_cur_temp);
255 
256 	return 0;
257 }
258 
259 static int pch_wpt_resume(struct pch_thermal_device *ptd)
260 {
261 	u8 tsel;
262 
263 	if (ptd->bios_enabled)
264 		return 0;
265 
266 	tsel = readb(ptd->hw_base + WPT_TSEL);
267 
268 	writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
269 
270 	return 0;
271 }
272 
273 struct pch_dev_ops {
274 	int (*hw_init)(struct pch_thermal_device *ptd, int *nr_trips);
275 	int (*get_temp)(struct pch_thermal_device *ptd, int *temp);
276 	int (*suspend)(struct pch_thermal_device *ptd);
277 	int (*resume)(struct pch_thermal_device *ptd);
278 };
279 
280 
281 /* dev ops for Wildcat Point */
282 static const struct pch_dev_ops pch_dev_ops_wpt = {
283 	.hw_init = pch_wpt_init,
284 	.get_temp = pch_wpt_get_temp,
285 	.suspend = pch_wpt_suspend,
286 	.resume = pch_wpt_resume,
287 };
288 
289 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp)
290 {
291 	struct pch_thermal_device *ptd = tzd->devdata;
292 
293 	return	ptd->ops->get_temp(ptd, temp);
294 }
295 
296 static int pch_get_trip_type(struct thermal_zone_device *tzd, int trip,
297 			     enum thermal_trip_type *type)
298 {
299 	struct pch_thermal_device *ptd = tzd->devdata;
300 
301 	if (ptd->crt_trip_id == trip)
302 		*type = THERMAL_TRIP_CRITICAL;
303 	else if (ptd->hot_trip_id == trip)
304 		*type = THERMAL_TRIP_HOT;
305 	else if (ptd->psv_trip_id == trip)
306 		*type = THERMAL_TRIP_PASSIVE;
307 	else
308 		return -EINVAL;
309 
310 	return 0;
311 }
312 
313 static int pch_get_trip_temp(struct thermal_zone_device *tzd, int trip, int *temp)
314 {
315 	struct pch_thermal_device *ptd = tzd->devdata;
316 
317 	if (ptd->crt_trip_id == trip)
318 		*temp = ptd->crt_temp;
319 	else if (ptd->hot_trip_id == trip)
320 		*temp = ptd->hot_temp;
321 	else if (ptd->psv_trip_id == trip)
322 		*temp = ptd->psv_temp;
323 	else
324 		return -EINVAL;
325 
326 	return 0;
327 }
328 
329 static void pch_critical(struct thermal_zone_device *tzd)
330 {
331 	dev_dbg(&tzd->device, "%s: critical temperature reached\n", tzd->type);
332 }
333 
334 static struct thermal_zone_device_ops tzd_ops = {
335 	.get_temp = pch_thermal_get_temp,
336 	.get_trip_type = pch_get_trip_type,
337 	.get_trip_temp = pch_get_trip_temp,
338 	.critical = pch_critical,
339 };
340 
341 enum board_ids {
342 	board_hsw,
343 	board_wpt,
344 	board_skl,
345 	board_cnl,
346 	board_cml,
347 	board_lwb,
348 };
349 
350 static const struct board_info {
351 	const char *name;
352 	const struct pch_dev_ops *ops;
353 } board_info[] = {
354 	[board_hsw] = {
355 		.name = "pch_haswell",
356 		.ops = &pch_dev_ops_wpt,
357 	},
358 	[board_wpt] = {
359 		.name = "pch_wildcat_point",
360 		.ops = &pch_dev_ops_wpt,
361 	},
362 	[board_skl] = {
363 		.name = "pch_skylake",
364 		.ops = &pch_dev_ops_wpt,
365 	},
366 	[board_cnl] = {
367 		.name = "pch_cannonlake",
368 		.ops = &pch_dev_ops_wpt,
369 	},
370 	[board_cml] = {
371 		.name = "pch_cometlake",
372 		.ops = &pch_dev_ops_wpt,
373 	},
374 	[board_lwb] = {
375 		.name = "pch_lewisburg",
376 		.ops = &pch_dev_ops_wpt,
377 	},
378 };
379 
380 static int intel_pch_thermal_probe(struct pci_dev *pdev,
381 				   const struct pci_device_id *id)
382 {
383 	enum board_ids board_id = id->driver_data;
384 	const struct board_info *bi = &board_info[board_id];
385 	struct pch_thermal_device *ptd;
386 	int err;
387 	int nr_trips;
388 
389 	ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL);
390 	if (!ptd)
391 		return -ENOMEM;
392 
393 	ptd->ops = bi->ops;
394 
395 	pci_set_drvdata(pdev, ptd);
396 	ptd->pdev = pdev;
397 
398 	err = pci_enable_device(pdev);
399 	if (err) {
400 		dev_err(&pdev->dev, "failed to enable pci device\n");
401 		return err;
402 	}
403 
404 	err = pci_request_regions(pdev, driver_name);
405 	if (err) {
406 		dev_err(&pdev->dev, "failed to request pci region\n");
407 		goto error_disable;
408 	}
409 
410 	ptd->hw_base = pci_ioremap_bar(pdev, 0);
411 	if (!ptd->hw_base) {
412 		err = -ENOMEM;
413 		dev_err(&pdev->dev, "failed to map mem base\n");
414 		goto error_release;
415 	}
416 
417 	err = ptd->ops->hw_init(ptd, &nr_trips);
418 	if (err)
419 		goto error_cleanup;
420 
421 	ptd->tzd = thermal_zone_device_register(bi->name, nr_trips, 0, ptd,
422 						&tzd_ops, NULL, 0, 0);
423 	if (IS_ERR(ptd->tzd)) {
424 		dev_err(&pdev->dev, "Failed to register thermal zone %s\n",
425 			bi->name);
426 		err = PTR_ERR(ptd->tzd);
427 		goto error_cleanup;
428 	}
429 	err = thermal_zone_device_enable(ptd->tzd);
430 	if (err)
431 		goto err_unregister;
432 
433 	return 0;
434 
435 err_unregister:
436 	thermal_zone_device_unregister(ptd->tzd);
437 error_cleanup:
438 	iounmap(ptd->hw_base);
439 error_release:
440 	pci_release_regions(pdev);
441 error_disable:
442 	pci_disable_device(pdev);
443 	dev_err(&pdev->dev, "pci device failed to probe\n");
444 	return err;
445 }
446 
447 static void intel_pch_thermal_remove(struct pci_dev *pdev)
448 {
449 	struct pch_thermal_device *ptd = pci_get_drvdata(pdev);
450 
451 	thermal_zone_device_unregister(ptd->tzd);
452 	iounmap(ptd->hw_base);
453 	pci_set_drvdata(pdev, NULL);
454 	pci_release_regions(pdev);
455 	pci_disable_device(pdev);
456 }
457 
458 static int intel_pch_thermal_suspend(struct device *device)
459 {
460 	struct pch_thermal_device *ptd = dev_get_drvdata(device);
461 
462 	return ptd->ops->suspend(ptd);
463 }
464 
465 static int intel_pch_thermal_resume(struct device *device)
466 {
467 	struct pch_thermal_device *ptd = dev_get_drvdata(device);
468 
469 	return ptd->ops->resume(ptd);
470 }
471 
472 static const struct pci_device_id intel_pch_thermal_id[] = {
473 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1),
474 		.driver_data = board_hsw, },
475 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2),
476 		.driver_data = board_hsw, },
477 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT),
478 		.driver_data = board_wpt, },
479 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL),
480 		.driver_data = board_skl, },
481 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H),
482 		.driver_data = board_skl, },
483 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL),
484 		.driver_data = board_cnl, },
485 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H),
486 		.driver_data = board_cnl, },
487 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP),
488 		.driver_data = board_cnl, },
489 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H),
490 		.driver_data = board_cml, },
491 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB),
492 		.driver_data = board_lwb, },
493 	{ 0, },
494 };
495 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id);
496 
497 static const struct dev_pm_ops intel_pch_pm_ops = {
498 	.suspend = intel_pch_thermal_suspend,
499 	.resume = intel_pch_thermal_resume,
500 };
501 
502 static struct pci_driver intel_pch_thermal_driver = {
503 	.name		= "intel_pch_thermal",
504 	.id_table	= intel_pch_thermal_id,
505 	.probe		= intel_pch_thermal_probe,
506 	.remove		= intel_pch_thermal_remove,
507 	.driver.pm	= &intel_pch_pm_ops,
508 };
509 
510 module_pci_driver(intel_pch_thermal_driver);
511 
512 MODULE_LICENSE("GPL v2");
513 MODULE_DESCRIPTION("Intel PCH Thermal driver");
514