1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 BayLibre, SAS 4 * Copyright (C) 2015 Amlogic, Inc. All rights reserved. 5 * Copyright (C) 2014 Endless Mobile 6 */ 7 8 #include <linux/kernel.h> 9 #include <linux/mfd/syscon.h> 10 #include <linux/module.h> 11 #include <linux/regmap.h> 12 #include <linux/soc/amlogic/meson-canvas.h> 13 #include <linux/of_address.h> 14 #include <linux/of_platform.h> 15 #include <linux/io.h> 16 17 #define NUM_CANVAS 256 18 19 /* DMC Registers */ 20 #define DMC_CAV_LUT_DATAL 0x00 21 #define CANVAS_WIDTH_LBIT 29 22 #define CANVAS_WIDTH_LWID 3 23 #define DMC_CAV_LUT_DATAH 0x04 24 #define CANVAS_WIDTH_HBIT 0 25 #define CANVAS_HEIGHT_BIT 9 26 #define CANVAS_WRAP_BIT 22 27 #define CANVAS_BLKMODE_BIT 24 28 #define CANVAS_ENDIAN_BIT 26 29 #define DMC_CAV_LUT_ADDR 0x08 30 #define CANVAS_LUT_WR_EN BIT(9) 31 #define CANVAS_LUT_RD_EN BIT(8) 32 33 struct meson_canvas { 34 struct device *dev; 35 void __iomem *reg_base; 36 spinlock_t lock; /* canvas device lock */ 37 u8 used[NUM_CANVAS]; 38 }; 39 40 static void canvas_write(struct meson_canvas *canvas, u32 reg, u32 val) 41 { 42 writel_relaxed(val, canvas->reg_base + reg); 43 } 44 45 static u32 canvas_read(struct meson_canvas *canvas, u32 reg) 46 { 47 return readl_relaxed(canvas->reg_base + reg); 48 } 49 50 struct meson_canvas *meson_canvas_get(struct device *dev) 51 { 52 struct device_node *canvas_node; 53 struct platform_device *canvas_pdev; 54 struct meson_canvas *canvas; 55 56 canvas_node = of_parse_phandle(dev->of_node, "amlogic,canvas", 0); 57 if (!canvas_node) 58 return ERR_PTR(-ENODEV); 59 60 canvas_pdev = of_find_device_by_node(canvas_node); 61 if (!canvas_pdev) { 62 of_node_put(canvas_node); 63 return ERR_PTR(-EPROBE_DEFER); 64 } 65 66 of_node_put(canvas_node); 67 68 /* 69 * If priv is NULL, it's probably because the canvas hasn't 70 * properly initialized. Bail out with -EINVAL because, in the 71 * current state, this driver probe cannot return -EPROBE_DEFER 72 */ 73 canvas = dev_get_drvdata(&canvas_pdev->dev); 74 if (!canvas) 75 return ERR_PTR(-EINVAL); 76 77 return canvas; 78 } 79 EXPORT_SYMBOL_GPL(meson_canvas_get); 80 81 int meson_canvas_config(struct meson_canvas *canvas, u8 canvas_index, 82 u32 addr, u32 stride, u32 height, 83 unsigned int wrap, 84 unsigned int blkmode, 85 unsigned int endian) 86 { 87 unsigned long flags; 88 89 spin_lock_irqsave(&canvas->lock, flags); 90 if (!canvas->used[canvas_index]) { 91 dev_err(canvas->dev, 92 "Trying to setup non allocated canvas %u\n", 93 canvas_index); 94 spin_unlock_irqrestore(&canvas->lock, flags); 95 return -EINVAL; 96 } 97 98 canvas_write(canvas, DMC_CAV_LUT_DATAL, 99 ((addr + 7) >> 3) | 100 (((stride + 7) >> 3) << CANVAS_WIDTH_LBIT)); 101 102 canvas_write(canvas, DMC_CAV_LUT_DATAH, 103 ((((stride + 7) >> 3) >> CANVAS_WIDTH_LWID) << 104 CANVAS_WIDTH_HBIT) | 105 (height << CANVAS_HEIGHT_BIT) | 106 (wrap << CANVAS_WRAP_BIT) | 107 (blkmode << CANVAS_BLKMODE_BIT) | 108 (endian << CANVAS_ENDIAN_BIT)); 109 110 canvas_write(canvas, DMC_CAV_LUT_ADDR, 111 CANVAS_LUT_WR_EN | canvas_index); 112 113 /* Force a read-back to make sure everything is flushed. */ 114 canvas_read(canvas, DMC_CAV_LUT_DATAH); 115 spin_unlock_irqrestore(&canvas->lock, flags); 116 117 return 0; 118 } 119 EXPORT_SYMBOL_GPL(meson_canvas_config); 120 121 int meson_canvas_alloc(struct meson_canvas *canvas, u8 *canvas_index) 122 { 123 int i; 124 unsigned long flags; 125 126 spin_lock_irqsave(&canvas->lock, flags); 127 for (i = 0; i < NUM_CANVAS; ++i) { 128 if (!canvas->used[i]) { 129 canvas->used[i] = 1; 130 spin_unlock_irqrestore(&canvas->lock, flags); 131 *canvas_index = i; 132 return 0; 133 } 134 } 135 spin_unlock_irqrestore(&canvas->lock, flags); 136 137 dev_err(canvas->dev, "No more canvas available\n"); 138 return -ENODEV; 139 } 140 EXPORT_SYMBOL_GPL(meson_canvas_alloc); 141 142 int meson_canvas_free(struct meson_canvas *canvas, u8 canvas_index) 143 { 144 unsigned long flags; 145 146 spin_lock_irqsave(&canvas->lock, flags); 147 if (!canvas->used[canvas_index]) { 148 dev_err(canvas->dev, 149 "Trying to free unused canvas %u\n", canvas_index); 150 spin_unlock_irqrestore(&canvas->lock, flags); 151 return -EINVAL; 152 } 153 canvas->used[canvas_index] = 0; 154 spin_unlock_irqrestore(&canvas->lock, flags); 155 156 return 0; 157 } 158 EXPORT_SYMBOL_GPL(meson_canvas_free); 159 160 static int meson_canvas_probe(struct platform_device *pdev) 161 { 162 struct resource *res; 163 struct meson_canvas *canvas; 164 struct device *dev = &pdev->dev; 165 166 canvas = devm_kzalloc(dev, sizeof(*canvas), GFP_KERNEL); 167 if (!canvas) 168 return -ENOMEM; 169 170 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 171 canvas->reg_base = devm_ioremap_resource(dev, res); 172 if (IS_ERR(canvas->reg_base)) 173 return PTR_ERR(canvas->reg_base); 174 175 canvas->dev = dev; 176 spin_lock_init(&canvas->lock); 177 dev_set_drvdata(dev, canvas); 178 179 return 0; 180 } 181 182 static const struct of_device_id canvas_dt_match[] = { 183 { .compatible = "amlogic,canvas" }, 184 {} 185 }; 186 MODULE_DEVICE_TABLE(of, canvas_dt_match); 187 188 static struct platform_driver meson_canvas_driver = { 189 .probe = meson_canvas_probe, 190 .driver = { 191 .name = "amlogic-canvas", 192 .of_match_table = canvas_dt_match, 193 }, 194 }; 195 module_platform_driver(meson_canvas_driver); 196 197 MODULE_DESCRIPTION("Amlogic Canvas driver"); 198 MODULE_AUTHOR("Maxime Jourdan <mjourdan@baylibre.com>"); 199 MODULE_LICENSE("GPL"); 200