1 /* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h 6 * Copyright (C) 2012-2014 LSI Corporation 7 * Copyright (C) 2013-2014 Avago Technologies 8 * (mailto: MPT-FusionLinux.pdl@avagotech.com) 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 2 13 * of the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * NO WARRANTY 21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 * solely responsible for determining the appropriateness of using and 26 * distributing the Program and assumes all risks associated with its 27 * exercise of rights under this Agreement, including but not limited to 28 * the risks and costs of program errors, damage to or loss of data, 29 * programs or equipment, and unavailability or interruption of operations. 30 31 * DISCLAIMER OF LIABILITY 32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 40 * You should have received a copy of the GNU General Public License 41 * along with this program; if not, write to the Free Software 42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 43 * USA. 44 */ 45 46 #ifndef MPT3SAS_BASE_H_INCLUDED 47 #define MPT3SAS_BASE_H_INCLUDED 48 49 #include "mpi/mpi2_type.h" 50 #include "mpi/mpi2.h" 51 #include "mpi/mpi2_ioc.h" 52 #include "mpi/mpi2_cnfg.h" 53 #include "mpi/mpi2_init.h" 54 #include "mpi/mpi2_raid.h" 55 #include "mpi/mpi2_tool.h" 56 #include "mpi/mpi2_sas.h" 57 #include "mpi/mpi2_pci.h" 58 59 #include <scsi/scsi.h> 60 #include <scsi/scsi_cmnd.h> 61 #include <scsi/scsi_device.h> 62 #include <scsi/scsi_host.h> 63 #include <scsi/scsi_tcq.h> 64 #include <scsi/scsi_transport_sas.h> 65 #include <scsi/scsi_dbg.h> 66 #include <scsi/scsi_eh.h> 67 #include <linux/pci.h> 68 #include <linux/poll.h> 69 70 #include "mpt3sas_debug.h" 71 #include "mpt3sas_trigger_diag.h" 72 73 /* driver versioning info */ 74 #define MPT3SAS_DRIVER_NAME "mpt3sas" 75 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>" 76 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver" 77 #define MPT3SAS_DRIVER_VERSION "17.100.00.00" 78 #define MPT3SAS_MAJOR_VERSION 17 79 #define MPT3SAS_MINOR_VERSION 100 80 #define MPT3SAS_BUILD_VERSION 0 81 #define MPT3SAS_RELEASE_VERSION 00 82 83 #define MPT2SAS_DRIVER_NAME "mpt2sas" 84 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver" 85 #define MPT2SAS_DRIVER_VERSION "20.102.00.00" 86 #define MPT2SAS_MAJOR_VERSION 20 87 #define MPT2SAS_MINOR_VERSION 102 88 #define MPT2SAS_BUILD_VERSION 0 89 #define MPT2SAS_RELEASE_VERSION 00 90 91 /* 92 * Set MPT3SAS_SG_DEPTH value based on user input. 93 */ 94 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE 95 #define MPT_MIN_PHYS_SEGMENTS 16 96 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32 97 98 #define MCPU_MAX_CHAINS_PER_IO 3 99 100 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE 101 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE 102 #else 103 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 104 #endif 105 106 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE 107 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE 108 #else 109 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 110 #endif 111 112 /* 113 * Generic Defines 114 */ 115 #define MPT3SAS_SATA_QUEUE_DEPTH 32 116 #define MPT3SAS_SAS_QUEUE_DEPTH 254 117 #define MPT3SAS_RAID_QUEUE_DEPTH 128 118 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200 119 120 #define MPT3SAS_RAID_MAX_SECTORS 8192 121 #define MPT3SAS_HOST_PAGE_SIZE_4K 12 122 #define MPT3SAS_NVME_QUEUE_DEPTH 128 123 #define MPT_NAME_LENGTH 32 /* generic length of strings */ 124 #define MPT_STRING_LENGTH 64 125 #define MPI_FRAME_START_OFFSET 256 126 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/ 127 128 #define MPT_MAX_CALLBACKS 32 129 130 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */ 131 /* reserved for issuing internally framed scsi io cmds */ 132 #define INTERNAL_SCSIIO_CMDS_COUNT 3 133 134 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/ 135 136 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF 137 138 #define MAX_CHAIN_ELEMT_SZ 16 139 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8 140 141 /* 142 * NVMe defines 143 */ 144 #define NVME_PRP_SIZE 8 /* PRP size */ 145 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ 146 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ 147 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ 148 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ 149 150 /* 151 * reset phases 152 */ 153 #define MPT3_IOC_PRE_RESET 1 /* prior to host reset */ 154 #define MPT3_IOC_AFTER_RESET 2 /* just after host reset */ 155 #define MPT3_IOC_DONE_RESET 3 /* links re-initialized */ 156 157 /* 158 * logging format 159 */ 160 #define MPT3SAS_FMT "%s: " 161 162 /* 163 * WarpDrive Specific Log codes 164 */ 165 166 #define MPT2_WARPDRIVE_LOGENTRY (0x8002) 167 #define MPT2_WARPDRIVE_LC_SSDT (0x41) 168 #define MPT2_WARPDRIVE_LC_SSDLW (0x43) 169 #define MPT2_WARPDRIVE_LC_SSDLF (0x44) 170 #define MPT2_WARPDRIVE_LC_BRMF (0x4D) 171 172 /* 173 * per target private data 174 */ 175 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01 176 #define MPT_TARGET_FLAGS_VOLUME 0x02 177 #define MPT_TARGET_FLAGS_DELETED 0x04 178 #define MPT_TARGET_FASTPATH_IO 0x08 179 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10 180 181 #define SAS2_PCI_DEVICE_B0_REVISION (0x01) 182 #define SAS3_PCI_DEVICE_C0_REVISION (0x02) 183 184 /* 185 * Intel HBA branding 186 */ 187 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \ 188 "Intel(R) Integrated RAID Module RMS25JB080" 189 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \ 190 "Intel(R) Integrated RAID Module RMS25JB040" 191 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \ 192 "Intel(R) Integrated RAID Module RMS25KB080" 193 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \ 194 "Intel(R) Integrated RAID Module RMS25KB040" 195 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \ 196 "Intel(R) Integrated RAID Module RMS25LB040" 197 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \ 198 "Intel(R) Integrated RAID Module RMS25LB080" 199 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \ 200 "Intel Integrated RAID Module RMS2LL080" 201 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \ 202 "Intel Integrated RAID Module RMS2LL040" 203 #define MPT2SAS_INTEL_RS25GB008_BRANDING \ 204 "Intel(R) RAID Controller RS25GB008" 205 #define MPT2SAS_INTEL_SSD910_BRANDING \ 206 "Intel(R) SSD 910 Series" 207 208 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \ 209 "Intel(R) Integrated RAID Module RMS3JC080" 210 #define MPT3SAS_INTEL_RS3GC008_BRANDING \ 211 "Intel(R) RAID Controller RS3GC008" 212 #define MPT3SAS_INTEL_RS3FC044_BRANDING \ 213 "Intel(R) RAID Controller RS3FC044" 214 #define MPT3SAS_INTEL_RS3UC080_BRANDING \ 215 "Intel(R) RAID Controller RS3UC080" 216 217 /* 218 * Intel HBA SSDIDs 219 */ 220 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516 221 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517 222 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518 223 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519 224 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A 225 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B 226 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E 227 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F 228 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000 229 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700 230 231 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521 232 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522 233 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523 234 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524 235 236 /* 237 * Dell HBA branding 238 */ 239 #define MPT2SAS_DELL_BRANDING_SIZE 32 240 241 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA" 242 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter" 243 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated" 244 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular" 245 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded" 246 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200" 247 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS" 248 249 #define MPT3SAS_DELL_12G_HBA_BRANDING \ 250 "Dell 12Gbps HBA" 251 252 /* 253 * Dell HBA SSDIDs 254 */ 255 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C 256 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D 257 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E 258 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F 259 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20 260 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21 261 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22 262 263 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46 264 265 /* 266 * Cisco HBA branding 267 */ 268 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \ 269 "Cisco 9300-8E 12G SAS HBA" 270 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \ 271 "Cisco 9300-8i 12G SAS HBA" 272 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \ 273 "Cisco 12G Modular SAS Pass through Controller" 274 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \ 275 "UCS C3X60 12G SAS Pass through Controller" 276 /* 277 * Cisco HBA SSSDIDs 278 */ 279 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C 280 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154 281 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155 282 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156 283 284 /* 285 * status bits for ioc->diag_buffer_status 286 */ 287 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01) 288 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02) 289 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04) 290 291 /* 292 * HP HBA branding 293 */ 294 #define MPT2SAS_HP_3PAR_SSVID 0x1590 295 296 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \ 297 "HP H220 Host Bus Adapter" 298 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \ 299 "HP H221 Host Bus Adapter" 300 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \ 301 "HP H222 Host Bus Adapter" 302 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \ 303 "HP H220i Host Bus Adapter" 304 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \ 305 "HP H210i Host Bus Adapter" 306 307 /* 308 * HO HBA SSDIDs 309 */ 310 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041 311 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042 312 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043 313 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044 314 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046 315 316 /* 317 * Combined Reply Queue constants, 318 * There are twelve Supplemental Reply Post Host Index Registers 319 * and each register is at offset 0x10 bytes from the previous one. 320 */ 321 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12 322 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16 323 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10) 324 325 /* OEM Identifiers */ 326 #define MFG10_OEM_ID_INVALID (0x00000000) 327 #define MFG10_OEM_ID_DELL (0x00000001) 328 #define MFG10_OEM_ID_FSC (0x00000002) 329 #define MFG10_OEM_ID_SUN (0x00000003) 330 #define MFG10_OEM_ID_IBM (0x00000004) 331 332 /* GENERIC Flags 0*/ 333 #define MFG10_GF0_OCE_DISABLED (0x00000001) 334 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002) 335 #define MFG10_GF0_R10_DISPLAY (0x00000004) 336 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008) 337 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010) 338 339 #define VIRTUAL_IO_FAILED_RETRY (0x32010081) 340 341 /* OEM Specific Flags will come from OEM specific header files */ 342 struct Mpi2ManufacturingPage10_t { 343 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 344 U8 OEMIdentifier; /* 04h */ 345 U8 Reserved1; /* 05h */ 346 U16 Reserved2; /* 08h */ 347 U32 Reserved3; /* 0Ch */ 348 U32 GenericFlags0; /* 10h */ 349 U32 GenericFlags1; /* 14h */ 350 U32 Reserved4; /* 18h */ 351 U32 OEMSpecificFlags0; /* 1Ch */ 352 U32 OEMSpecificFlags1; /* 20h */ 353 U32 Reserved5[18]; /* 24h - 60h*/ 354 }; 355 356 357 /* Miscellaneous options */ 358 struct Mpi2ManufacturingPage11_t { 359 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 360 __le32 Reserved1; /* 04h */ 361 u8 Reserved2; /* 08h */ 362 u8 EEDPTagMode; /* 09h */ 363 u8 Reserved3; /* 0Ah */ 364 u8 Reserved4; /* 0Bh */ 365 __le32 Reserved5[23]; /* 0Ch-60h*/ 366 }; 367 368 /** 369 * struct MPT3SAS_TARGET - starget private hostdata 370 * @starget: starget object 371 * @sas_address: target sas address 372 * @raid_device: raid_device pointer to access volume data 373 * @handle: device handle 374 * @num_luns: number luns 375 * @flags: MPT_TARGET_FLAGS_XXX flags 376 * @deleted: target flaged for deletion 377 * @tm_busy: target is busy with TM request. 378 * @sas_dev: The sas_device associated with this target 379 * @pcie_dev: The pcie device associated with this target 380 */ 381 struct MPT3SAS_TARGET { 382 struct scsi_target *starget; 383 u64 sas_address; 384 struct _raid_device *raid_device; 385 u16 handle; 386 int num_luns; 387 u32 flags; 388 u8 deleted; 389 u8 tm_busy; 390 struct _sas_device *sas_dev; 391 struct _pcie_device *pcie_dev; 392 }; 393 394 395 /* 396 * per device private data 397 */ 398 #define MPT_DEVICE_FLAGS_INIT 0x01 399 400 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003) 401 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00) 402 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01) 403 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02) 404 405 /** 406 * struct MPT3SAS_DEVICE - sdev private hostdata 407 * @sas_target: starget private hostdata 408 * @lun: lun number 409 * @flags: MPT_DEVICE_XXX flags 410 * @configured_lun: lun is configured 411 * @block: device is in SDEV_BLOCK state 412 * @tlr_snoop_check: flag used in determining whether to disable TLR 413 * @eedp_enable: eedp support enable bit 414 * @eedp_type: 0(type_1), 1(type_2), 2(type_3) 415 * @eedp_block_length: block size 416 * @ata_command_pending: SATL passthrough outstanding for device 417 */ 418 struct MPT3SAS_DEVICE { 419 struct MPT3SAS_TARGET *sas_target; 420 unsigned int lun; 421 u32 flags; 422 u8 configured_lun; 423 u8 block; 424 u8 tlr_snoop_check; 425 u8 ignore_delay_remove; 426 /* Iopriority Command Handling */ 427 u8 ncq_prio_enable; 428 /* 429 * Bug workaround for SATL handling: the mpt2/3sas firmware 430 * doesn't return BUSY or TASK_SET_FULL for subsequent 431 * commands while a SATL pass through is in operation as the 432 * spec requires, it simply does nothing with them until the 433 * pass through completes, causing them possibly to timeout if 434 * the passthrough is a long executing command (like format or 435 * secure erase). This variable allows us to do the right 436 * thing while a SATL command is pending. 437 */ 438 unsigned long ata_command_pending; 439 440 }; 441 442 #define MPT3_CMD_NOT_USED 0x8000 /* free */ 443 #define MPT3_CMD_COMPLETE 0x0001 /* completed */ 444 #define MPT3_CMD_PENDING 0x0002 /* pending */ 445 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */ 446 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */ 447 448 /** 449 * struct _internal_cmd - internal commands struct 450 * @mutex: mutex 451 * @done: completion 452 * @reply: reply message pointer 453 * @sense: sense data 454 * @status: MPT3_CMD_XXX status 455 * @smid: system message id 456 */ 457 struct _internal_cmd { 458 struct mutex mutex; 459 struct completion done; 460 void *reply; 461 void *sense; 462 u16 status; 463 u16 smid; 464 }; 465 466 467 468 /** 469 * struct _sas_device - attached device information 470 * @list: sas device list 471 * @starget: starget object 472 * @sas_address: device sas address 473 * @device_name: retrieved from the SAS IDENTIFY frame. 474 * @handle: device handle 475 * @sas_address_parent: sas address of parent expander or sas host 476 * @enclosure_handle: enclosure handle 477 * @enclosure_logical_id: enclosure logical identifier 478 * @volume_handle: volume handle (valid when hidden raid member) 479 * @volume_wwid: volume unique identifier 480 * @device_info: bitfield provides detailed info about the device 481 * @id: target id 482 * @channel: target channel 483 * @slot: number number 484 * @phy: phy identifier provided in sas device page 0 485 * @responding: used in _scsih_sas_device_mark_responding 486 * @fast_path: fast path feature enable bit 487 * @pfa_led_on: flag for PFA LED status 488 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add() 489 * addition routine. 490 * @chassis_slot: chassis slot 491 * @is_chassis_slot_valid: chassis slot valid or not 492 */ 493 struct _sas_device { 494 struct list_head list; 495 struct scsi_target *starget; 496 u64 sas_address; 497 u64 device_name; 498 u16 handle; 499 u64 sas_address_parent; 500 u16 enclosure_handle; 501 u64 enclosure_logical_id; 502 u16 volume_handle; 503 u64 volume_wwid; 504 u32 device_info; 505 int id; 506 int channel; 507 u16 slot; 508 u8 phy; 509 u8 responding; 510 u8 fast_path; 511 u8 pfa_led_on; 512 u8 pend_sas_rphy_add; 513 u8 enclosure_level; 514 u8 chassis_slot; 515 u8 is_chassis_slot_valid; 516 u8 connector_name[5]; 517 struct kref refcount; 518 }; 519 520 static inline void sas_device_get(struct _sas_device *s) 521 { 522 kref_get(&s->refcount); 523 } 524 525 static inline void sas_device_free(struct kref *r) 526 { 527 kfree(container_of(r, struct _sas_device, refcount)); 528 } 529 530 static inline void sas_device_put(struct _sas_device *s) 531 { 532 kref_put(&s->refcount, sas_device_free); 533 } 534 535 /* 536 * struct _pcie_device - attached PCIe device information 537 * @list: pcie device list 538 * @starget: starget object 539 * @wwid: device WWID 540 * @handle: device handle 541 * @device_info: bitfield provides detailed info about the device 542 * @id: target id 543 * @channel: target channel 544 * @slot: slot number 545 * @port_num: port number 546 * @responding: used in _scsih_pcie_device_mark_responding 547 * @fast_path: fast path feature enable bit 548 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for 549 * NVMe device only 550 * @enclosure_handle: enclosure handle 551 * @enclosure_logical_id: enclosure logical identifier 552 * @enclosure_level: The level of device's enclosure from the controller 553 * @connector_name: ASCII value of the Connector's name 554 * @serial_number: pointer of serial number string allocated runtime 555 * @refcount: reference count for deletion 556 */ 557 struct _pcie_device { 558 struct list_head list; 559 struct scsi_target *starget; 560 u64 wwid; 561 u16 handle; 562 u32 device_info; 563 int id; 564 int channel; 565 u16 slot; 566 u8 port_num; 567 u8 responding; 568 u8 fast_path; 569 u32 nvme_mdts; 570 u16 enclosure_handle; 571 u64 enclosure_logical_id; 572 u8 enclosure_level; 573 u8 connector_name[4]; 574 u8 *serial_number; 575 struct kref refcount; 576 }; 577 /** 578 * pcie_device_get - Increment the pcie device reference count 579 * 580 * @p: pcie_device object 581 * 582 * When ever this function called it will increment the 583 * reference count of the pcie device for which this function called. 584 * 585 */ 586 static inline void pcie_device_get(struct _pcie_device *p) 587 { 588 kref_get(&p->refcount); 589 } 590 591 /** 592 * pcie_device_free - Release the pcie device object 593 * @r - kref object 594 * 595 * Free's the pcie device object. It will be called when reference count 596 * reaches to zero. 597 */ 598 static inline void pcie_device_free(struct kref *r) 599 { 600 kfree(container_of(r, struct _pcie_device, refcount)); 601 } 602 603 /** 604 * pcie_device_put - Decrement the pcie device reference count 605 * 606 * @p: pcie_device object 607 * 608 * When ever this function called it will decrement the 609 * reference count of the pcie device for which this function called. 610 * 611 * When refernce count reaches to Zero, this will call pcie_device_free to the 612 * pcie_device object. 613 */ 614 static inline void pcie_device_put(struct _pcie_device *p) 615 { 616 kref_put(&p->refcount, pcie_device_free); 617 } 618 /** 619 * struct _raid_device - raid volume link list 620 * @list: sas device list 621 * @starget: starget object 622 * @sdev: scsi device struct (volumes are single lun) 623 * @wwid: unique identifier for the volume 624 * @handle: device handle 625 * @block_size: Block size of the volume 626 * @id: target id 627 * @channel: target channel 628 * @volume_type: the raid level 629 * @device_info: bitfield provides detailed info about the hidden components 630 * @num_pds: number of hidden raid components 631 * @responding: used in _scsih_raid_device_mark_responding 632 * @percent_complete: resync percent complete 633 * @direct_io_enabled: Whether direct io to PDs are allowed or not 634 * @stripe_exponent: X where 2powX is the stripe sz in blocks 635 * @block_exponent: X where 2powX is the block sz in bytes 636 * @max_lba: Maximum number of LBA in the volume 637 * @stripe_sz: Stripe Size of the volume 638 * @device_info: Device info of the volume member disk 639 * @pd_handle: Array of handles of the physical drives for direct I/O in le16 640 */ 641 #define MPT_MAX_WARPDRIVE_PDS 8 642 struct _raid_device { 643 struct list_head list; 644 struct scsi_target *starget; 645 struct scsi_device *sdev; 646 u64 wwid; 647 u16 handle; 648 u16 block_sz; 649 int id; 650 int channel; 651 u8 volume_type; 652 u8 num_pds; 653 u8 responding; 654 u8 percent_complete; 655 u8 direct_io_enabled; 656 u8 stripe_exponent; 657 u8 block_exponent; 658 u64 max_lba; 659 u32 stripe_sz; 660 u32 device_info; 661 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS]; 662 }; 663 664 /** 665 * struct _boot_device - boot device info 666 * 667 * @channel: sas, raid, or pcie channel 668 * @device: holds pointer for struct _sas_device, struct _raid_device or 669 * struct _pcie_device 670 */ 671 struct _boot_device { 672 int channel; 673 void *device; 674 }; 675 676 /** 677 * struct _sas_port - wide/narrow sas port information 678 * @port_list: list of ports belonging to expander 679 * @num_phys: number of phys belonging to this port 680 * @remote_identify: attached device identification 681 * @rphy: sas transport rphy object 682 * @port: sas transport wide/narrow port object 683 * @phy_list: _sas_phy list objects belonging to this port 684 */ 685 struct _sas_port { 686 struct list_head port_list; 687 u8 num_phys; 688 struct sas_identify remote_identify; 689 struct sas_rphy *rphy; 690 struct sas_port *port; 691 struct list_head phy_list; 692 }; 693 694 /** 695 * struct _sas_phy - phy information 696 * @port_siblings: list of phys belonging to a port 697 * @identify: phy identification 698 * @remote_identify: attached device identification 699 * @phy: sas transport phy object 700 * @phy_id: unique phy id 701 * @handle: device handle for this phy 702 * @attached_handle: device handle for attached device 703 * @phy_belongs_to_port: port has been created for this phy 704 */ 705 struct _sas_phy { 706 struct list_head port_siblings; 707 struct sas_identify identify; 708 struct sas_identify remote_identify; 709 struct sas_phy *phy; 710 u8 phy_id; 711 u16 handle; 712 u16 attached_handle; 713 u8 phy_belongs_to_port; 714 }; 715 716 /** 717 * struct _sas_node - sas_host/expander information 718 * @list: list of expanders 719 * @parent_dev: parent device class 720 * @num_phys: number phys belonging to this sas_host/expander 721 * @sas_address: sas address of this sas_host/expander 722 * @handle: handle for this sas_host/expander 723 * @sas_address_parent: sas address of parent expander or sas host 724 * @enclosure_handle: handle for this a member of an enclosure 725 * @device_info: bitwise defining capabilities of this sas_host/expander 726 * @responding: used in _scsih_expander_device_mark_responding 727 * @phy: a list of phys that make up this sas_host/expander 728 * @sas_port_list: list of ports attached to this sas_host/expander 729 */ 730 struct _sas_node { 731 struct list_head list; 732 struct device *parent_dev; 733 u8 num_phys; 734 u64 sas_address; 735 u16 handle; 736 u64 sas_address_parent; 737 u16 enclosure_handle; 738 u64 enclosure_logical_id; 739 u8 responding; 740 struct _sas_phy *phy; 741 struct list_head sas_port_list; 742 }; 743 744 /** 745 * enum reset_type - reset state 746 * @FORCE_BIG_HAMMER: issue diagnostic reset 747 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer 748 */ 749 enum reset_type { 750 FORCE_BIG_HAMMER, 751 SOFT_RESET, 752 }; 753 754 /** 755 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O) 756 * @pcie_sgl: PCIe native SGL for NVMe devices 757 * @pcie_sgl_dma: physical address 758 */ 759 struct pcie_sg_list { 760 void *pcie_sgl; 761 dma_addr_t pcie_sgl_dma; 762 }; 763 764 /** 765 * struct chain_tracker - firmware chain tracker 766 * @chain_buffer: chain buffer 767 * @chain_buffer_dma: physical address 768 * @tracker_list: list of free request (ioc->free_chain_list) 769 */ 770 struct chain_tracker { 771 void *chain_buffer; 772 dma_addr_t chain_buffer_dma; 773 struct list_head tracker_list; 774 }; 775 776 /** 777 * struct scsiio_tracker - scsi mf request tracker 778 * @smid: system message id 779 * @cb_idx: callback index 780 * @direct_io: To indicate whether I/O is direct (WARPDRIVE) 781 * @chain_list: list of associated firmware chain tracker 782 * @msix_io: IO's msix 783 */ 784 struct scsiio_tracker { 785 u16 smid; 786 u8 cb_idx; 787 u8 direct_io; 788 struct pcie_sg_list pcie_sg_list; 789 struct list_head chain_list; 790 u16 msix_io; 791 }; 792 793 /** 794 * struct request_tracker - firmware request tracker 795 * @smid: system message id 796 * @cb_idx: callback index 797 * @tracker_list: list of free request (ioc->free_list) 798 */ 799 struct request_tracker { 800 u16 smid; 801 u8 cb_idx; 802 struct list_head tracker_list; 803 }; 804 805 /** 806 * struct _tr_list - target reset list 807 * @handle: device handle 808 * @state: state machine 809 */ 810 struct _tr_list { 811 struct list_head list; 812 u16 handle; 813 u16 state; 814 }; 815 816 /** 817 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list 818 * @handle: device handle 819 */ 820 struct _sc_list { 821 struct list_head list; 822 u16 handle; 823 }; 824 825 /** 826 * struct _event_ack_list - delayed event acknowledgment list 827 * @Event: Event ID 828 * @EventContext: used to track the event uniquely 829 */ 830 struct _event_ack_list { 831 struct list_head list; 832 u16 Event; 833 u32 EventContext; 834 }; 835 836 /** 837 * struct adapter_reply_queue - the reply queue struct 838 * @ioc: per adapter object 839 * @msix_index: msix index into vector table 840 * @vector: irq vector 841 * @reply_post_host_index: head index in the pool where FW completes IO 842 * @reply_post_free: reply post base virt address 843 * @name: the name registered to request_irq() 844 * @busy: isr is actively processing replies on another cpu 845 * @list: this list 846 */ 847 struct adapter_reply_queue { 848 struct MPT3SAS_ADAPTER *ioc; 849 u8 msix_index; 850 u32 reply_post_host_index; 851 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 852 char name[MPT_NAME_LENGTH]; 853 atomic_t busy; 854 struct list_head list; 855 }; 856 857 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr); 858 859 /* SAS3.0 support */ 860 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc, 861 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device); 862 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge, 863 dma_addr_t data_out_dma, size_t data_out_sz, 864 dma_addr_t data_in_dma, size_t data_in_sz); 865 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc, 866 void *paddr); 867 868 /* SAS3.5 support */ 869 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid, 870 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, 871 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma, 872 size_t data_in_sz); 873 874 /* To support atomic and non atomic descriptors*/ 875 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid, 876 u16 funcdep); 877 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid); 878 879 /* IOC Facts and Port Facts converted from little endian to cpu */ 880 union mpi3_version_union { 881 MPI2_VERSION_STRUCT Struct; 882 u32 Word; 883 }; 884 885 struct mpt3sas_facts { 886 u16 MsgVersion; 887 u16 HeaderVersion; 888 u8 IOCNumber; 889 u8 VP_ID; 890 u8 VF_ID; 891 u16 IOCExceptions; 892 u16 IOCStatus; 893 u32 IOCLogInfo; 894 u8 MaxChainDepth; 895 u8 WhoInit; 896 u8 NumberOfPorts; 897 u8 MaxMSIxVectors; 898 u16 RequestCredit; 899 u16 ProductID; 900 u32 IOCCapabilities; 901 union mpi3_version_union FWVersion; 902 u16 IOCRequestFrameSize; 903 u16 IOCMaxChainSegmentSize; 904 u16 MaxInitiators; 905 u16 MaxTargets; 906 u16 MaxSasExpanders; 907 u16 MaxEnclosures; 908 u16 ProtocolFlags; 909 u16 HighPriorityCredit; 910 u16 MaxReplyDescriptorPostQueueDepth; 911 u8 ReplyFrameSize; 912 u8 MaxVolumes; 913 u16 MaxDevHandle; 914 u16 MaxPersistentEntries; 915 u16 MinDevHandle; 916 u8 CurrentHostPageSize; 917 }; 918 919 struct mpt3sas_port_facts { 920 u8 PortNumber; 921 u8 VP_ID; 922 u8 VF_ID; 923 u8 PortType; 924 u16 MaxPostedCmdBuffers; 925 }; 926 927 struct reply_post_struct { 928 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 929 dma_addr_t reply_post_free_dma; 930 }; 931 932 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); 933 /** 934 * struct MPT3SAS_ADAPTER - per adapter struct 935 * @list: ioc_list 936 * @shost: shost object 937 * @id: unique adapter id 938 * @cpu_count: number online cpus 939 * @name: generic ioc string 940 * @tmp_string: tmp string used for logging 941 * @pdev: pci pdev object 942 * @pio_chip: physical io register space 943 * @chip: memory mapped register space 944 * @chip_phys: physical addrss prior to mapping 945 * @logging_level: see mpt3sas_debug.h 946 * @fwfault_debug: debuging FW timeouts 947 * @ir_firmware: IR firmware present 948 * @bars: bitmask of BAR's that must be configured 949 * @mask_interrupts: ignore interrupt 950 * @dma_mask: used to set the consistent dma mask 951 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and 952 * pci resource handling 953 * @fault_reset_work_q_name: fw fault work queue 954 * @fault_reset_work_q: "" 955 * @fault_reset_work: "" 956 * @firmware_event_name: fw event work queue 957 * @firmware_event_thread: "" 958 * @fw_event_lock: 959 * @fw_event_list: list of fw events 960 * @aen_event_read_flag: event log was read 961 * @broadcast_aen_busy: broadcast aen waiting to be serviced 962 * @shost_recovery: host reset in progress 963 * @ioc_reset_in_progress_lock: 964 * @ioc_link_reset_in_progress: phy/hard reset in progress 965 * @ignore_loginfos: ignore loginfos during task management 966 * @remove_host: flag for when driver unloads, to avoid sending dev resets 967 * @pci_error_recovery: flag to prevent ioc access until slot reset completes 968 * @wait_for_discovery_to_complete: flag set at driver load time when 969 * waiting on reporting devices 970 * @is_driver_loading: flag set at driver load time 971 * @port_enable_failed: flag set when port enable has failed 972 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work 973 * @start_scan_failed: means port enable failed, return's the ioc_status 974 * @msix_enable: flag indicating msix is enabled 975 * @msix_vector_count: number msix vectors 976 * @cpu_msix_table: table for mapping cpus to msix index 977 * @cpu_msix_table_sz: table size 978 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands 979 * @scsi_io_cb_idx: shost generated commands 980 * @tm_cb_idx: task management commands 981 * @scsih_cb_idx: scsih internal commands 982 * @transport_cb_idx: transport internal commands 983 * @ctl_cb_idx: clt internal commands 984 * @base_cb_idx: base internal commands 985 * @config_cb_idx: base internal commands 986 * @tm_tr_cb_idx : device removal target reset handshake 987 * @tm_tr_volume_cb_idx : volume removal target reset 988 * @base_cmds: 989 * @transport_cmds: 990 * @scsih_cmds: 991 * @tm_cmds: 992 * @ctl_cmds: 993 * @config_cmds: 994 * @base_add_sg_single: handler for either 32/64 bit sgl's 995 * @event_type: bits indicating which events to log 996 * @event_context: unique id for each logged event 997 * @event_log: event log pointer 998 * @event_masks: events that are masked 999 * @facts: static facts data 1000 * @pfacts: static port facts data 1001 * @manu_pg0: static manufacturing page 0 1002 * @manu_pg10: static manufacturing page 10 1003 * @manu_pg11: static manufacturing page 11 1004 * @bios_pg2: static bios page 2 1005 * @bios_pg3: static bios page 3 1006 * @ioc_pg8: static ioc page 8 1007 * @iounit_pg0: static iounit page 0 1008 * @iounit_pg1: static iounit page 1 1009 * @iounit_pg8: static iounit page 8 1010 * @sas_hba: sas host object 1011 * @sas_expander_list: expander object list 1012 * @sas_node_lock: 1013 * @sas_device_list: sas device object list 1014 * @sas_device_init_list: sas device object list (used only at init time) 1015 * @sas_device_lock: 1016 * @pcie_device_list: pcie device object list 1017 * @pcie_device_init_list: pcie device object list (used only at init time) 1018 * @pcie_device_lock: 1019 * @io_missing_delay: time for IO completed by fw when PDR enabled 1020 * @device_missing_delay: time for device missing by fw when PDR enabled 1021 * @sas_id : used for setting volume target IDs 1022 * @pcie_target_id: used for setting pcie target IDs 1023 * @blocking_handles: bitmask used to identify which devices need blocking 1024 * @pd_handles : bitmask for PD handles 1025 * @pd_handles_sz : size of pd_handle bitmask 1026 * @config_page_sz: config page size 1027 * @config_page: reserve memory for config page payload 1028 * @config_page_dma: 1029 * @hba_queue_depth: hba request queue depth 1030 * @sge_size: sg element size for either 32/64 bit 1031 * @scsiio_depth: SCSI_IO queue depth 1032 * @request_sz: per request frame size 1033 * @request: pool of request frames 1034 * @request_dma: 1035 * @request_dma_sz: 1036 * @scsi_lookup: firmware request tracker list 1037 * @scsi_lookup_lock: 1038 * @free_list: free list of request 1039 * @pending_io_count: 1040 * @reset_wq: 1041 * @chain: pool of chains 1042 * @chain_dma: 1043 * @max_sges_in_main_message: number sg elements in main message 1044 * @max_sges_in_chain_message: number sg elements per chain 1045 * @chains_needed_per_io: max chains per io 1046 * @chain_depth: total chains allocated 1047 * @chain_segment_sz: gives the max number of 1048 * SGEs accommodate on single chain buffer 1049 * @hi_priority_smid: 1050 * @hi_priority: 1051 * @hi_priority_dma: 1052 * @hi_priority_depth: 1053 * @hpr_lookup: 1054 * @hpr_free_list: 1055 * @internal_smid: 1056 * @internal: 1057 * @internal_dma: 1058 * @internal_depth: 1059 * @internal_lookup: 1060 * @internal_free_list: 1061 * @sense: pool of sense 1062 * @sense_dma: 1063 * @sense_dma_pool: 1064 * @reply_depth: hba reply queue depth: 1065 * @reply_sz: per reply frame size: 1066 * @reply: pool of replys: 1067 * @reply_dma: 1068 * @reply_dma_pool: 1069 * @reply_free_queue_depth: reply free depth 1070 * @reply_free: pool for reply free queue (32 bit addr) 1071 * @reply_free_dma: 1072 * @reply_free_dma_pool: 1073 * @reply_free_host_index: tail index in pool to insert free replys 1074 * @reply_post_queue_depth: reply post queue depth 1075 * @reply_post_struct: struct for reply_post_free physical & virt address 1076 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init 1077 * @rdpq_array_enable: rdpq_array support is enabled in the driver 1078 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag 1079 * is assigned only ones 1080 * @reply_queue_count: number of reply queue's 1081 * @reply_queue_list: link list contaning the reply queue info 1082 * @msix96_vector: 96 MSI-X vector support 1083 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue 1084 * @delayed_tr_list: target reset link list 1085 * @delayed_tr_volume_list: volume target reset link list 1086 * @delayed_sc_list: 1087 * @delayed_event_ack_list: 1088 * @temp_sensors_count: flag to carry the number of temperature sensors 1089 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and 1090 * pci resource handling. PCI resource freeing will lead to free 1091 * vital hardware/memory resource, which might be in use by cli/sysfs 1092 * path functions resulting in Null pointer reference followed by kernel 1093 * crash. To avoid the above race condition we use mutex syncrhonization 1094 * which ensures the syncrhonization between cli/sysfs_show path. 1095 */ 1096 struct MPT3SAS_ADAPTER { 1097 struct list_head list; 1098 struct Scsi_Host *shost; 1099 u8 id; 1100 int cpu_count; 1101 char name[MPT_NAME_LENGTH]; 1102 char driver_name[MPT_NAME_LENGTH - 8]; 1103 char tmp_string[MPT_STRING_LENGTH]; 1104 struct pci_dev *pdev; 1105 Mpi2SystemInterfaceRegs_t __iomem *chip; 1106 phys_addr_t chip_phys; 1107 int logging_level; 1108 int fwfault_debug; 1109 u8 ir_firmware; 1110 int bars; 1111 u8 mask_interrupts; 1112 int dma_mask; 1113 1114 /* fw fault handler */ 1115 char fault_reset_work_q_name[20]; 1116 struct workqueue_struct *fault_reset_work_q; 1117 struct delayed_work fault_reset_work; 1118 1119 /* fw event handler */ 1120 char firmware_event_name[20]; 1121 struct workqueue_struct *firmware_event_thread; 1122 spinlock_t fw_event_lock; 1123 struct list_head fw_event_list; 1124 1125 /* misc flags */ 1126 int aen_event_read_flag; 1127 u8 broadcast_aen_busy; 1128 u16 broadcast_aen_pending; 1129 u8 shost_recovery; 1130 u8 got_task_abort_from_ioctl; 1131 1132 struct mutex reset_in_progress_mutex; 1133 spinlock_t ioc_reset_in_progress_lock; 1134 u8 ioc_link_reset_in_progress; 1135 u8 ioc_reset_in_progress_status; 1136 1137 u8 ignore_loginfos; 1138 u8 remove_host; 1139 u8 pci_error_recovery; 1140 u8 wait_for_discovery_to_complete; 1141 u8 is_driver_loading; 1142 u8 port_enable_failed; 1143 u8 start_scan; 1144 u16 start_scan_failed; 1145 1146 u8 msix_enable; 1147 u16 msix_vector_count; 1148 u8 *cpu_msix_table; 1149 u16 cpu_msix_table_sz; 1150 resource_size_t __iomem **reply_post_host_index; 1151 u32 ioc_reset_count; 1152 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; 1153 u32 non_operational_loop; 1154 1155 /* internal commands, callback index */ 1156 u8 scsi_io_cb_idx; 1157 u8 tm_cb_idx; 1158 u8 transport_cb_idx; 1159 u8 scsih_cb_idx; 1160 u8 ctl_cb_idx; 1161 u8 base_cb_idx; 1162 u8 port_enable_cb_idx; 1163 u8 config_cb_idx; 1164 u8 tm_tr_cb_idx; 1165 u8 tm_tr_volume_cb_idx; 1166 u8 tm_sas_control_cb_idx; 1167 struct _internal_cmd base_cmds; 1168 struct _internal_cmd port_enable_cmds; 1169 struct _internal_cmd transport_cmds; 1170 struct _internal_cmd scsih_cmds; 1171 struct _internal_cmd tm_cmds; 1172 struct _internal_cmd ctl_cmds; 1173 struct _internal_cmd config_cmds; 1174 1175 MPT_ADD_SGE base_add_sg_single; 1176 1177 /* function ptr for either IEEE or MPI sg elements */ 1178 MPT_BUILD_SG_SCMD build_sg_scmd; 1179 MPT_BUILD_SG build_sg; 1180 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge; 1181 u16 sge_size_ieee; 1182 u16 hba_mpi_version_belonged; 1183 1184 /* function ptr for MPI sg elements only */ 1185 MPT_BUILD_SG build_sg_mpi; 1186 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi; 1187 1188 /* function ptr for NVMe PRP elements only */ 1189 NVME_BUILD_PRP build_nvme_prp; 1190 1191 /* event log */ 1192 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1193 u32 event_context; 1194 void *event_log; 1195 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1196 1197 /* static config pages */ 1198 struct mpt3sas_facts facts; 1199 struct mpt3sas_port_facts *pfacts; 1200 Mpi2ManufacturingPage0_t manu_pg0; 1201 struct Mpi2ManufacturingPage10_t manu_pg10; 1202 struct Mpi2ManufacturingPage11_t manu_pg11; 1203 Mpi2BiosPage2_t bios_pg2; 1204 Mpi2BiosPage3_t bios_pg3; 1205 Mpi2IOCPage8_t ioc_pg8; 1206 Mpi2IOUnitPage0_t iounit_pg0; 1207 Mpi2IOUnitPage1_t iounit_pg1; 1208 Mpi2IOUnitPage8_t iounit_pg8; 1209 1210 struct _boot_device req_boot_device; 1211 struct _boot_device req_alt_boot_device; 1212 struct _boot_device current_boot_device; 1213 1214 /* sas hba, expander, and device list */ 1215 struct _sas_node sas_hba; 1216 struct list_head sas_expander_list; 1217 spinlock_t sas_node_lock; 1218 struct list_head sas_device_list; 1219 struct list_head sas_device_init_list; 1220 spinlock_t sas_device_lock; 1221 struct list_head pcie_device_list; 1222 struct list_head pcie_device_init_list; 1223 spinlock_t pcie_device_lock; 1224 1225 struct list_head raid_device_list; 1226 spinlock_t raid_device_lock; 1227 u8 io_missing_delay; 1228 u16 device_missing_delay; 1229 int sas_id; 1230 int pcie_target_id; 1231 1232 void *blocking_handles; 1233 void *pd_handles; 1234 u16 pd_handles_sz; 1235 1236 void *pend_os_device_add; 1237 u16 pend_os_device_add_sz; 1238 1239 /* config page */ 1240 u16 config_page_sz; 1241 void *config_page; 1242 dma_addr_t config_page_dma; 1243 void *config_vaddr; 1244 1245 /* scsiio request */ 1246 u16 hba_queue_depth; 1247 u16 sge_size; 1248 u16 scsiio_depth; 1249 u16 request_sz; 1250 u8 *request; 1251 dma_addr_t request_dma; 1252 u32 request_dma_sz; 1253 struct pcie_sg_list *pcie_sg_lookup; 1254 spinlock_t scsi_lookup_lock; 1255 int pending_io_count; 1256 wait_queue_head_t reset_wq; 1257 1258 /* PCIe SGL */ 1259 struct dma_pool *pcie_sgl_dma_pool; 1260 /* Host Page Size */ 1261 u32 page_size; 1262 1263 /* chain */ 1264 struct chain_tracker *chain_lookup; 1265 struct list_head free_chain_list; 1266 struct dma_pool *chain_dma_pool; 1267 ulong chain_pages; 1268 u16 max_sges_in_main_message; 1269 u16 max_sges_in_chain_message; 1270 u16 chains_needed_per_io; 1271 u32 chain_depth; 1272 u16 chain_segment_sz; 1273 u16 chains_per_prp_buffer; 1274 1275 /* hi-priority queue */ 1276 u16 hi_priority_smid; 1277 u8 *hi_priority; 1278 dma_addr_t hi_priority_dma; 1279 u16 hi_priority_depth; 1280 struct request_tracker *hpr_lookup; 1281 struct list_head hpr_free_list; 1282 1283 /* internal queue */ 1284 u16 internal_smid; 1285 u8 *internal; 1286 dma_addr_t internal_dma; 1287 u16 internal_depth; 1288 struct request_tracker *internal_lookup; 1289 struct list_head internal_free_list; 1290 1291 /* sense */ 1292 u8 *sense; 1293 dma_addr_t sense_dma; 1294 struct dma_pool *sense_dma_pool; 1295 1296 /* reply */ 1297 u16 reply_sz; 1298 u8 *reply; 1299 dma_addr_t reply_dma; 1300 u32 reply_dma_max_address; 1301 u32 reply_dma_min_address; 1302 struct dma_pool *reply_dma_pool; 1303 1304 /* reply free queue */ 1305 u16 reply_free_queue_depth; 1306 __le32 *reply_free; 1307 dma_addr_t reply_free_dma; 1308 struct dma_pool *reply_free_dma_pool; 1309 u32 reply_free_host_index; 1310 1311 /* reply post queue */ 1312 u16 reply_post_queue_depth; 1313 struct reply_post_struct *reply_post; 1314 u8 rdpq_array_capable; 1315 u8 rdpq_array_enable; 1316 u8 rdpq_array_enable_assigned; 1317 struct dma_pool *reply_post_free_dma_pool; 1318 u8 reply_queue_count; 1319 struct list_head reply_queue_list; 1320 1321 u8 combined_reply_queue; 1322 u8 combined_reply_index_count; 1323 /* reply post register index */ 1324 resource_size_t **replyPostRegisterIndex; 1325 1326 struct list_head delayed_tr_list; 1327 struct list_head delayed_tr_volume_list; 1328 struct list_head delayed_sc_list; 1329 struct list_head delayed_event_ack_list; 1330 u8 temp_sensors_count; 1331 struct mutex pci_access_mutex; 1332 1333 /* diag buffer support */ 1334 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT]; 1335 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT]; 1336 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT]; 1337 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT]; 1338 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT]; 1339 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23]; 1340 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT]; 1341 u32 ring_buffer_offset; 1342 u32 ring_buffer_sz; 1343 u8 is_warpdrive; 1344 u8 is_mcpu_endpoint; 1345 u8 hide_ir_msg; 1346 u8 mfg_pg10_hide_flag; 1347 u8 hide_drives; 1348 spinlock_t diag_trigger_lock; 1349 u8 diag_trigger_active; 1350 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master; 1351 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event; 1352 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi; 1353 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi; 1354 void *device_remove_in_progress; 1355 u16 device_remove_in_progress_sz; 1356 u8 is_gen35_ioc; 1357 PUT_SMID_IO_FP_HIP put_smid_scsi_io; 1358 1359 }; 1360 1361 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1362 u32 reply); 1363 1364 1365 /* base shared API */ 1366 extern struct list_head mpt3sas_ioc_list; 1367 extern char driver_name[MPT_NAME_LENGTH]; 1368 /* spinlock on list operations over IOCs 1369 * Case: when multiple warpdrive cards(IOCs) are in use 1370 * Each IOC will added to the ioc list structure on initialization. 1371 * Watchdog threads run at regular intervals to check IOC for any 1372 * fault conditions which will trigger the dead_ioc thread to 1373 * deallocate pci resource, resulting deleting the IOC netry from list, 1374 * this deletion need to protected by spinlock to enusre that 1375 * ioc removal is syncrhonized, if not synchronized it might lead to 1376 * list_del corruption as the ioc list is traversed in cli path. 1377 */ 1378 extern spinlock_t gioc_lock; 1379 1380 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc); 1381 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc); 1382 1383 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc); 1384 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc); 1385 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc); 1386 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc); 1387 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, 1388 enum reset_type type); 1389 1390 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1391 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1392 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, 1393 u16 smid); 1394 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1395 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1396 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc); 1397 1398 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1399 u16 handle); 1400 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1401 u16 msix_task); 1402 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1403 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1404 /* hi-priority queue */ 1405 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1406 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, 1407 struct scsi_cmnd *scmd); 1408 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, 1409 struct scsiio_tracker *st); 1410 1411 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1412 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1413 void mpt3sas_base_initialize_callback_handler(void); 1414 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func); 1415 void mpt3sas_base_release_callback_handler(u8 cb_idx); 1416 1417 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1418 u32 reply); 1419 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1420 u8 msix_index, u32 reply); 1421 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, 1422 u32 phys_addr); 1423 1424 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked); 1425 1426 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code); 1427 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, 1428 Mpi2SasIoUnitControlReply_t *mpi_reply, 1429 Mpi2SasIoUnitControlRequest_t *mpi_request); 1430 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, 1431 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request); 1432 1433 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, 1434 u32 *event_type); 1435 1436 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc); 1437 1438 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, 1439 u16 device_missing_delay, u8 io_missing_delay); 1440 1441 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc); 1442 1443 void 1444 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc); 1445 1446 1447 /* scsih shared API */ 1448 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc, 1449 u16 smid); 1450 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, 1451 u32 reply); 1452 void mpt3sas_scsih_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); 1453 1454 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1455 u64 lun, u8 type, u16 smid_task, u16 msix_task, ulong timeout); 1456 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1457 u64 lun, u8 type, u16 smid_task, u16 msix_task, ulong timeout); 1458 1459 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1460 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1461 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1462 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc, 1463 u64 sas_address); 1464 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc, 1465 u16 smid); 1466 1467 struct _sas_node *mpt3sas_scsih_expander_find_by_handle( 1468 struct MPT3SAS_ADAPTER *ioc, u16 handle); 1469 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address( 1470 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1471 struct _sas_device *mpt3sas_get_sdev_by_addr( 1472 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1473 struct _sas_device *__mpt3sas_get_sdev_by_addr( 1474 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1475 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1476 u16 handle); 1477 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1478 u16 handle); 1479 1480 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); 1481 struct _raid_device * 1482 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1483 1484 /* config shared API */ 1485 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1486 u32 reply); 1487 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, 1488 u8 *num_phys); 1489 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc, 1490 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); 1491 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc, 1492 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page, 1493 u16 sz); 1494 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc, 1495 Mpi2ConfigReply_t *mpi_reply, 1496 struct Mpi2ManufacturingPage10_t *config_page); 1497 1498 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1499 Mpi2ConfigReply_t *mpi_reply, 1500 struct Mpi2ManufacturingPage11_t *config_page); 1501 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1502 Mpi2ConfigReply_t *mpi_reply, 1503 struct Mpi2ManufacturingPage11_t *config_page); 1504 1505 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1506 *mpi_reply, Mpi2BiosPage2_t *config_page); 1507 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1508 *mpi_reply, Mpi2BiosPage3_t *config_page); 1509 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1510 *mpi_reply, Mpi2IOUnitPage0_t *config_page); 1511 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1512 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page, 1513 u32 form, u32 handle); 1514 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc, 1515 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page, 1516 u32 form, u32 handle); 1517 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1518 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, 1519 u32 form, u32 handle); 1520 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc, 1521 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, 1522 u32 form, u32 handle); 1523 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, 1524 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, 1525 u16 sz); 1526 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1527 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1528 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc, 1529 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz); 1530 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1531 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1532 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1533 *mpi_reply, Mpi2IOUnitPage8_t *config_page); 1534 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1535 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1536 u16 sz); 1537 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1538 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1539 u16 sz); 1540 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1541 *mpi_reply, Mpi2IOCPage8_t *config_page); 1542 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, 1543 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page, 1544 u32 form, u32 handle); 1545 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, 1546 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page, 1547 u32 phy_number, u16 handle); 1548 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, 1549 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, 1550 u32 form, u32 handle); 1551 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1552 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number); 1553 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1554 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number); 1555 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc, 1556 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 1557 u32 handle); 1558 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1559 u8 *num_pds); 1560 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc, 1561 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, 1562 u32 handle, u16 sz); 1563 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, 1564 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 1565 u32 form, u32 form_specific); 1566 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle, 1567 u16 *volume_handle); 1568 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, 1569 u16 volume_handle, u64 *wwid); 1570 1571 /* ctl shared API */ 1572 extern struct device_attribute *mpt3sas_host_attrs[]; 1573 extern struct device_attribute *mpt3sas_dev_attrs[]; 1574 void mpt3sas_ctl_init(ushort hbas_to_enumerate); 1575 void mpt3sas_ctl_exit(ushort hbas_to_enumerate); 1576 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1577 u32 reply); 1578 void mpt3sas_ctl_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); 1579 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, 1580 u8 msix_index, u32 reply); 1581 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc, 1582 Mpi2EventNotificationReply_t *mpi_reply); 1583 1584 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, 1585 u8 bits_to_register); 1586 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type, 1587 u8 *issue_reset); 1588 1589 /* transport shared API */ 1590 extern struct scsi_transport_template *mpt3sas_transport_template; 1591 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1592 u32 reply); 1593 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, 1594 u16 handle, u64 sas_address); 1595 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1596 u64 sas_address_parent); 1597 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy 1598 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev); 1599 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, 1600 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1, 1601 struct device *parent_dev); 1602 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, 1603 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate); 1604 extern struct sas_function_template mpt3sas_transport_functions; 1605 extern struct scsi_transport_template *mpt3sas_transport_template; 1606 /* trigger data externs */ 1607 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, 1608 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1609 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc, 1610 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1611 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, 1612 u32 tigger_bitmask); 1613 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event, 1614 u16 log_entry_qualifier); 1615 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, 1616 u8 asc, u8 ascq); 1617 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, 1618 u32 loginfo); 1619 1620 /* warpdrive APIs */ 1621 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc); 1622 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, 1623 struct _raid_device *raid_device); 1624 void 1625 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd, 1626 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request); 1627 1628 /* NCQ Prio Handling Check */ 1629 bool scsih_ncq_prio_supp(struct scsi_device *sdev); 1630 1631 #endif /* MPT3SAS_BASE_H_INCLUDED */ 1632