1 /* 2 * Driver for Regulator part of Palmas PMIC Chips 3 * 4 * Copyright 2011-2013 Texas Instruments Inc. 5 * 6 * Author: Graeme Gregory <gg@slimlogic.co.uk> 7 * Author: Ian Lartey <ian@slimlogic.co.uk> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 * 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/init.h> 19 #include <linux/err.h> 20 #include <linux/platform_device.h> 21 #include <linux/regulator/driver.h> 22 #include <linux/regulator/machine.h> 23 #include <linux/slab.h> 24 #include <linux/regmap.h> 25 #include <linux/mfd/palmas.h> 26 #include <linux/of.h> 27 #include <linux/of_platform.h> 28 #include <linux/regulator/of_regulator.h> 29 30 static const struct regulator_linear_range smps_low_ranges[] = { 31 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), 32 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0), 33 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000), 34 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0), 35 }; 36 37 static const struct regulator_linear_range smps_high_ranges[] = { 38 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), 39 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0), 40 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000), 41 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0), 42 }; 43 44 static struct palmas_regs_info palmas_generic_regs_info[] = { 45 { 46 .name = "SMPS12", 47 .sname = "smps1-in", 48 .vsel_addr = PALMAS_SMPS12_VOLTAGE, 49 .ctrl_addr = PALMAS_SMPS12_CTRL, 50 .tstep_addr = PALMAS_SMPS12_TSTEP, 51 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, 52 }, 53 { 54 .name = "SMPS123", 55 .sname = "smps1-in", 56 .vsel_addr = PALMAS_SMPS12_VOLTAGE, 57 .ctrl_addr = PALMAS_SMPS12_CTRL, 58 .tstep_addr = PALMAS_SMPS12_TSTEP, 59 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, 60 }, 61 { 62 .name = "SMPS3", 63 .sname = "smps3-in", 64 .vsel_addr = PALMAS_SMPS3_VOLTAGE, 65 .ctrl_addr = PALMAS_SMPS3_CTRL, 66 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3, 67 }, 68 { 69 .name = "SMPS45", 70 .sname = "smps4-in", 71 .vsel_addr = PALMAS_SMPS45_VOLTAGE, 72 .ctrl_addr = PALMAS_SMPS45_CTRL, 73 .tstep_addr = PALMAS_SMPS45_TSTEP, 74 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, 75 }, 76 { 77 .name = "SMPS457", 78 .sname = "smps4-in", 79 .vsel_addr = PALMAS_SMPS45_VOLTAGE, 80 .ctrl_addr = PALMAS_SMPS45_CTRL, 81 .tstep_addr = PALMAS_SMPS45_TSTEP, 82 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, 83 }, 84 { 85 .name = "SMPS6", 86 .sname = "smps6-in", 87 .vsel_addr = PALMAS_SMPS6_VOLTAGE, 88 .ctrl_addr = PALMAS_SMPS6_CTRL, 89 .tstep_addr = PALMAS_SMPS6_TSTEP, 90 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6, 91 }, 92 { 93 .name = "SMPS7", 94 .sname = "smps7-in", 95 .vsel_addr = PALMAS_SMPS7_VOLTAGE, 96 .ctrl_addr = PALMAS_SMPS7_CTRL, 97 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7, 98 }, 99 { 100 .name = "SMPS8", 101 .sname = "smps8-in", 102 .vsel_addr = PALMAS_SMPS8_VOLTAGE, 103 .ctrl_addr = PALMAS_SMPS8_CTRL, 104 .tstep_addr = PALMAS_SMPS8_TSTEP, 105 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8, 106 }, 107 { 108 .name = "SMPS9", 109 .sname = "smps9-in", 110 .vsel_addr = PALMAS_SMPS9_VOLTAGE, 111 .ctrl_addr = PALMAS_SMPS9_CTRL, 112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9, 113 }, 114 { 115 .name = "SMPS10_OUT2", 116 .sname = "smps10-in", 117 .ctrl_addr = PALMAS_SMPS10_CTRL, 118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, 119 }, 120 { 121 .name = "SMPS10_OUT1", 122 .sname = "smps10-out2", 123 .ctrl_addr = PALMAS_SMPS10_CTRL, 124 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, 125 }, 126 { 127 .name = "LDO1", 128 .sname = "ldo1-in", 129 .vsel_addr = PALMAS_LDO1_VOLTAGE, 130 .ctrl_addr = PALMAS_LDO1_CTRL, 131 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1, 132 }, 133 { 134 .name = "LDO2", 135 .sname = "ldo2-in", 136 .vsel_addr = PALMAS_LDO2_VOLTAGE, 137 .ctrl_addr = PALMAS_LDO2_CTRL, 138 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2, 139 }, 140 { 141 .name = "LDO3", 142 .sname = "ldo3-in", 143 .vsel_addr = PALMAS_LDO3_VOLTAGE, 144 .ctrl_addr = PALMAS_LDO3_CTRL, 145 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3, 146 }, 147 { 148 .name = "LDO4", 149 .sname = "ldo4-in", 150 .vsel_addr = PALMAS_LDO4_VOLTAGE, 151 .ctrl_addr = PALMAS_LDO4_CTRL, 152 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4, 153 }, 154 { 155 .name = "LDO5", 156 .sname = "ldo5-in", 157 .vsel_addr = PALMAS_LDO5_VOLTAGE, 158 .ctrl_addr = PALMAS_LDO5_CTRL, 159 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5, 160 }, 161 { 162 .name = "LDO6", 163 .sname = "ldo6-in", 164 .vsel_addr = PALMAS_LDO6_VOLTAGE, 165 .ctrl_addr = PALMAS_LDO6_CTRL, 166 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6, 167 }, 168 { 169 .name = "LDO7", 170 .sname = "ldo7-in", 171 .vsel_addr = PALMAS_LDO7_VOLTAGE, 172 .ctrl_addr = PALMAS_LDO7_CTRL, 173 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7, 174 }, 175 { 176 .name = "LDO8", 177 .sname = "ldo8-in", 178 .vsel_addr = PALMAS_LDO8_VOLTAGE, 179 .ctrl_addr = PALMAS_LDO8_CTRL, 180 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8, 181 }, 182 { 183 .name = "LDO9", 184 .sname = "ldo9-in", 185 .vsel_addr = PALMAS_LDO9_VOLTAGE, 186 .ctrl_addr = PALMAS_LDO9_CTRL, 187 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9, 188 }, 189 { 190 .name = "LDOLN", 191 .sname = "ldoln-in", 192 .vsel_addr = PALMAS_LDOLN_VOLTAGE, 193 .ctrl_addr = PALMAS_LDOLN_CTRL, 194 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN, 195 }, 196 { 197 .name = "LDOUSB", 198 .sname = "ldousb-in", 199 .vsel_addr = PALMAS_LDOUSB_VOLTAGE, 200 .ctrl_addr = PALMAS_LDOUSB_CTRL, 201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB, 202 }, 203 { 204 .name = "REGEN1", 205 .ctrl_addr = PALMAS_REGEN1_CTRL, 206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1, 207 }, 208 { 209 .name = "REGEN2", 210 .ctrl_addr = PALMAS_REGEN2_CTRL, 211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2, 212 }, 213 { 214 .name = "REGEN3", 215 .ctrl_addr = PALMAS_REGEN3_CTRL, 216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3, 217 }, 218 { 219 .name = "SYSEN1", 220 .ctrl_addr = PALMAS_SYSEN1_CTRL, 221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1, 222 }, 223 { 224 .name = "SYSEN2", 225 .ctrl_addr = PALMAS_SYSEN2_CTRL, 226 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2, 227 }, 228 }; 229 230 static struct palmas_regs_info tps65917_regs_info[] = { 231 { 232 .name = "SMPS1", 233 .sname = "smps1-in", 234 .vsel_addr = TPS65917_SMPS1_VOLTAGE, 235 .ctrl_addr = TPS65917_SMPS1_CTRL, 236 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1, 237 }, 238 { 239 .name = "SMPS2", 240 .sname = "smps2-in", 241 .vsel_addr = TPS65917_SMPS2_VOLTAGE, 242 .ctrl_addr = TPS65917_SMPS2_CTRL, 243 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2, 244 }, 245 { 246 .name = "SMPS3", 247 .sname = "smps3-in", 248 .vsel_addr = TPS65917_SMPS3_VOLTAGE, 249 .ctrl_addr = TPS65917_SMPS3_CTRL, 250 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3, 251 }, 252 { 253 .name = "SMPS4", 254 .sname = "smps4-in", 255 .vsel_addr = TPS65917_SMPS4_VOLTAGE, 256 .ctrl_addr = TPS65917_SMPS4_CTRL, 257 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4, 258 }, 259 { 260 .name = "SMPS5", 261 .sname = "smps5-in", 262 .vsel_addr = TPS65917_SMPS5_VOLTAGE, 263 .ctrl_addr = TPS65917_SMPS5_CTRL, 264 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5, 265 }, 266 { 267 .name = "LDO1", 268 .sname = "ldo1-in", 269 .vsel_addr = TPS65917_LDO1_VOLTAGE, 270 .ctrl_addr = TPS65917_LDO1_CTRL, 271 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1, 272 }, 273 { 274 .name = "LDO2", 275 .sname = "ldo2-in", 276 .vsel_addr = TPS65917_LDO2_VOLTAGE, 277 .ctrl_addr = TPS65917_LDO2_CTRL, 278 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2, 279 }, 280 { 281 .name = "LDO3", 282 .sname = "ldo3-in", 283 .vsel_addr = TPS65917_LDO3_VOLTAGE, 284 .ctrl_addr = TPS65917_LDO3_CTRL, 285 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3, 286 }, 287 { 288 .name = "LDO4", 289 .sname = "ldo4-in", 290 .vsel_addr = TPS65917_LDO4_VOLTAGE, 291 .ctrl_addr = TPS65917_LDO4_CTRL, 292 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4, 293 }, 294 { 295 .name = "LDO5", 296 .sname = "ldo5-in", 297 .vsel_addr = TPS65917_LDO5_VOLTAGE, 298 .ctrl_addr = TPS65917_LDO5_CTRL, 299 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5, 300 }, 301 { 302 .name = "REGEN1", 303 .ctrl_addr = TPS65917_REGEN1_CTRL, 304 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1, 305 }, 306 { 307 .name = "REGEN2", 308 .ctrl_addr = TPS65917_REGEN2_CTRL, 309 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2, 310 }, 311 { 312 .name = "REGEN3", 313 .ctrl_addr = TPS65917_REGEN3_CTRL, 314 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3, 315 }, 316 }; 317 318 #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ 319 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ 320 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ 321 .reg_offset = _offset, \ 322 .bit_pos = _pos, \ 323 } 324 325 static struct palmas_sleep_requestor_info palma_sleep_req_info[] = { 326 EXTERNAL_REQUESTOR(REGEN1, 0, 0), 327 EXTERNAL_REQUESTOR(REGEN2, 0, 1), 328 EXTERNAL_REQUESTOR(SYSEN1, 0, 2), 329 EXTERNAL_REQUESTOR(SYSEN2, 0, 3), 330 EXTERNAL_REQUESTOR(CLK32KG, 0, 4), 331 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5), 332 EXTERNAL_REQUESTOR(REGEN3, 0, 6), 333 EXTERNAL_REQUESTOR(SMPS12, 1, 0), 334 EXTERNAL_REQUESTOR(SMPS3, 1, 1), 335 EXTERNAL_REQUESTOR(SMPS45, 1, 2), 336 EXTERNAL_REQUESTOR(SMPS6, 1, 3), 337 EXTERNAL_REQUESTOR(SMPS7, 1, 4), 338 EXTERNAL_REQUESTOR(SMPS8, 1, 5), 339 EXTERNAL_REQUESTOR(SMPS9, 1, 6), 340 EXTERNAL_REQUESTOR(SMPS10, 1, 7), 341 EXTERNAL_REQUESTOR(LDO1, 2, 0), 342 EXTERNAL_REQUESTOR(LDO2, 2, 1), 343 EXTERNAL_REQUESTOR(LDO3, 2, 2), 344 EXTERNAL_REQUESTOR(LDO4, 2, 3), 345 EXTERNAL_REQUESTOR(LDO5, 2, 4), 346 EXTERNAL_REQUESTOR(LDO6, 2, 5), 347 EXTERNAL_REQUESTOR(LDO7, 2, 6), 348 EXTERNAL_REQUESTOR(LDO8, 2, 7), 349 EXTERNAL_REQUESTOR(LDO9, 3, 0), 350 EXTERNAL_REQUESTOR(LDOLN, 3, 1), 351 EXTERNAL_REQUESTOR(LDOUSB, 3, 2), 352 }; 353 354 #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ 355 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \ 356 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \ 357 .reg_offset = _offset, \ 358 .bit_pos = _pos, \ 359 } 360 361 static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = { 362 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0), 363 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1), 364 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6), 365 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0), 366 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1), 367 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2), 368 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3), 369 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4), 370 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0), 371 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1), 372 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2), 373 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3), 374 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4), 375 }; 376 377 static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500}; 378 379 #define SMPS_CTRL_MODE_OFF 0x00 380 #define SMPS_CTRL_MODE_ON 0x01 381 #define SMPS_CTRL_MODE_ECO 0x02 382 #define SMPS_CTRL_MODE_PWM 0x03 383 384 #define PALMAS_SMPS_NUM_VOLTAGES 122 385 #define PALMAS_SMPS10_NUM_VOLTAGES 2 386 #define PALMAS_LDO_NUM_VOLTAGES 50 387 388 #define SMPS10_VSEL (1<<3) 389 #define SMPS10_BOOST_EN (1<<2) 390 #define SMPS10_BYPASS_EN (1<<1) 391 #define SMPS10_SWITCH_EN (1<<0) 392 393 #define REGULATOR_SLAVE 0 394 395 static int palmas_smps_read(struct palmas *palmas, unsigned int reg, 396 unsigned int *dest) 397 { 398 unsigned int addr; 399 400 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); 401 402 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); 403 } 404 405 static int palmas_smps_write(struct palmas *palmas, unsigned int reg, 406 unsigned int value) 407 { 408 unsigned int addr; 409 410 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); 411 412 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); 413 } 414 415 static int palmas_ldo_read(struct palmas *palmas, unsigned int reg, 416 unsigned int *dest) 417 { 418 unsigned int addr; 419 420 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); 421 422 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); 423 } 424 425 static int palmas_ldo_write(struct palmas *palmas, unsigned int reg, 426 unsigned int value) 427 { 428 unsigned int addr; 429 430 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); 431 432 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); 433 } 434 435 static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode) 436 { 437 int id = rdev_get_id(dev); 438 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 439 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 440 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 441 unsigned int reg; 442 bool rail_enable = true; 443 444 palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®); 445 446 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 447 448 if (reg == SMPS_CTRL_MODE_OFF) 449 rail_enable = false; 450 451 switch (mode) { 452 case REGULATOR_MODE_NORMAL: 453 reg |= SMPS_CTRL_MODE_ON; 454 break; 455 case REGULATOR_MODE_IDLE: 456 reg |= SMPS_CTRL_MODE_ECO; 457 break; 458 case REGULATOR_MODE_FAST: 459 reg |= SMPS_CTRL_MODE_PWM; 460 break; 461 default: 462 return -EINVAL; 463 } 464 465 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 466 if (rail_enable) 467 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg); 468 469 /* Switch the enable value to ensure this is used for enable */ 470 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; 471 472 return 0; 473 } 474 475 static unsigned int palmas_get_mode_smps(struct regulator_dev *dev) 476 { 477 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 478 int id = rdev_get_id(dev); 479 unsigned int reg; 480 481 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 482 483 switch (reg) { 484 case SMPS_CTRL_MODE_ON: 485 return REGULATOR_MODE_NORMAL; 486 case SMPS_CTRL_MODE_ECO: 487 return REGULATOR_MODE_IDLE; 488 case SMPS_CTRL_MODE_PWM: 489 return REGULATOR_MODE_FAST; 490 } 491 492 return 0; 493 } 494 495 static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev, 496 int ramp_delay) 497 { 498 int id = rdev_get_id(rdev); 499 struct palmas_pmic *pmic = rdev_get_drvdata(rdev); 500 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 501 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 502 unsigned int reg = 0; 503 int ret; 504 505 /* SMPS3 and SMPS7 do not have tstep_addr setting */ 506 switch (id) { 507 case PALMAS_REG_SMPS3: 508 case PALMAS_REG_SMPS7: 509 return 0; 510 } 511 512 if (ramp_delay <= 0) 513 reg = 0; 514 else if (ramp_delay <= 2500) 515 reg = 3; 516 else if (ramp_delay <= 5000) 517 reg = 2; 518 else 519 reg = 1; 520 521 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg); 522 if (ret < 0) { 523 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret); 524 return ret; 525 } 526 527 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg]; 528 return ret; 529 } 530 531 static const struct regulator_ops palmas_ops_smps = { 532 .is_enabled = regulator_is_enabled_regmap, 533 .enable = regulator_enable_regmap, 534 .disable = regulator_disable_regmap, 535 .set_mode = palmas_set_mode_smps, 536 .get_mode = palmas_get_mode_smps, 537 .get_voltage_sel = regulator_get_voltage_sel_regmap, 538 .set_voltage_sel = regulator_set_voltage_sel_regmap, 539 .list_voltage = regulator_list_voltage_linear_range, 540 .map_voltage = regulator_map_voltage_linear_range, 541 .set_voltage_time_sel = regulator_set_voltage_time_sel, 542 .set_ramp_delay = palmas_smps_set_ramp_delay, 543 }; 544 545 static const struct regulator_ops palmas_ops_ext_control_smps = { 546 .set_mode = palmas_set_mode_smps, 547 .get_mode = palmas_get_mode_smps, 548 .get_voltage_sel = regulator_get_voltage_sel_regmap, 549 .set_voltage_sel = regulator_set_voltage_sel_regmap, 550 .list_voltage = regulator_list_voltage_linear_range, 551 .map_voltage = regulator_map_voltage_linear_range, 552 .set_voltage_time_sel = regulator_set_voltage_time_sel, 553 .set_ramp_delay = palmas_smps_set_ramp_delay, 554 }; 555 556 static const struct regulator_ops palmas_ops_smps10 = { 557 .is_enabled = regulator_is_enabled_regmap, 558 .enable = regulator_enable_regmap, 559 .disable = regulator_disable_regmap, 560 .get_voltage_sel = regulator_get_voltage_sel_regmap, 561 .set_voltage_sel = regulator_set_voltage_sel_regmap, 562 .list_voltage = regulator_list_voltage_linear, 563 .map_voltage = regulator_map_voltage_linear, 564 .set_bypass = regulator_set_bypass_regmap, 565 .get_bypass = regulator_get_bypass_regmap, 566 }; 567 568 static const struct regulator_ops tps65917_ops_smps = { 569 .is_enabled = regulator_is_enabled_regmap, 570 .enable = regulator_enable_regmap, 571 .disable = regulator_disable_regmap, 572 .set_mode = palmas_set_mode_smps, 573 .get_mode = palmas_get_mode_smps, 574 .get_voltage_sel = regulator_get_voltage_sel_regmap, 575 .set_voltage_sel = regulator_set_voltage_sel_regmap, 576 .list_voltage = regulator_list_voltage_linear_range, 577 .map_voltage = regulator_map_voltage_linear_range, 578 .set_voltage_time_sel = regulator_set_voltage_time_sel, 579 }; 580 581 static const struct regulator_ops tps65917_ops_ext_control_smps = { 582 .set_mode = palmas_set_mode_smps, 583 .get_mode = palmas_get_mode_smps, 584 .get_voltage_sel = regulator_get_voltage_sel_regmap, 585 .set_voltage_sel = regulator_set_voltage_sel_regmap, 586 .list_voltage = regulator_list_voltage_linear_range, 587 .map_voltage = regulator_map_voltage_linear_range, 588 }; 589 590 static int palmas_is_enabled_ldo(struct regulator_dev *dev) 591 { 592 int id = rdev_get_id(dev); 593 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 594 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 595 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 596 unsigned int reg; 597 598 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®); 599 600 reg &= PALMAS_LDO1_CTRL_STATUS; 601 602 return !!(reg); 603 } 604 605 static const struct regulator_ops palmas_ops_ldo = { 606 .is_enabled = palmas_is_enabled_ldo, 607 .enable = regulator_enable_regmap, 608 .disable = regulator_disable_regmap, 609 .get_voltage_sel = regulator_get_voltage_sel_regmap, 610 .set_voltage_sel = regulator_set_voltage_sel_regmap, 611 .list_voltage = regulator_list_voltage_linear, 612 .map_voltage = regulator_map_voltage_linear, 613 }; 614 615 static const struct regulator_ops palmas_ops_ldo9 = { 616 .is_enabled = palmas_is_enabled_ldo, 617 .enable = regulator_enable_regmap, 618 .disable = regulator_disable_regmap, 619 .get_voltage_sel = regulator_get_voltage_sel_regmap, 620 .set_voltage_sel = regulator_set_voltage_sel_regmap, 621 .list_voltage = regulator_list_voltage_linear, 622 .map_voltage = regulator_map_voltage_linear, 623 .set_bypass = regulator_set_bypass_regmap, 624 .get_bypass = regulator_get_bypass_regmap, 625 }; 626 627 static const struct regulator_ops palmas_ops_ext_control_ldo = { 628 .get_voltage_sel = regulator_get_voltage_sel_regmap, 629 .set_voltage_sel = regulator_set_voltage_sel_regmap, 630 .list_voltage = regulator_list_voltage_linear, 631 .map_voltage = regulator_map_voltage_linear, 632 }; 633 634 static const struct regulator_ops palmas_ops_extreg = { 635 .is_enabled = regulator_is_enabled_regmap, 636 .enable = regulator_enable_regmap, 637 .disable = regulator_disable_regmap, 638 }; 639 640 static const struct regulator_ops palmas_ops_ext_control_extreg = { 641 }; 642 643 static const struct regulator_ops tps65917_ops_ldo = { 644 .is_enabled = palmas_is_enabled_ldo, 645 .enable = regulator_enable_regmap, 646 .disable = regulator_disable_regmap, 647 .get_voltage_sel = regulator_get_voltage_sel_regmap, 648 .set_voltage_sel = regulator_set_voltage_sel_regmap, 649 .list_voltage = regulator_list_voltage_linear, 650 .map_voltage = regulator_map_voltage_linear, 651 .set_voltage_time_sel = regulator_set_voltage_time_sel, 652 }; 653 654 static const struct regulator_ops tps65917_ops_ldo_1_2 = { 655 .is_enabled = palmas_is_enabled_ldo, 656 .enable = regulator_enable_regmap, 657 .disable = regulator_disable_regmap, 658 .get_voltage_sel = regulator_get_voltage_sel_regmap, 659 .set_voltage_sel = regulator_set_voltage_sel_regmap, 660 .list_voltage = regulator_list_voltage_linear, 661 .map_voltage = regulator_map_voltage_linear, 662 .set_voltage_time_sel = regulator_set_voltage_time_sel, 663 .set_bypass = regulator_set_bypass_regmap, 664 .get_bypass = regulator_get_bypass_regmap, 665 }; 666 667 static int palmas_regulator_config_external(struct palmas *palmas, int id, 668 struct palmas_reg_init *reg_init) 669 { 670 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 671 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 672 int ret; 673 674 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id, 675 reg_init->roof_floor, true); 676 if (ret < 0) 677 dev_err(palmas->dev, 678 "Ext control config for regulator %d failed %d\n", 679 id, ret); 680 return ret; 681 } 682 683 /* 684 * setup the hardware based sleep configuration of the SMPS/LDO regulators 685 * from the platform data. This is different to the software based control 686 * supported by the regulator framework as it is controlled by toggling 687 * pins on the PMIC such as PREQ, SYSEN, ... 688 */ 689 static int palmas_smps_init(struct palmas *palmas, int id, 690 struct palmas_reg_init *reg_init) 691 { 692 unsigned int reg; 693 int ret; 694 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 695 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 696 unsigned int addr = rinfo->ctrl_addr; 697 698 ret = palmas_smps_read(palmas, addr, ®); 699 if (ret) 700 return ret; 701 702 switch (id) { 703 case PALMAS_REG_SMPS10_OUT1: 704 case PALMAS_REG_SMPS10_OUT2: 705 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK; 706 if (reg_init->mode_sleep) 707 reg |= reg_init->mode_sleep << 708 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT; 709 break; 710 default: 711 if (reg_init->warm_reset) 712 reg |= PALMAS_SMPS12_CTRL_WR_S; 713 else 714 reg &= ~PALMAS_SMPS12_CTRL_WR_S; 715 716 if (reg_init->roof_floor) 717 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; 718 else 719 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; 720 721 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK; 722 if (reg_init->mode_sleep) 723 reg |= reg_init->mode_sleep << 724 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT; 725 } 726 727 ret = palmas_smps_write(palmas, addr, reg); 728 if (ret) 729 return ret; 730 731 if (rinfo->vsel_addr && reg_init->vsel) { 732 733 reg = reg_init->vsel; 734 735 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg); 736 if (ret) 737 return ret; 738 } 739 740 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) && 741 (id != PALMAS_REG_SMPS10_OUT2)) { 742 /* Enable externally controlled regulator */ 743 ret = palmas_smps_read(palmas, addr, ®); 744 if (ret < 0) 745 return ret; 746 747 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) { 748 reg |= SMPS_CTRL_MODE_ON; 749 ret = palmas_smps_write(palmas, addr, reg); 750 if (ret < 0) 751 return ret; 752 } 753 return palmas_regulator_config_external(palmas, id, reg_init); 754 } 755 return 0; 756 } 757 758 static int palmas_ldo_init(struct palmas *palmas, int id, 759 struct palmas_reg_init *reg_init) 760 { 761 unsigned int reg; 762 unsigned int addr; 763 int ret; 764 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 765 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 766 767 addr = rinfo->ctrl_addr; 768 769 ret = palmas_ldo_read(palmas, addr, ®); 770 if (ret) 771 return ret; 772 773 if (reg_init->warm_reset) 774 reg |= PALMAS_LDO1_CTRL_WR_S; 775 else 776 reg &= ~PALMAS_LDO1_CTRL_WR_S; 777 778 if (reg_init->mode_sleep) 779 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP; 780 else 781 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP; 782 783 ret = palmas_ldo_write(palmas, addr, reg); 784 if (ret) 785 return ret; 786 787 if (reg_init->roof_floor) { 788 /* Enable externally controlled regulator */ 789 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE, 790 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE, 791 PALMAS_LDO1_CTRL_MODE_ACTIVE); 792 if (ret < 0) { 793 dev_err(palmas->dev, 794 "LDO Register 0x%02x update failed %d\n", 795 addr, ret); 796 return ret; 797 } 798 return palmas_regulator_config_external(palmas, id, reg_init); 799 } 800 return 0; 801 } 802 803 static int palmas_extreg_init(struct palmas *palmas, int id, 804 struct palmas_reg_init *reg_init) 805 { 806 unsigned int addr; 807 int ret; 808 unsigned int val = 0; 809 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 810 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 811 812 addr = rinfo->ctrl_addr; 813 814 if (reg_init->mode_sleep) 815 val = PALMAS_REGEN1_CTRL_MODE_SLEEP; 816 817 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 818 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val); 819 if (ret < 0) { 820 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n", 821 addr, ret); 822 return ret; 823 } 824 825 if (reg_init->roof_floor) { 826 /* Enable externally controlled regulator */ 827 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 828 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE, 829 PALMAS_REGEN1_CTRL_MODE_ACTIVE); 830 if (ret < 0) { 831 dev_err(palmas->dev, 832 "Resource Register 0x%02x update failed %d\n", 833 addr, ret); 834 return ret; 835 } 836 return palmas_regulator_config_external(palmas, id, reg_init); 837 } 838 return 0; 839 } 840 841 static void palmas_enable_ldo8_track(struct palmas *palmas) 842 { 843 unsigned int reg; 844 unsigned int addr; 845 int ret; 846 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 847 struct palmas_regs_info *rinfo; 848 849 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8]; 850 addr = rinfo->ctrl_addr; 851 852 ret = palmas_ldo_read(palmas, addr, ®); 853 if (ret) { 854 dev_err(palmas->dev, "Error in reading ldo8 control reg\n"); 855 return; 856 } 857 858 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN; 859 ret = palmas_ldo_write(palmas, addr, reg); 860 if (ret < 0) { 861 dev_err(palmas->dev, "Error in enabling tracking mode\n"); 862 return; 863 } 864 /* 865 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8 866 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two, 867 * and can be set from 0.45 to 1.65 V. 868 */ 869 addr = rinfo->vsel_addr; 870 ret = palmas_ldo_read(palmas, addr, ®); 871 if (ret) { 872 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n"); 873 return; 874 } 875 876 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK; 877 ret = palmas_ldo_write(palmas, addr, reg); 878 if (ret < 0) 879 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n"); 880 881 return; 882 } 883 884 static int palmas_ldo_registration(struct palmas_pmic *pmic, 885 struct palmas_pmic_driver_data *ddata, 886 struct palmas_pmic_platform_data *pdata, 887 const char *pdev_name, 888 struct regulator_config config) 889 { 890 int id, ret; 891 struct regulator_dev *rdev; 892 struct palmas_reg_init *reg_init; 893 struct palmas_regs_info *rinfo; 894 struct regulator_desc *desc; 895 896 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 897 if (pdata && pdata->reg_init[id]) 898 reg_init = pdata->reg_init[id]; 899 else 900 reg_init = NULL; 901 902 rinfo = &ddata->palmas_regs_info[id]; 903 /* Miss out regulators which are not available due 904 * to alternate functions. 905 */ 906 907 /* Register the regulators */ 908 desc = &pmic->desc[id]; 909 desc->name = rinfo->name; 910 desc->id = id; 911 desc->type = REGULATOR_VOLTAGE; 912 desc->owner = THIS_MODULE; 913 914 if (id < PALMAS_REG_REGEN1) { 915 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 916 if (reg_init && reg_init->roof_floor) 917 desc->ops = &palmas_ops_ext_control_ldo; 918 else 919 desc->ops = &palmas_ops_ldo; 920 desc->min_uV = 900000; 921 desc->uV_step = 50000; 922 desc->linear_min_sel = 1; 923 desc->enable_time = 500; 924 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 925 rinfo->vsel_addr); 926 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 927 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 928 rinfo->ctrl_addr); 929 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 930 931 /* Check if LDO8 is in tracking mode or not */ 932 if (pdata && (id == PALMAS_REG_LDO8) && 933 pdata->enable_ldo8_tracking) { 934 palmas_enable_ldo8_track(pmic->palmas); 935 desc->min_uV = 450000; 936 desc->uV_step = 25000; 937 } 938 939 /* LOD6 in vibrator mode will have enable time 2000us */ 940 if (pdata && pdata->ldo6_vibrator && 941 (id == PALMAS_REG_LDO6)) 942 desc->enable_time = 2000; 943 944 if (id == PALMAS_REG_LDO9) { 945 desc->ops = &palmas_ops_ldo9; 946 desc->bypass_reg = desc->enable_reg; 947 desc->bypass_val_on = 948 PALMAS_LDO9_CTRL_LDO_BYPASS_EN; 949 desc->bypass_mask = 950 PALMAS_LDO9_CTRL_LDO_BYPASS_EN; 951 } 952 } else { 953 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3) 954 continue; 955 956 desc->n_voltages = 1; 957 if (reg_init && reg_init->roof_floor) 958 desc->ops = &palmas_ops_ext_control_extreg; 959 else 960 desc->ops = &palmas_ops_extreg; 961 desc->enable_reg = 962 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 963 rinfo->ctrl_addr); 964 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 965 } 966 967 if (pdata) 968 config.init_data = pdata->reg_data[id]; 969 else 970 config.init_data = NULL; 971 972 desc->supply_name = rinfo->sname; 973 config.of_node = ddata->palmas_matches[id].of_node; 974 975 rdev = devm_regulator_register(pmic->dev, desc, &config); 976 if (IS_ERR(rdev)) { 977 dev_err(pmic->dev, 978 "failed to register %s regulator\n", 979 pdev_name); 980 return PTR_ERR(rdev); 981 } 982 983 /* Save regulator for cleanup */ 984 pmic->rdev[id] = rdev; 985 986 /* Initialise sleep/init values from platform data */ 987 if (pdata) { 988 reg_init = pdata->reg_init[id]; 989 if (reg_init) { 990 if (id <= ddata->ldo_end) 991 ret = palmas_ldo_init(pmic->palmas, id, 992 reg_init); 993 else 994 ret = palmas_extreg_init(pmic->palmas, 995 id, reg_init); 996 if (ret) 997 return ret; 998 } 999 } 1000 } 1001 1002 return 0; 1003 } 1004 1005 static int tps65917_ldo_registration(struct palmas_pmic *pmic, 1006 struct palmas_pmic_driver_data *ddata, 1007 struct palmas_pmic_platform_data *pdata, 1008 const char *pdev_name, 1009 struct regulator_config config) 1010 { 1011 int id, ret; 1012 struct regulator_dev *rdev; 1013 struct palmas_reg_init *reg_init; 1014 struct palmas_regs_info *rinfo; 1015 struct regulator_desc *desc; 1016 1017 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 1018 if (pdata && pdata->reg_init[id]) 1019 reg_init = pdata->reg_init[id]; 1020 else 1021 reg_init = NULL; 1022 1023 /* Miss out regulators which are not available due 1024 * to alternate functions. 1025 */ 1026 rinfo = &ddata->palmas_regs_info[id]; 1027 1028 /* Register the regulators */ 1029 desc = &pmic->desc[id]; 1030 desc->name = rinfo->name; 1031 desc->id = id; 1032 desc->type = REGULATOR_VOLTAGE; 1033 desc->owner = THIS_MODULE; 1034 1035 if (id < TPS65917_REG_REGEN1) { 1036 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 1037 if (reg_init && reg_init->roof_floor) 1038 desc->ops = &palmas_ops_ext_control_ldo; 1039 else 1040 desc->ops = &tps65917_ops_ldo; 1041 desc->min_uV = 900000; 1042 desc->uV_step = 50000; 1043 desc->linear_min_sel = 1; 1044 desc->enable_time = 500; 1045 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1046 rinfo->vsel_addr); 1047 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 1048 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1049 rinfo->ctrl_addr); 1050 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 1051 /* 1052 * To be confirmed. Discussion on going with PMIC Team. 1053 * It is of the order of ~60mV/uS. 1054 */ 1055 desc->ramp_delay = 2500; 1056 if (id == TPS65917_REG_LDO1 || 1057 id == TPS65917_REG_LDO2) { 1058 desc->ops = &tps65917_ops_ldo_1_2; 1059 desc->bypass_reg = desc->enable_reg; 1060 desc->bypass_val_on = 1061 TPS65917_LDO1_CTRL_BYPASS_EN; 1062 desc->bypass_mask = 1063 TPS65917_LDO1_CTRL_BYPASS_EN; 1064 } 1065 } else { 1066 desc->n_voltages = 1; 1067 if (reg_init && reg_init->roof_floor) 1068 desc->ops = &palmas_ops_ext_control_extreg; 1069 else 1070 desc->ops = &palmas_ops_extreg; 1071 desc->enable_reg = 1072 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 1073 rinfo->ctrl_addr); 1074 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 1075 } 1076 1077 if (pdata) 1078 config.init_data = pdata->reg_data[id]; 1079 else 1080 config.init_data = NULL; 1081 1082 desc->supply_name = rinfo->sname; 1083 config.of_node = ddata->palmas_matches[id].of_node; 1084 1085 rdev = devm_regulator_register(pmic->dev, desc, &config); 1086 if (IS_ERR(rdev)) { 1087 dev_err(pmic->dev, 1088 "failed to register %s regulator\n", 1089 pdev_name); 1090 return PTR_ERR(rdev); 1091 } 1092 1093 /* Save regulator for cleanup */ 1094 pmic->rdev[id] = rdev; 1095 1096 /* Initialise sleep/init values from platform data */ 1097 if (pdata) { 1098 reg_init = pdata->reg_init[id]; 1099 if (reg_init) { 1100 if (id < TPS65917_REG_REGEN1) 1101 ret = palmas_ldo_init(pmic->palmas, 1102 id, reg_init); 1103 else 1104 ret = palmas_extreg_init(pmic->palmas, 1105 id, reg_init); 1106 if (ret) 1107 return ret; 1108 } 1109 } 1110 } 1111 1112 return 0; 1113 } 1114 1115 static int palmas_smps_registration(struct palmas_pmic *pmic, 1116 struct palmas_pmic_driver_data *ddata, 1117 struct palmas_pmic_platform_data *pdata, 1118 const char *pdev_name, 1119 struct regulator_config config) 1120 { 1121 int id, ret; 1122 unsigned int addr, reg; 1123 struct regulator_dev *rdev; 1124 struct palmas_reg_init *reg_init; 1125 struct palmas_regs_info *rinfo; 1126 struct regulator_desc *desc; 1127 1128 for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1129 bool ramp_delay_support = false; 1130 1131 /* 1132 * Miss out regulators which are not available due 1133 * to slaving configurations. 1134 */ 1135 switch (id) { 1136 case PALMAS_REG_SMPS12: 1137 case PALMAS_REG_SMPS3: 1138 if (pmic->smps123) 1139 continue; 1140 if (id == PALMAS_REG_SMPS12) 1141 ramp_delay_support = true; 1142 break; 1143 case PALMAS_REG_SMPS123: 1144 if (!pmic->smps123) 1145 continue; 1146 ramp_delay_support = true; 1147 break; 1148 case PALMAS_REG_SMPS45: 1149 case PALMAS_REG_SMPS7: 1150 if (pmic->smps457) 1151 continue; 1152 if (id == PALMAS_REG_SMPS45) 1153 ramp_delay_support = true; 1154 break; 1155 case PALMAS_REG_SMPS457: 1156 if (!pmic->smps457) 1157 continue; 1158 ramp_delay_support = true; 1159 break; 1160 case PALMAS_REG_SMPS10_OUT1: 1161 case PALMAS_REG_SMPS10_OUT2: 1162 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST)) 1163 continue; 1164 } 1165 rinfo = &ddata->palmas_regs_info[id]; 1166 desc = &pmic->desc[id]; 1167 1168 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8)) 1169 ramp_delay_support = true; 1170 1171 if (ramp_delay_support) { 1172 addr = rinfo->tstep_addr; 1173 ret = palmas_smps_read(pmic->palmas, addr, ®); 1174 if (ret < 0) { 1175 dev_err(pmic->dev, 1176 "reading TSTEP reg failed: %d\n", ret); 1177 return ret; 1178 } 1179 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3]; 1180 pmic->ramp_delay[id] = desc->ramp_delay; 1181 } 1182 1183 /* Initialise sleep/init values from platform data */ 1184 if (pdata && pdata->reg_init[id]) { 1185 reg_init = pdata->reg_init[id]; 1186 ret = palmas_smps_init(pmic->palmas, id, reg_init); 1187 if (ret) 1188 return ret; 1189 } else { 1190 reg_init = NULL; 1191 } 1192 1193 /* Register the regulators */ 1194 desc->name = rinfo->name; 1195 desc->id = id; 1196 1197 switch (id) { 1198 case PALMAS_REG_SMPS10_OUT1: 1199 case PALMAS_REG_SMPS10_OUT2: 1200 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES; 1201 desc->ops = &palmas_ops_smps10; 1202 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1203 PALMAS_SMPS10_CTRL); 1204 desc->vsel_mask = SMPS10_VSEL; 1205 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1206 PALMAS_SMPS10_CTRL); 1207 if (id == PALMAS_REG_SMPS10_OUT1) 1208 desc->enable_mask = SMPS10_SWITCH_EN; 1209 else 1210 desc->enable_mask = SMPS10_BOOST_EN; 1211 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1212 PALMAS_SMPS10_CTRL); 1213 desc->bypass_val_on = SMPS10_BYPASS_EN; 1214 desc->bypass_mask = SMPS10_BYPASS_EN; 1215 desc->min_uV = 3750000; 1216 desc->uV_step = 1250000; 1217 break; 1218 default: 1219 /* 1220 * Read and store the RANGE bit for later use 1221 * This must be done before regulator is probed, 1222 * otherwise we error in probe with unsupportable 1223 * ranges. Read the current smps mode for later use. 1224 */ 1225 addr = rinfo->vsel_addr; 1226 desc->n_linear_ranges = 3; 1227 1228 ret = palmas_smps_read(pmic->palmas, addr, ®); 1229 if (ret) 1230 return ret; 1231 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE) 1232 pmic->range[id] = 1; 1233 if (pmic->range[id]) 1234 desc->linear_ranges = smps_high_ranges; 1235 else 1236 desc->linear_ranges = smps_low_ranges; 1237 1238 if (reg_init && reg_init->roof_floor) 1239 desc->ops = &palmas_ops_ext_control_smps; 1240 else 1241 desc->ops = &palmas_ops_smps; 1242 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1243 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1244 rinfo->vsel_addr); 1245 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1246 1247 /* Read the smps mode for later use. */ 1248 addr = rinfo->ctrl_addr; 1249 ret = palmas_smps_read(pmic->palmas, addr, ®); 1250 if (ret) 1251 return ret; 1252 pmic->current_reg_mode[id] = reg & 1253 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1254 1255 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1256 rinfo->ctrl_addr); 1257 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1258 /* set_mode overrides this value */ 1259 desc->enable_val = SMPS_CTRL_MODE_ON; 1260 } 1261 1262 desc->type = REGULATOR_VOLTAGE; 1263 desc->owner = THIS_MODULE; 1264 1265 if (pdata) 1266 config.init_data = pdata->reg_data[id]; 1267 else 1268 config.init_data = NULL; 1269 1270 desc->supply_name = rinfo->sname; 1271 config.of_node = ddata->palmas_matches[id].of_node; 1272 1273 rdev = devm_regulator_register(pmic->dev, desc, &config); 1274 if (IS_ERR(rdev)) { 1275 dev_err(pmic->dev, 1276 "failed to register %s regulator\n", 1277 pdev_name); 1278 return PTR_ERR(rdev); 1279 } 1280 1281 /* Save regulator for cleanup */ 1282 pmic->rdev[id] = rdev; 1283 } 1284 1285 return 0; 1286 } 1287 1288 static int tps65917_smps_registration(struct palmas_pmic *pmic, 1289 struct palmas_pmic_driver_data *ddata, 1290 struct palmas_pmic_platform_data *pdata, 1291 const char *pdev_name, 1292 struct regulator_config config) 1293 { 1294 int id, ret; 1295 unsigned int addr, reg; 1296 struct regulator_dev *rdev; 1297 struct palmas_reg_init *reg_init; 1298 struct palmas_regs_info *rinfo; 1299 struct regulator_desc *desc; 1300 1301 for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1302 /* 1303 * Miss out regulators which are not available due 1304 * to slaving configurations. 1305 */ 1306 desc = &pmic->desc[id]; 1307 desc->n_linear_ranges = 3; 1308 if ((id == TPS65917_REG_SMPS2) && pmic->smps12) 1309 continue; 1310 1311 /* Initialise sleep/init values from platform data */ 1312 if (pdata && pdata->reg_init[id]) { 1313 reg_init = pdata->reg_init[id]; 1314 ret = palmas_smps_init(pmic->palmas, id, reg_init); 1315 if (ret) 1316 return ret; 1317 } else { 1318 reg_init = NULL; 1319 } 1320 rinfo = &ddata->palmas_regs_info[id]; 1321 1322 /* Register the regulators */ 1323 desc->name = rinfo->name; 1324 desc->id = id; 1325 1326 /* 1327 * Read and store the RANGE bit for later use 1328 * This must be done before regulator is probed, 1329 * otherwise we error in probe with unsupportable 1330 * ranges. Read the current smps mode for later use. 1331 */ 1332 addr = rinfo->vsel_addr; 1333 1334 ret = palmas_smps_read(pmic->palmas, addr, ®); 1335 if (ret) 1336 return ret; 1337 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE) 1338 pmic->range[id] = 1; 1339 1340 if (pmic->range[id]) 1341 desc->linear_ranges = smps_high_ranges; 1342 else 1343 desc->linear_ranges = smps_low_ranges; 1344 1345 if (reg_init && reg_init->roof_floor) 1346 desc->ops = &tps65917_ops_ext_control_smps; 1347 else 1348 desc->ops = &tps65917_ops_smps; 1349 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1350 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1351 rinfo->vsel_addr); 1352 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1353 desc->ramp_delay = 2500; 1354 1355 /* Read the smps mode for later use. */ 1356 addr = rinfo->ctrl_addr; 1357 ret = palmas_smps_read(pmic->palmas, addr, ®); 1358 if (ret) 1359 return ret; 1360 pmic->current_reg_mode[id] = reg & 1361 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1362 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1363 rinfo->ctrl_addr); 1364 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1365 /* set_mode overrides this value */ 1366 desc->enable_val = SMPS_CTRL_MODE_ON; 1367 1368 desc->type = REGULATOR_VOLTAGE; 1369 desc->owner = THIS_MODULE; 1370 1371 if (pdata) 1372 config.init_data = pdata->reg_data[id]; 1373 else 1374 config.init_data = NULL; 1375 1376 desc->supply_name = rinfo->sname; 1377 config.of_node = ddata->palmas_matches[id].of_node; 1378 1379 rdev = devm_regulator_register(pmic->dev, desc, &config); 1380 if (IS_ERR(rdev)) { 1381 dev_err(pmic->dev, 1382 "failed to register %s regulator\n", 1383 pdev_name); 1384 return PTR_ERR(rdev); 1385 } 1386 1387 /* Save regulator for cleanup */ 1388 pmic->rdev[id] = rdev; 1389 } 1390 1391 return 0; 1392 } 1393 1394 static struct of_regulator_match palmas_matches[] = { 1395 { .name = "smps12", }, 1396 { .name = "smps123", }, 1397 { .name = "smps3", }, 1398 { .name = "smps45", }, 1399 { .name = "smps457", }, 1400 { .name = "smps6", }, 1401 { .name = "smps7", }, 1402 { .name = "smps8", }, 1403 { .name = "smps9", }, 1404 { .name = "smps10_out2", }, 1405 { .name = "smps10_out1", }, 1406 { .name = "ldo1", }, 1407 { .name = "ldo2", }, 1408 { .name = "ldo3", }, 1409 { .name = "ldo4", }, 1410 { .name = "ldo5", }, 1411 { .name = "ldo6", }, 1412 { .name = "ldo7", }, 1413 { .name = "ldo8", }, 1414 { .name = "ldo9", }, 1415 { .name = "ldoln", }, 1416 { .name = "ldousb", }, 1417 { .name = "regen1", }, 1418 { .name = "regen2", }, 1419 { .name = "regen3", }, 1420 { .name = "sysen1", }, 1421 { .name = "sysen2", }, 1422 }; 1423 1424 static struct of_regulator_match tps65917_matches[] = { 1425 { .name = "smps1", }, 1426 { .name = "smps2", }, 1427 { .name = "smps3", }, 1428 { .name = "smps4", }, 1429 { .name = "smps5", }, 1430 { .name = "ldo1", }, 1431 { .name = "ldo2", }, 1432 { .name = "ldo3", }, 1433 { .name = "ldo4", }, 1434 { .name = "ldo5", }, 1435 { .name = "regen1", }, 1436 { .name = "regen2", }, 1437 { .name = "regen3", }, 1438 { .name = "sysen1", }, 1439 { .name = "sysen2", }, 1440 }; 1441 1442 static struct palmas_pmic_driver_data palmas_ddata = { 1443 .smps_start = PALMAS_REG_SMPS12, 1444 .smps_end = PALMAS_REG_SMPS10_OUT1, 1445 .ldo_begin = PALMAS_REG_LDO1, 1446 .ldo_end = PALMAS_REG_LDOUSB, 1447 .max_reg = PALMAS_NUM_REGS, 1448 .has_regen3 = true, 1449 .palmas_regs_info = palmas_generic_regs_info, 1450 .palmas_matches = palmas_matches, 1451 .sleep_req_info = palma_sleep_req_info, 1452 .smps_register = palmas_smps_registration, 1453 .ldo_register = palmas_ldo_registration, 1454 }; 1455 1456 static struct palmas_pmic_driver_data tps65917_ddata = { 1457 .smps_start = TPS65917_REG_SMPS1, 1458 .smps_end = TPS65917_REG_SMPS5, 1459 .ldo_begin = TPS65917_REG_LDO1, 1460 .ldo_end = TPS65917_REG_LDO5, 1461 .max_reg = TPS65917_NUM_REGS, 1462 .has_regen3 = true, 1463 .palmas_regs_info = tps65917_regs_info, 1464 .palmas_matches = tps65917_matches, 1465 .sleep_req_info = tps65917_sleep_req_info, 1466 .smps_register = tps65917_smps_registration, 1467 .ldo_register = tps65917_ldo_registration, 1468 }; 1469 1470 static int palmas_dt_to_pdata(struct device *dev, 1471 struct device_node *node, 1472 struct palmas_pmic_platform_data *pdata, 1473 struct palmas_pmic_driver_data *ddata) 1474 { 1475 struct device_node *regulators; 1476 u32 prop; 1477 int idx, ret; 1478 1479 regulators = of_get_child_by_name(node, "regulators"); 1480 if (!regulators) { 1481 dev_info(dev, "regulator node not found\n"); 1482 return 0; 1483 } 1484 1485 ret = of_regulator_match(dev, regulators, ddata->palmas_matches, 1486 ddata->max_reg); 1487 of_node_put(regulators); 1488 if (ret < 0) { 1489 dev_err(dev, "Error parsing regulator init data: %d\n", ret); 1490 return 0; 1491 } 1492 1493 for (idx = 0; idx < ddata->max_reg; idx++) { 1494 static struct of_regulator_match *match; 1495 struct palmas_reg_init *rinit; 1496 struct device_node *np; 1497 1498 match = &ddata->palmas_matches[idx]; 1499 np = match->of_node; 1500 1501 if (!match->init_data || !np) 1502 continue; 1503 1504 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL); 1505 if (!rinit) 1506 return -ENOMEM; 1507 1508 pdata->reg_data[idx] = match->init_data; 1509 pdata->reg_init[idx] = rinit; 1510 1511 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset"); 1512 ret = of_property_read_u32(np, "ti,roof-floor", &prop); 1513 /* EINVAL: Property not found */ 1514 if (ret != -EINVAL) { 1515 int econtrol; 1516 1517 /* use default value, when no value is specified */ 1518 econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1519 if (!ret) { 1520 switch (prop) { 1521 case 1: 1522 econtrol = PALMAS_EXT_CONTROL_ENABLE1; 1523 break; 1524 case 2: 1525 econtrol = PALMAS_EXT_CONTROL_ENABLE2; 1526 break; 1527 case 3: 1528 econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1529 break; 1530 default: 1531 WARN_ON(1); 1532 dev_warn(dev, 1533 "%s: Invalid roof-floor option: %u\n", 1534 match->name, prop); 1535 break; 1536 } 1537 } 1538 rinit->roof_floor = econtrol; 1539 } 1540 1541 ret = of_property_read_u32(np, "ti,mode-sleep", &prop); 1542 if (!ret) 1543 rinit->mode_sleep = prop; 1544 1545 ret = of_property_read_bool(np, "ti,smps-range"); 1546 if (ret) 1547 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE; 1548 1549 if (idx == PALMAS_REG_LDO8) 1550 pdata->enable_ldo8_tracking = of_property_read_bool( 1551 np, "ti,enable-ldo8-tracking"); 1552 } 1553 1554 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator"); 1555 1556 return 0; 1557 } 1558 1559 static const struct of_device_id of_palmas_match_tbl[] = { 1560 { 1561 .compatible = "ti,palmas-pmic", 1562 .data = &palmas_ddata, 1563 }, 1564 { 1565 .compatible = "ti,twl6035-pmic", 1566 .data = &palmas_ddata, 1567 }, 1568 { 1569 .compatible = "ti,twl6036-pmic", 1570 .data = &palmas_ddata, 1571 }, 1572 { 1573 .compatible = "ti,twl6037-pmic", 1574 .data = &palmas_ddata, 1575 }, 1576 { 1577 .compatible = "ti,tps65913-pmic", 1578 .data = &palmas_ddata, 1579 }, 1580 { 1581 .compatible = "ti,tps65914-pmic", 1582 .data = &palmas_ddata, 1583 }, 1584 { 1585 .compatible = "ti,tps80036-pmic", 1586 .data = &palmas_ddata, 1587 }, 1588 { 1589 .compatible = "ti,tps659038-pmic", 1590 .data = &palmas_ddata, 1591 }, 1592 { 1593 .compatible = "ti,tps65917-pmic", 1594 .data = &tps65917_ddata, 1595 }, 1596 { /* end */ } 1597 }; 1598 1599 static int palmas_regulators_probe(struct platform_device *pdev) 1600 { 1601 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); 1602 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev); 1603 struct device_node *node = pdev->dev.of_node; 1604 struct palmas_pmic_driver_data *driver_data; 1605 struct regulator_config config = { }; 1606 struct palmas_pmic *pmic; 1607 const char *pdev_name; 1608 const struct of_device_id *match; 1609 int ret = 0; 1610 unsigned int reg; 1611 1612 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev); 1613 1614 if (!match) 1615 return -ENODATA; 1616 1617 driver_data = (struct palmas_pmic_driver_data *)match->data; 1618 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 1619 if (!pdata) 1620 return -ENOMEM; 1621 1622 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); 1623 if (!pmic) 1624 return -ENOMEM; 1625 1626 if (of_device_is_compatible(node, "ti,tps659038-pmic")) { 1627 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr = 1628 TPS659038_REGEN2_CTRL; 1629 palmas_ddata.has_regen3 = false; 1630 } 1631 1632 pmic->dev = &pdev->dev; 1633 pmic->palmas = palmas; 1634 palmas->pmic = pmic; 1635 platform_set_drvdata(pdev, pmic); 1636 pmic->palmas->pmic_ddata = driver_data; 1637 1638 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data); 1639 if (ret) 1640 return ret; 1641 1642 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®); 1643 if (ret) 1644 return ret; 1645 1646 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) 1647 pmic->smps123 = 1; 1648 1649 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN) 1650 pmic->smps457 = 1; 1651 1652 config.regmap = palmas->regmap[REGULATOR_SLAVE]; 1653 config.dev = &pdev->dev; 1654 config.driver_data = pmic; 1655 pdev_name = pdev->name; 1656 1657 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name, 1658 config); 1659 if (ret) 1660 return ret; 1661 1662 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name, 1663 config); 1664 1665 return ret; 1666 } 1667 1668 static struct platform_driver palmas_driver = { 1669 .driver = { 1670 .name = "palmas-pmic", 1671 .of_match_table = of_palmas_match_tbl, 1672 }, 1673 .probe = palmas_regulators_probe, 1674 }; 1675 1676 static int __init palmas_init(void) 1677 { 1678 return platform_driver_register(&palmas_driver); 1679 } 1680 subsys_initcall(palmas_init); 1681 1682 static void __exit palmas_exit(void) 1683 { 1684 platform_driver_unregister(&palmas_driver); 1685 } 1686 module_exit(palmas_exit); 1687 1688 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); 1689 MODULE_DESCRIPTION("Palmas voltage regulator driver"); 1690 MODULE_LICENSE("GPL"); 1691 MODULE_ALIAS("platform:palmas-pmic"); 1692 MODULE_DEVICE_TABLE(of, of_palmas_match_tbl); 1693