1# 2# Intel pin control drivers 3# 4if (X86 || COMPILE_TEST) 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 depends on GPIOLIB && ACPI 9 select GPIOLIB_IRQCHIP 10 select PINMUX 11 select PINCONF 12 select GENERIC_PINCONF 13 help 14 driver for memory mapped GPIO functionality on Intel Baytrail 15 platforms. Supports 3 banks with 102, 28 and 44 gpios. 16 Most pins are usually muxed to some other functionality by firmware, 17 so only a small amount is available for gpio use. 18 19 Requires ACPI device enumeration code to set up a platform device. 20 21config PINCTRL_CHERRYVIEW 22 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" 23 depends on ACPI 24 select PINMUX 25 select PINCONF 26 select GENERIC_PINCONF 27 select GPIOLIB 28 select GPIOLIB_IRQCHIP 29 help 30 Cherryview/Braswell pinctrl driver provides an interface that 31 allows configuring of SoC pins and using them as GPIOs. 32 33config PINCTRL_MERRIFIELD 34 tristate "Intel Merrifield pinctrl driver" 35 depends on X86_INTEL_MID 36 select PINMUX 37 select PINCONF 38 select GENERIC_PINCONF 39 help 40 Merrifield Family-Level Interface Shim (FLIS) driver provides an 41 interface that allows configuring of SoC pins and using them as 42 GPIOs. 43 44config PINCTRL_INTEL 45 tristate 46 select PINMUX 47 select PINCONF 48 select GENERIC_PINCONF 49 select GPIOLIB 50 select GPIOLIB_IRQCHIP 51 52config PINCTRL_BROXTON 53 tristate "Intel Broxton pinctrl and GPIO driver" 54 depends on ACPI 55 select PINCTRL_INTEL 56 help 57 Broxton pinctrl driver provides an interface that allows 58 configuring of SoC pins and using them as GPIOs. 59 60config PINCTRL_CANNONLAKE 61 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver" 62 depends on ACPI 63 select PINCTRL_INTEL 64 help 65 This pinctrl driver provides an interface that allows configuring 66 of Intel Cannon Lake PCH pins and using them as GPIOs. 67 68config PINCTRL_DENVERTON 69 tristate "Intel Denverton pinctrl and GPIO driver" 70 depends on ACPI 71 select PINCTRL_INTEL 72 help 73 This pinctrl driver provides an interface that allows configuring 74 of Intel Denverton SoC pins and using them as GPIOs. 75 76config PINCTRL_GEMINILAKE 77 tristate "Intel Gemini Lake SoC pinctrl and GPIO driver" 78 depends on ACPI 79 select PINCTRL_INTEL 80 help 81 This pinctrl driver provides an interface that allows configuring 82 of Intel Gemini Lake SoC pins and using them as GPIOs. 83 84config PINCTRL_LEWISBURG 85 tristate "Intel Lewisburg pinctrl and GPIO driver" 86 depends on ACPI 87 select PINCTRL_INTEL 88 help 89 This pinctrl driver provides an interface that allows configuring 90 of Intel Lewisburg pins and using them as GPIOs. 91 92config PINCTRL_SUNRISEPOINT 93 tristate "Intel Sunrisepoint pinctrl and GPIO driver" 94 depends on ACPI 95 select PINCTRL_INTEL 96 help 97 Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver 98 provides an interface that allows configuring of PCH pins and 99 using them as GPIOs. 100 101endif 102