xref: /linux/drivers/pinctrl/bcm/Kconfig (revision ab520be8cd5d56867fc95cfbc34b90880faf1f9d)
1#
2# Broadcom pinctrl drivers
3#
4
5config PINCTRL_BCM281XX
6	bool "Broadcom BCM281xx pinctrl driver"
7	depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
8	select PINMUX
9	select PINCONF
10	select GENERIC_PINCONF
11	select REGMAP_MMIO
12	default ARCH_BCM_MOBILE
13	help
14	  Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
15	  for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
16	  BCM28145, and BCM28155 SoCs.  This driver requires the pinctrl
17	  framework.  GPIO is provided by a separate GPIO driver.
18
19config PINCTRL_BCM2835
20	bool
21	select PINMUX
22	select PINCONF
23	select GPIOLIB_IRQCHIP
24
25config PINCTRL_IPROC_GPIO
26	bool "Broadcom iProc GPIO (with PINCONF) driver"
27	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
28	select GPIOLIB_IRQCHIP
29	select PINCONF
30	select GENERIC_PINCONF
31	default ARCH_BCM_IPROC
32	help
33	  Say yes here to enable the Broadcom iProc GPIO driver.
34
35	  The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
36	  same GPIO Controller IP hence this driver could be used for all.
37
38	  The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
39	  GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
40	  the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
41	  supported by this driver.
42
43	  The Broadcom NSP has two GPIO controllers including the ChipcommonA
44	  GPIO, the ChipcommonB GPIO. Later controller is supported by this
45	  driver.
46
47	  The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
48	  the ChipcommonG GPIO. Both controllers are supported by this driver.
49
50	  The Broadcom Stingray GPIO controllers are supported by this driver.
51
52	  All above SoCs GPIO controllers support basic PINCONF functions such
53	  as bias pull up, pull down, and drive strength configurations, when
54	  these pins are muxed to GPIO.
55
56	  It provides the framework where pins from the individual GPIO can be
57	  individually muxed to GPIO function, through interaction with the
58	  SoCs IOMUX controller. This features could be used only on SoCs which
59	  support individual pin muxing.
60
61config PINCTRL_CYGNUS_MUX
62	bool "Broadcom Cygnus IOMUX driver"
63	depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
64	depends on OF
65	select PINMUX
66	select GENERIC_PINCONF
67	default ARCH_BCM_CYGNUS
68	help
69	  Say yes here to enable the Broadcom Cygnus IOMUX driver.
70
71	  The Broadcom Cygnus IOMUX driver supports group based IOMUX
72	  configuration, with the exception that certain individual pins
73	  can be overrided to GPIO function
74
75config PINCTRL_NSP_GPIO
76	bool "Broadcom NSP GPIO (with PINCONF) driver"
77	depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
78	select GPIOLIB_IRQCHIP
79	select PINCONF
80	select GENERIC_PINCONF
81	default ARCH_BCM_NSP
82	help
83	  Say yes here to enable the Broadcom NSP GPIO driver.
84
85	  The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is
86	  supported by this driver.
87
88	  The ChipcommonA GPIO controller support basic PINCONF functions such
89	  as bias pull up, pull down, and drive strength configurations, when
90	  these pins are muxed to GPIO.
91
92config PINCTRL_NS2_MUX
93	bool "Broadcom Northstar2 pinmux driver"
94	depends on OF
95	depends on ARCH_BCM_IPROC || COMPILE_TEST
96	select PINMUX
97	select GENERIC_PINCONF
98	default ARM64 && ARCH_BCM_IPROC
99	help
100	  Say yes here to enable the Broadcom NS2 MUX driver.
101
102	  The Broadcom Northstar2 IOMUX driver supports group based IOMUX
103	  configuration.
104
105config PINCTRL_NSP_MUX
106	bool "Broadcom NSP IOMUX driver"
107	depends on (ARCH_BCM_NSP || COMPILE_TEST)
108	depends on OF
109	select PINMUX
110	select GENERIC_PINCONF
111	default ARCH_BCM_NSP
112	help
113	  Say yes here to enable the Broadcom NSP SOC IOMUX driver.
114
115	  The Broadcom Northstar Plus IOMUX driver supports pin based IOMUX
116	  configuration, with certain individual pins can be overridden
117	  to GPIO function.
118