1 /* 2 * 3 * Broadcom B43legacy wireless driver 4 * 5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de> 6 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it> 7 * Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch> 8 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org> 9 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> 10 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net> 11 * 12 * Some parts of the code in this file are derived from the ipw2200 13 * driver Copyright(c) 2003 - 2004 Intel Corporation. 14 15 * This program is free software; you can redistribute it and/or modify 16 * it under the terms of the GNU General Public License as published by 17 * the Free Software Foundation; either version 2 of the License, or 18 * (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; see the file COPYING. If not, write to 27 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, 28 * Boston, MA 02110-1301, USA. 29 * 30 */ 31 32 #include <linux/delay.h> 33 #include <linux/init.h> 34 #include <linux/module.h> 35 #include <linux/if_arp.h> 36 #include <linux/etherdevice.h> 37 #include <linux/firmware.h> 38 #include <linux/workqueue.h> 39 #include <linux/sched.h> 40 #include <linux/skbuff.h> 41 #include <linux/dma-mapping.h> 42 #include <linux/slab.h> 43 #include <net/dst.h> 44 #include <asm/unaligned.h> 45 46 #include "b43legacy.h" 47 #include "main.h" 48 #include "debugfs.h" 49 #include "phy.h" 50 #include "dma.h" 51 #include "pio.h" 52 #include "sysfs.h" 53 #include "xmit.h" 54 #include "radio.h" 55 56 57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver"); 58 MODULE_AUTHOR("Martin Langer"); 59 MODULE_AUTHOR("Stefano Brivio"); 60 MODULE_AUTHOR("Michael Buesch"); 61 MODULE_LICENSE("GPL"); 62 63 MODULE_FIRMWARE("b43legacy/ucode2.fw"); 64 MODULE_FIRMWARE("b43legacy/ucode4.fw"); 65 66 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO) 67 static int modparam_pio; 68 module_param_named(pio, modparam_pio, int, 0444); 69 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode"); 70 #elif defined(CONFIG_B43LEGACY_DMA) 71 # define modparam_pio 0 72 #elif defined(CONFIG_B43LEGACY_PIO) 73 # define modparam_pio 1 74 #endif 75 76 static int modparam_bad_frames_preempt; 77 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444); 78 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames" 79 " Preemption"); 80 81 static char modparam_fwpostfix[16]; 82 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444); 83 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load."); 84 85 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */ 86 static const struct ssb_device_id b43legacy_ssb_tbl[] = { 87 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2), 88 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4), 89 {}, 90 }; 91 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl); 92 93 94 /* Channel and ratetables are shared for all devices. 95 * They can't be const, because ieee80211 puts some precalculated 96 * data in there. This data is the same for all devices, so we don't 97 * get concurrency issues */ 98 #define RATETAB_ENT(_rateid, _flags) \ 99 { \ 100 .bitrate = B43legacy_RATE_TO_100KBPS(_rateid), \ 101 .hw_value = (_rateid), \ 102 .flags = (_flags), \ 103 } 104 /* 105 * NOTE: When changing this, sync with xmit.c's 106 * b43legacy_plcp_get_bitrate_idx_* functions! 107 */ 108 static struct ieee80211_rate __b43legacy_ratetable[] = { 109 RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0), 110 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE), 111 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE), 112 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE), 113 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0), 114 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0), 115 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0), 116 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0), 117 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0), 118 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0), 119 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0), 120 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0), 121 }; 122 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0) 123 #define b43legacy_b_ratetable_size 4 124 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0) 125 #define b43legacy_g_ratetable_size 12 126 127 #define CHANTAB_ENT(_chanid, _freq) \ 128 { \ 129 .center_freq = (_freq), \ 130 .hw_value = (_chanid), \ 131 } 132 static struct ieee80211_channel b43legacy_bg_chantable[] = { 133 CHANTAB_ENT(1, 2412), 134 CHANTAB_ENT(2, 2417), 135 CHANTAB_ENT(3, 2422), 136 CHANTAB_ENT(4, 2427), 137 CHANTAB_ENT(5, 2432), 138 CHANTAB_ENT(6, 2437), 139 CHANTAB_ENT(7, 2442), 140 CHANTAB_ENT(8, 2447), 141 CHANTAB_ENT(9, 2452), 142 CHANTAB_ENT(10, 2457), 143 CHANTAB_ENT(11, 2462), 144 CHANTAB_ENT(12, 2467), 145 CHANTAB_ENT(13, 2472), 146 CHANTAB_ENT(14, 2484), 147 }; 148 149 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = { 150 .channels = b43legacy_bg_chantable, 151 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable), 152 .bitrates = b43legacy_b_ratetable, 153 .n_bitrates = b43legacy_b_ratetable_size, 154 }; 155 156 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = { 157 .channels = b43legacy_bg_chantable, 158 .n_channels = ARRAY_SIZE(b43legacy_bg_chantable), 159 .bitrates = b43legacy_g_ratetable, 160 .n_bitrates = b43legacy_g_ratetable_size, 161 }; 162 163 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev); 164 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev); 165 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev); 166 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev); 167 168 169 static int b43legacy_ratelimit(struct b43legacy_wl *wl) 170 { 171 if (!wl || !wl->current_dev) 172 return 1; 173 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED) 174 return 1; 175 /* We are up and running. 176 * Ratelimit the messages to avoid DoS over the net. */ 177 return net_ratelimit(); 178 } 179 180 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) 181 { 182 struct va_format vaf; 183 va_list args; 184 185 if (!b43legacy_ratelimit(wl)) 186 return; 187 188 va_start(args, fmt); 189 190 vaf.fmt = fmt; 191 vaf.va = &args; 192 193 printk(KERN_INFO "b43legacy-%s: %pV", 194 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 195 196 va_end(args); 197 } 198 199 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) 200 { 201 struct va_format vaf; 202 va_list args; 203 204 if (!b43legacy_ratelimit(wl)) 205 return; 206 207 va_start(args, fmt); 208 209 vaf.fmt = fmt; 210 vaf.va = &args; 211 212 printk(KERN_ERR "b43legacy-%s ERROR: %pV", 213 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 214 215 va_end(args); 216 } 217 218 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) 219 { 220 struct va_format vaf; 221 va_list args; 222 223 if (!b43legacy_ratelimit(wl)) 224 return; 225 226 va_start(args, fmt); 227 228 vaf.fmt = fmt; 229 vaf.va = &args; 230 231 printk(KERN_WARNING "b43legacy-%s warning: %pV", 232 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 233 234 va_end(args); 235 } 236 237 #if B43legacy_DEBUG 238 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) 239 { 240 struct va_format vaf; 241 va_list args; 242 243 va_start(args, fmt); 244 245 vaf.fmt = fmt; 246 vaf.va = &args; 247 248 printk(KERN_DEBUG "b43legacy-%s debug: %pV", 249 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf); 250 251 va_end(args); 252 } 253 #endif /* DEBUG */ 254 255 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset, 256 u32 val) 257 { 258 u32 status; 259 260 B43legacy_WARN_ON(offset % 4 != 0); 261 262 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 263 if (status & B43legacy_MACCTL_BE) 264 val = swab32(val); 265 266 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset); 267 mmiowb(); 268 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val); 269 } 270 271 static inline 272 void b43legacy_shm_control_word(struct b43legacy_wldev *dev, 273 u16 routing, u16 offset) 274 { 275 u32 control; 276 277 /* "offset" is the WORD offset. */ 278 279 control = routing; 280 control <<= 16; 281 control |= offset; 282 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control); 283 } 284 285 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev, 286 u16 routing, u16 offset) 287 { 288 u32 ret; 289 290 if (routing == B43legacy_SHM_SHARED) { 291 B43legacy_WARN_ON((offset & 0x0001) != 0); 292 if (offset & 0x0003) { 293 /* Unaligned access */ 294 b43legacy_shm_control_word(dev, routing, offset >> 2); 295 ret = b43legacy_read16(dev, 296 B43legacy_MMIO_SHM_DATA_UNALIGNED); 297 ret <<= 16; 298 b43legacy_shm_control_word(dev, routing, 299 (offset >> 2) + 1); 300 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); 301 302 return ret; 303 } 304 offset >>= 2; 305 } 306 b43legacy_shm_control_word(dev, routing, offset); 307 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA); 308 309 return ret; 310 } 311 312 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev, 313 u16 routing, u16 offset) 314 { 315 u16 ret; 316 317 if (routing == B43legacy_SHM_SHARED) { 318 B43legacy_WARN_ON((offset & 0x0001) != 0); 319 if (offset & 0x0003) { 320 /* Unaligned access */ 321 b43legacy_shm_control_word(dev, routing, offset >> 2); 322 ret = b43legacy_read16(dev, 323 B43legacy_MMIO_SHM_DATA_UNALIGNED); 324 325 return ret; 326 } 327 offset >>= 2; 328 } 329 b43legacy_shm_control_word(dev, routing, offset); 330 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); 331 332 return ret; 333 } 334 335 void b43legacy_shm_write32(struct b43legacy_wldev *dev, 336 u16 routing, u16 offset, 337 u32 value) 338 { 339 if (routing == B43legacy_SHM_SHARED) { 340 B43legacy_WARN_ON((offset & 0x0001) != 0); 341 if (offset & 0x0003) { 342 /* Unaligned access */ 343 b43legacy_shm_control_word(dev, routing, offset >> 2); 344 mmiowb(); 345 b43legacy_write16(dev, 346 B43legacy_MMIO_SHM_DATA_UNALIGNED, 347 (value >> 16) & 0xffff); 348 mmiowb(); 349 b43legacy_shm_control_word(dev, routing, 350 (offset >> 2) + 1); 351 mmiowb(); 352 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, 353 value & 0xffff); 354 return; 355 } 356 offset >>= 2; 357 } 358 b43legacy_shm_control_word(dev, routing, offset); 359 mmiowb(); 360 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value); 361 } 362 363 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset, 364 u16 value) 365 { 366 if (routing == B43legacy_SHM_SHARED) { 367 B43legacy_WARN_ON((offset & 0x0001) != 0); 368 if (offset & 0x0003) { 369 /* Unaligned access */ 370 b43legacy_shm_control_word(dev, routing, offset >> 2); 371 mmiowb(); 372 b43legacy_write16(dev, 373 B43legacy_MMIO_SHM_DATA_UNALIGNED, 374 value); 375 return; 376 } 377 offset >>= 2; 378 } 379 b43legacy_shm_control_word(dev, routing, offset); 380 mmiowb(); 381 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value); 382 } 383 384 /* Read HostFlags */ 385 u32 b43legacy_hf_read(struct b43legacy_wldev *dev) 386 { 387 u32 ret; 388 389 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 390 B43legacy_SHM_SH_HOSTFHI); 391 ret <<= 16; 392 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 393 B43legacy_SHM_SH_HOSTFLO); 394 395 return ret; 396 } 397 398 /* Write HostFlags */ 399 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value) 400 { 401 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 402 B43legacy_SHM_SH_HOSTFLO, 403 (value & 0x0000FFFF)); 404 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 405 B43legacy_SHM_SH_HOSTFHI, 406 ((value & 0xFFFF0000) >> 16)); 407 } 408 409 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf) 410 { 411 /* We need to be careful. As we read the TSF from multiple 412 * registers, we should take care of register overflows. 413 * In theory, the whole tsf read process should be atomic. 414 * We try to be atomic here, by restaring the read process, 415 * if any of the high registers changed (overflew). 416 */ 417 if (dev->dev->id.revision >= 3) { 418 u32 low; 419 u32 high; 420 u32 high2; 421 422 do { 423 high = b43legacy_read32(dev, 424 B43legacy_MMIO_REV3PLUS_TSF_HIGH); 425 low = b43legacy_read32(dev, 426 B43legacy_MMIO_REV3PLUS_TSF_LOW); 427 high2 = b43legacy_read32(dev, 428 B43legacy_MMIO_REV3PLUS_TSF_HIGH); 429 } while (unlikely(high != high2)); 430 431 *tsf = high; 432 *tsf <<= 32; 433 *tsf |= low; 434 } else { 435 u64 tmp; 436 u16 v0; 437 u16 v1; 438 u16 v2; 439 u16 v3; 440 u16 test1; 441 u16 test2; 442 u16 test3; 443 444 do { 445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); 446 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); 447 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); 448 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0); 449 450 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); 451 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); 452 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); 453 } while (v3 != test3 || v2 != test2 || v1 != test1); 454 455 *tsf = v3; 456 *tsf <<= 48; 457 tmp = v2; 458 tmp <<= 32; 459 *tsf |= tmp; 460 tmp = v1; 461 tmp <<= 16; 462 *tsf |= tmp; 463 *tsf |= v0; 464 } 465 } 466 467 static void b43legacy_time_lock(struct b43legacy_wldev *dev) 468 { 469 u32 status; 470 471 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 472 status |= B43legacy_MACCTL_TBTTHOLD; 473 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); 474 mmiowb(); 475 } 476 477 static void b43legacy_time_unlock(struct b43legacy_wldev *dev) 478 { 479 u32 status; 480 481 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 482 status &= ~B43legacy_MACCTL_TBTTHOLD; 483 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); 484 } 485 486 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf) 487 { 488 /* Be careful with the in-progress timer. 489 * First zero out the low register, so we have a full 490 * register-overflow duration to complete the operation. 491 */ 492 if (dev->dev->id.revision >= 3) { 493 u32 lo = (tsf & 0x00000000FFFFFFFFULL); 494 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32; 495 496 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0); 497 mmiowb(); 498 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH, 499 hi); 500 mmiowb(); 501 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 502 lo); 503 } else { 504 u16 v0 = (tsf & 0x000000000000FFFFULL); 505 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16; 506 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32; 507 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; 508 509 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0); 510 mmiowb(); 511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3); 512 mmiowb(); 513 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2); 514 mmiowb(); 515 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1); 516 mmiowb(); 517 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0); 518 } 519 } 520 521 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf) 522 { 523 b43legacy_time_lock(dev); 524 b43legacy_tsf_write_locked(dev, tsf); 525 b43legacy_time_unlock(dev); 526 } 527 528 static 529 void b43legacy_macfilter_set(struct b43legacy_wldev *dev, 530 u16 offset, const u8 *mac) 531 { 532 static const u8 zero_addr[ETH_ALEN] = { 0 }; 533 u16 data; 534 535 if (!mac) 536 mac = zero_addr; 537 538 offset |= 0x0020; 539 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset); 540 541 data = mac[0]; 542 data |= mac[1] << 8; 543 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); 544 data = mac[2]; 545 data |= mac[3] << 8; 546 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); 547 data = mac[4]; 548 data |= mac[5] << 8; 549 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); 550 } 551 552 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev) 553 { 554 static const u8 zero_addr[ETH_ALEN] = { 0 }; 555 const u8 *mac = dev->wl->mac_addr; 556 const u8 *bssid = dev->wl->bssid; 557 u8 mac_bssid[ETH_ALEN * 2]; 558 int i; 559 u32 tmp; 560 561 if (!bssid) 562 bssid = zero_addr; 563 if (!mac) 564 mac = zero_addr; 565 566 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid); 567 568 memcpy(mac_bssid, mac, ETH_ALEN); 569 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN); 570 571 /* Write our MAC address and BSSID to template ram */ 572 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) { 573 tmp = (u32)(mac_bssid[i + 0]); 574 tmp |= (u32)(mac_bssid[i + 1]) << 8; 575 tmp |= (u32)(mac_bssid[i + 2]) << 16; 576 tmp |= (u32)(mac_bssid[i + 3]) << 24; 577 b43legacy_ram_write(dev, 0x20 + i, tmp); 578 b43legacy_ram_write(dev, 0x78 + i, tmp); 579 b43legacy_ram_write(dev, 0x478 + i, tmp); 580 } 581 } 582 583 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev) 584 { 585 b43legacy_write_mac_bssid_templates(dev); 586 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF, 587 dev->wl->mac_addr); 588 } 589 590 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev, 591 u16 slot_time) 592 { 593 /* slot_time is in usec. */ 594 if (dev->phy.type != B43legacy_PHYTYPE_G) 595 return; 596 b43legacy_write16(dev, 0x684, 510 + slot_time); 597 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010, 598 slot_time); 599 } 600 601 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev) 602 { 603 b43legacy_set_slot_time(dev, 9); 604 } 605 606 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev) 607 { 608 b43legacy_set_slot_time(dev, 20); 609 } 610 611 /* Synchronize IRQ top- and bottom-half. 612 * IRQs must be masked before calling this. 613 * This must not be called with the irq_lock held. 614 */ 615 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev) 616 { 617 synchronize_irq(dev->dev->irq); 618 tasklet_kill(&dev->isr_tasklet); 619 } 620 621 /* DummyTransmission function, as documented on 622 * http://bcm-specs.sipsolutions.net/DummyTransmission 623 */ 624 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev) 625 { 626 struct b43legacy_phy *phy = &dev->phy; 627 unsigned int i; 628 unsigned int max_loop; 629 u16 value; 630 u32 buffer[5] = { 631 0x00000000, 632 0x00D40000, 633 0x00000000, 634 0x01000000, 635 0x00000000, 636 }; 637 638 switch (phy->type) { 639 case B43legacy_PHYTYPE_B: 640 case B43legacy_PHYTYPE_G: 641 max_loop = 0xFA; 642 buffer[0] = 0x000B846E; 643 break; 644 default: 645 B43legacy_BUG_ON(1); 646 return; 647 } 648 649 for (i = 0; i < 5; i++) 650 b43legacy_ram_write(dev, i * 4, buffer[i]); 651 652 /* dummy read follows */ 653 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 654 655 b43legacy_write16(dev, 0x0568, 0x0000); 656 b43legacy_write16(dev, 0x07C0, 0x0000); 657 b43legacy_write16(dev, 0x050C, 0x0000); 658 b43legacy_write16(dev, 0x0508, 0x0000); 659 b43legacy_write16(dev, 0x050A, 0x0000); 660 b43legacy_write16(dev, 0x054C, 0x0000); 661 b43legacy_write16(dev, 0x056A, 0x0014); 662 b43legacy_write16(dev, 0x0568, 0x0826); 663 b43legacy_write16(dev, 0x0500, 0x0000); 664 b43legacy_write16(dev, 0x0502, 0x0030); 665 666 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) 667 b43legacy_radio_write16(dev, 0x0051, 0x0017); 668 for (i = 0x00; i < max_loop; i++) { 669 value = b43legacy_read16(dev, 0x050E); 670 if (value & 0x0080) 671 break; 672 udelay(10); 673 } 674 for (i = 0x00; i < 0x0A; i++) { 675 value = b43legacy_read16(dev, 0x050E); 676 if (value & 0x0400) 677 break; 678 udelay(10); 679 } 680 for (i = 0x00; i < 0x0A; i++) { 681 value = b43legacy_read16(dev, 0x0690); 682 if (!(value & 0x0100)) 683 break; 684 udelay(10); 685 } 686 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5) 687 b43legacy_radio_write16(dev, 0x0051, 0x0037); 688 } 689 690 /* Turn the Analog ON/OFF */ 691 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on) 692 { 693 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4); 694 } 695 696 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags) 697 { 698 u32 tmslow; 699 u32 macctl; 700 701 flags |= B43legacy_TMSLOW_PHYCLKEN; 702 flags |= B43legacy_TMSLOW_PHYRESET; 703 ssb_device_enable(dev->dev, flags); 704 msleep(2); /* Wait for the PLL to turn on. */ 705 706 /* Now take the PHY out of Reset again */ 707 tmslow = ssb_read32(dev->dev, SSB_TMSLOW); 708 tmslow |= SSB_TMSLOW_FGC; 709 tmslow &= ~B43legacy_TMSLOW_PHYRESET; 710 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); 711 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ 712 msleep(1); 713 tmslow &= ~SSB_TMSLOW_FGC; 714 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); 715 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */ 716 msleep(1); 717 718 /* Turn Analog ON */ 719 b43legacy_switch_analog(dev, 1); 720 721 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 722 macctl &= ~B43legacy_MACCTL_GMODE; 723 if (flags & B43legacy_TMSLOW_GMODE) { 724 macctl |= B43legacy_MACCTL_GMODE; 725 dev->phy.gmode = true; 726 } else 727 dev->phy.gmode = false; 728 macctl |= B43legacy_MACCTL_IHR_ENABLED; 729 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 730 } 731 732 static void handle_irq_transmit_status(struct b43legacy_wldev *dev) 733 { 734 u32 v0; 735 u32 v1; 736 u16 tmp; 737 struct b43legacy_txstatus stat; 738 739 while (1) { 740 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); 741 if (!(v0 & 0x00000001)) 742 break; 743 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); 744 745 stat.cookie = (v0 >> 16); 746 stat.seq = (v1 & 0x0000FFFF); 747 stat.phy_stat = ((v1 & 0x00FF0000) >> 16); 748 tmp = (v0 & 0x0000FFFF); 749 stat.frame_count = ((tmp & 0xF000) >> 12); 750 stat.rts_count = ((tmp & 0x0F00) >> 8); 751 stat.supp_reason = ((tmp & 0x001C) >> 2); 752 stat.pm_indicated = !!(tmp & 0x0080); 753 stat.intermediate = !!(tmp & 0x0040); 754 stat.for_ampdu = !!(tmp & 0x0020); 755 stat.acked = !!(tmp & 0x0002); 756 757 b43legacy_handle_txstatus(dev, &stat); 758 } 759 } 760 761 static void drain_txstatus_queue(struct b43legacy_wldev *dev) 762 { 763 u32 dummy; 764 765 if (dev->dev->id.revision < 5) 766 return; 767 /* Read all entries from the microcode TXstatus FIFO 768 * and throw them away. 769 */ 770 while (1) { 771 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); 772 if (!(dummy & 0x00000001)) 773 break; 774 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); 775 } 776 } 777 778 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev) 779 { 780 u32 val = 0; 781 782 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A); 783 val <<= 16; 784 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408); 785 786 return val; 787 } 788 789 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi) 790 { 791 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408, 792 (jssi & 0x0000FFFF)); 793 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A, 794 (jssi & 0xFFFF0000) >> 16); 795 } 796 797 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev) 798 { 799 b43legacy_jssi_write(dev, 0x7F7F7F7F); 800 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, 801 b43legacy_read32(dev, B43legacy_MMIO_MACCMD) 802 | B43legacy_MACCMD_BGNOISE); 803 B43legacy_WARN_ON(dev->noisecalc.channel_at_start != 804 dev->phy.channel); 805 } 806 807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev) 808 { 809 /* Top half of Link Quality calculation. */ 810 811 if (dev->noisecalc.calculation_running) 812 return; 813 dev->noisecalc.channel_at_start = dev->phy.channel; 814 dev->noisecalc.calculation_running = true; 815 dev->noisecalc.nr_samples = 0; 816 817 b43legacy_generate_noise_sample(dev); 818 } 819 820 static void handle_irq_noise(struct b43legacy_wldev *dev) 821 { 822 struct b43legacy_phy *phy = &dev->phy; 823 u16 tmp; 824 u8 noise[4]; 825 u8 i; 826 u8 j; 827 s32 average; 828 829 /* Bottom half of Link Quality calculation. */ 830 831 B43legacy_WARN_ON(!dev->noisecalc.calculation_running); 832 if (dev->noisecalc.channel_at_start != phy->channel) 833 goto drop_calculation; 834 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev)); 835 if (noise[0] == 0x7F || noise[1] == 0x7F || 836 noise[2] == 0x7F || noise[3] == 0x7F) 837 goto generate_new; 838 839 /* Get the noise samples. */ 840 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8); 841 i = dev->noisecalc.nr_samples; 842 noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 843 noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 844 noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 845 noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1); 846 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]]; 847 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]]; 848 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]]; 849 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]]; 850 dev->noisecalc.nr_samples++; 851 if (dev->noisecalc.nr_samples == 8) { 852 /* Calculate the Link Quality by the noise samples. */ 853 average = 0; 854 for (i = 0; i < 8; i++) { 855 for (j = 0; j < 4; j++) 856 average += dev->noisecalc.samples[i][j]; 857 } 858 average /= (8 * 4); 859 average *= 125; 860 average += 64; 861 average /= 128; 862 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 863 0x40C); 864 tmp = (tmp / 128) & 0x1F; 865 if (tmp >= 8) 866 average += 2; 867 else 868 average -= 25; 869 if (tmp == 8) 870 average -= 72; 871 else 872 average -= 48; 873 874 dev->stats.link_noise = average; 875 drop_calculation: 876 dev->noisecalc.calculation_running = false; 877 return; 878 } 879 generate_new: 880 b43legacy_generate_noise_sample(dev); 881 } 882 883 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev) 884 { 885 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) { 886 /* TODO: PS TBTT */ 887 } else { 888 if (1/*FIXME: the last PSpoll frame was sent successfully */) 889 b43legacy_power_saving_ctl_bits(dev, -1, -1); 890 } 891 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) 892 dev->dfq_valid = true; 893 } 894 895 static void handle_irq_atim_end(struct b43legacy_wldev *dev) 896 { 897 if (dev->dfq_valid) { 898 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, 899 b43legacy_read32(dev, B43legacy_MMIO_MACCMD) 900 | B43legacy_MACCMD_DFQ_VALID); 901 dev->dfq_valid = false; 902 } 903 } 904 905 static void handle_irq_pmq(struct b43legacy_wldev *dev) 906 { 907 u32 tmp; 908 909 /* TODO: AP mode. */ 910 911 while (1) { 912 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS); 913 if (!(tmp & 0x00000008)) 914 break; 915 } 916 /* 16bit write is odd, but correct. */ 917 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002); 918 } 919 920 static void b43legacy_write_template_common(struct b43legacy_wldev *dev, 921 const u8 *data, u16 size, 922 u16 ram_offset, 923 u16 shm_size_offset, u8 rate) 924 { 925 u32 i; 926 u32 tmp; 927 struct b43legacy_plcp_hdr4 plcp; 928 929 plcp.data = 0; 930 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate); 931 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data)); 932 ram_offset += sizeof(u32); 933 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet. 934 * So leave the first two bytes of the next write blank. 935 */ 936 tmp = (u32)(data[0]) << 16; 937 tmp |= (u32)(data[1]) << 24; 938 b43legacy_ram_write(dev, ram_offset, tmp); 939 ram_offset += sizeof(u32); 940 for (i = 2; i < size; i += sizeof(u32)) { 941 tmp = (u32)(data[i + 0]); 942 if (i + 1 < size) 943 tmp |= (u32)(data[i + 1]) << 8; 944 if (i + 2 < size) 945 tmp |= (u32)(data[i + 2]) << 16; 946 if (i + 3 < size) 947 tmp |= (u32)(data[i + 3]) << 24; 948 b43legacy_ram_write(dev, ram_offset + i - 2, tmp); 949 } 950 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset, 951 size + sizeof(struct b43legacy_plcp_hdr6)); 952 } 953 954 /* Convert a b43legacy antenna number value to the PHY TX control value. */ 955 static u16 b43legacy_antenna_to_phyctl(int antenna) 956 { 957 switch (antenna) { 958 case B43legacy_ANTENNA0: 959 return B43legacy_TX4_PHY_ANT0; 960 case B43legacy_ANTENNA1: 961 return B43legacy_TX4_PHY_ANT1; 962 } 963 return B43legacy_TX4_PHY_ANTLAST; 964 } 965 966 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev, 967 u16 ram_offset, 968 u16 shm_size_offset) 969 { 970 971 unsigned int i, len, variable_len; 972 const struct ieee80211_mgmt *bcn; 973 const u8 *ie; 974 bool tim_found = false; 975 unsigned int rate; 976 u16 ctl; 977 int antenna; 978 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon); 979 980 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data); 981 len = min_t(size_t, dev->wl->current_beacon->len, 982 0x200 - sizeof(struct b43legacy_plcp_hdr6)); 983 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value; 984 985 b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset, 986 shm_size_offset, rate); 987 988 /* Write the PHY TX control parameters. */ 989 antenna = B43legacy_ANTENNA_DEFAULT; 990 antenna = b43legacy_antenna_to_phyctl(antenna); 991 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 992 B43legacy_SHM_SH_BEACPHYCTL); 993 /* We can't send beacons with short preamble. Would get PHY errors. */ 994 ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL; 995 ctl &= ~B43legacy_TX4_PHY_ANT; 996 ctl &= ~B43legacy_TX4_PHY_ENC; 997 ctl |= antenna; 998 ctl |= B43legacy_TX4_PHY_ENC_CCK; 999 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 1000 B43legacy_SHM_SH_BEACPHYCTL, ctl); 1001 1002 /* Find the position of the TIM and the DTIM_period value 1003 * and write them to SHM. */ 1004 ie = bcn->u.beacon.variable; 1005 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable); 1006 for (i = 0; i < variable_len - 2; ) { 1007 uint8_t ie_id, ie_len; 1008 1009 ie_id = ie[i]; 1010 ie_len = ie[i + 1]; 1011 if (ie_id == 5) { 1012 u16 tim_position; 1013 u16 dtim_period; 1014 /* This is the TIM Information Element */ 1015 1016 /* Check whether the ie_len is in the beacon data range. */ 1017 if (variable_len < ie_len + 2 + i) 1018 break; 1019 /* A valid TIM is at least 4 bytes long. */ 1020 if (ie_len < 4) 1021 break; 1022 tim_found = true; 1023 1024 tim_position = sizeof(struct b43legacy_plcp_hdr6); 1025 tim_position += offsetof(struct ieee80211_mgmt, 1026 u.beacon.variable); 1027 tim_position += i; 1028 1029 dtim_period = ie[i + 3]; 1030 1031 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 1032 B43legacy_SHM_SH_TIMPOS, tim_position); 1033 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 1034 B43legacy_SHM_SH_DTIMP, dtim_period); 1035 break; 1036 } 1037 i += ie_len + 2; 1038 } 1039 if (!tim_found) { 1040 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the " 1041 "beacon template packet. AP or IBSS operation " 1042 "may be broken.\n"); 1043 } else 1044 b43legacydbg(dev->wl, "Updated beacon template\n"); 1045 } 1046 1047 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev, 1048 u16 shm_offset, u16 size, 1049 struct ieee80211_rate *rate) 1050 { 1051 struct b43legacy_plcp_hdr4 plcp; 1052 u32 tmp; 1053 __le16 dur; 1054 1055 plcp.data = 0; 1056 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value); 1057 dur = ieee80211_generic_frame_duration(dev->wl->hw, 1058 dev->wl->vif, 1059 NL80211_BAND_2GHZ, 1060 size, 1061 rate); 1062 /* Write PLCP in two parts and timing for packet transfer */ 1063 tmp = le32_to_cpu(plcp.data); 1064 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset, 1065 tmp & 0xFFFF); 1066 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2, 1067 tmp >> 16); 1068 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6, 1069 le16_to_cpu(dur)); 1070 } 1071 1072 /* Instead of using custom probe response template, this function 1073 * just patches custom beacon template by: 1074 * 1) Changing packet type 1075 * 2) Patching duration field 1076 * 3) Stripping TIM 1077 */ 1078 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev, 1079 u16 *dest_size, 1080 struct ieee80211_rate *rate) 1081 { 1082 const u8 *src_data; 1083 u8 *dest_data; 1084 u16 src_size, elem_size, src_pos, dest_pos; 1085 __le16 dur; 1086 struct ieee80211_hdr *hdr; 1087 size_t ie_start; 1088 1089 src_size = dev->wl->current_beacon->len; 1090 src_data = (const u8 *)dev->wl->current_beacon->data; 1091 1092 /* Get the start offset of the variable IEs in the packet. */ 1093 ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable); 1094 B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt, 1095 u.beacon.variable)); 1096 1097 if (B43legacy_WARN_ON(src_size < ie_start)) 1098 return NULL; 1099 1100 dest_data = kmalloc(src_size, GFP_ATOMIC); 1101 if (unlikely(!dest_data)) 1102 return NULL; 1103 1104 /* Copy the static data and all Information Elements, except the TIM. */ 1105 memcpy(dest_data, src_data, ie_start); 1106 src_pos = ie_start; 1107 dest_pos = ie_start; 1108 for ( ; src_pos < src_size - 2; src_pos += elem_size) { 1109 elem_size = src_data[src_pos + 1] + 2; 1110 if (src_data[src_pos] == 5) { 1111 /* This is the TIM. */ 1112 continue; 1113 } 1114 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size); 1115 dest_pos += elem_size; 1116 } 1117 *dest_size = dest_pos; 1118 hdr = (struct ieee80211_hdr *)dest_data; 1119 1120 /* Set the frame control. */ 1121 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | 1122 IEEE80211_STYPE_PROBE_RESP); 1123 dur = ieee80211_generic_frame_duration(dev->wl->hw, 1124 dev->wl->vif, 1125 NL80211_BAND_2GHZ, 1126 *dest_size, 1127 rate); 1128 hdr->duration_id = dur; 1129 1130 return dest_data; 1131 } 1132 1133 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev, 1134 u16 ram_offset, 1135 u16 shm_size_offset, 1136 struct ieee80211_rate *rate) 1137 { 1138 const u8 *probe_resp_data; 1139 u16 size; 1140 1141 size = dev->wl->current_beacon->len; 1142 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate); 1143 if (unlikely(!probe_resp_data)) 1144 return; 1145 1146 /* Looks like PLCP headers plus packet timings are stored for 1147 * all possible basic rates 1148 */ 1149 b43legacy_write_probe_resp_plcp(dev, 0x31A, size, 1150 &b43legacy_b_ratetable[0]); 1151 b43legacy_write_probe_resp_plcp(dev, 0x32C, size, 1152 &b43legacy_b_ratetable[1]); 1153 b43legacy_write_probe_resp_plcp(dev, 0x33E, size, 1154 &b43legacy_b_ratetable[2]); 1155 b43legacy_write_probe_resp_plcp(dev, 0x350, size, 1156 &b43legacy_b_ratetable[3]); 1157 1158 size = min_t(size_t, size, 1159 0x200 - sizeof(struct b43legacy_plcp_hdr6)); 1160 b43legacy_write_template_common(dev, probe_resp_data, 1161 size, ram_offset, 1162 shm_size_offset, rate->hw_value); 1163 kfree(probe_resp_data); 1164 } 1165 1166 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev) 1167 { 1168 struct b43legacy_wl *wl = dev->wl; 1169 1170 if (wl->beacon0_uploaded) 1171 return; 1172 b43legacy_write_beacon_template(dev, 0x68, 0x18); 1173 /* FIXME: Probe resp upload doesn't really belong here, 1174 * but we don't use that feature anyway. */ 1175 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A, 1176 &__b43legacy_ratetable[3]); 1177 wl->beacon0_uploaded = true; 1178 } 1179 1180 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev) 1181 { 1182 struct b43legacy_wl *wl = dev->wl; 1183 1184 if (wl->beacon1_uploaded) 1185 return; 1186 b43legacy_write_beacon_template(dev, 0x468, 0x1A); 1187 wl->beacon1_uploaded = true; 1188 } 1189 1190 static void handle_irq_beacon(struct b43legacy_wldev *dev) 1191 { 1192 struct b43legacy_wl *wl = dev->wl; 1193 u32 cmd, beacon0_valid, beacon1_valid; 1194 1195 if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) 1196 return; 1197 1198 /* This is the bottom half of the asynchronous beacon update. */ 1199 1200 /* Ignore interrupt in the future. */ 1201 dev->irq_mask &= ~B43legacy_IRQ_BEACON; 1202 1203 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1204 beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID); 1205 beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID); 1206 1207 /* Schedule interrupt manually, if busy. */ 1208 if (beacon0_valid && beacon1_valid) { 1209 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON); 1210 dev->irq_mask |= B43legacy_IRQ_BEACON; 1211 return; 1212 } 1213 1214 if (unlikely(wl->beacon_templates_virgin)) { 1215 /* We never uploaded a beacon before. 1216 * Upload both templates now, but only mark one valid. */ 1217 wl->beacon_templates_virgin = false; 1218 b43legacy_upload_beacon0(dev); 1219 b43legacy_upload_beacon1(dev); 1220 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1221 cmd |= B43legacy_MACCMD_BEACON0_VALID; 1222 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); 1223 } else { 1224 if (!beacon0_valid) { 1225 b43legacy_upload_beacon0(dev); 1226 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1227 cmd |= B43legacy_MACCMD_BEACON0_VALID; 1228 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); 1229 } else if (!beacon1_valid) { 1230 b43legacy_upload_beacon1(dev); 1231 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); 1232 cmd |= B43legacy_MACCMD_BEACON1_VALID; 1233 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); 1234 } 1235 } 1236 } 1237 1238 static void b43legacy_beacon_update_trigger_work(struct work_struct *work) 1239 { 1240 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl, 1241 beacon_update_trigger); 1242 struct b43legacy_wldev *dev; 1243 1244 mutex_lock(&wl->mutex); 1245 dev = wl->current_dev; 1246 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) { 1247 spin_lock_irq(&wl->irq_lock); 1248 /* Update beacon right away or defer to IRQ. */ 1249 handle_irq_beacon(dev); 1250 /* The handler might have updated the IRQ mask. */ 1251 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 1252 dev->irq_mask); 1253 mmiowb(); 1254 spin_unlock_irq(&wl->irq_lock); 1255 } 1256 mutex_unlock(&wl->mutex); 1257 } 1258 1259 /* Asynchronously update the packet templates in template RAM. 1260 * Locking: Requires wl->irq_lock to be locked. */ 1261 static void b43legacy_update_templates(struct b43legacy_wl *wl) 1262 { 1263 struct sk_buff *beacon; 1264 /* This is the top half of the ansynchronous beacon update. The bottom 1265 * half is the beacon IRQ. Beacon update must be asynchronous to avoid 1266 * sending an invalid beacon. This can happen for example, if the 1267 * firmware transmits a beacon while we are updating it. */ 1268 1269 /* We could modify the existing beacon and set the aid bit in the TIM 1270 * field, but that would probably require resizing and moving of data 1271 * within the beacon template. Simply request a new beacon and let 1272 * mac80211 do the hard work. */ 1273 beacon = ieee80211_beacon_get(wl->hw, wl->vif); 1274 if (unlikely(!beacon)) 1275 return; 1276 1277 if (wl->current_beacon) 1278 dev_kfree_skb_any(wl->current_beacon); 1279 wl->current_beacon = beacon; 1280 wl->beacon0_uploaded = false; 1281 wl->beacon1_uploaded = false; 1282 ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger); 1283 } 1284 1285 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev, 1286 u16 beacon_int) 1287 { 1288 b43legacy_time_lock(dev); 1289 if (dev->dev->id.revision >= 3) { 1290 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP, 1291 (beacon_int << 16)); 1292 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START, 1293 (beacon_int << 10)); 1294 } else { 1295 b43legacy_write16(dev, 0x606, (beacon_int >> 6)); 1296 b43legacy_write16(dev, 0x610, beacon_int); 1297 } 1298 b43legacy_time_unlock(dev); 1299 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int); 1300 } 1301 1302 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev) 1303 { 1304 } 1305 1306 /* Interrupt handler bottom-half */ 1307 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev) 1308 { 1309 u32 reason; 1310 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)]; 1311 u32 merged_dma_reason = 0; 1312 int i; 1313 unsigned long flags; 1314 1315 spin_lock_irqsave(&dev->wl->irq_lock, flags); 1316 1317 B43legacy_WARN_ON(b43legacy_status(dev) < 1318 B43legacy_STAT_INITIALIZED); 1319 1320 reason = dev->irq_reason; 1321 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) { 1322 dma_reason[i] = dev->dma_reason[i]; 1323 merged_dma_reason |= dma_reason[i]; 1324 } 1325 1326 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR)) 1327 b43legacyerr(dev->wl, "MAC transmission error\n"); 1328 1329 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) { 1330 b43legacyerr(dev->wl, "PHY transmission error\n"); 1331 rmb(); 1332 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) { 1333 b43legacyerr(dev->wl, "Too many PHY TX errors, " 1334 "restarting the controller\n"); 1335 b43legacy_controller_restart(dev, "PHY TX errors"); 1336 } 1337 } 1338 1339 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK | 1340 B43legacy_DMAIRQ_NONFATALMASK))) { 1341 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) { 1342 b43legacyerr(dev->wl, "Fatal DMA error: " 1343 "0x%08X, 0x%08X, 0x%08X, " 1344 "0x%08X, 0x%08X, 0x%08X\n", 1345 dma_reason[0], dma_reason[1], 1346 dma_reason[2], dma_reason[3], 1347 dma_reason[4], dma_reason[5]); 1348 b43legacy_controller_restart(dev, "DMA error"); 1349 mmiowb(); 1350 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); 1351 return; 1352 } 1353 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK) 1354 b43legacyerr(dev->wl, "DMA error: " 1355 "0x%08X, 0x%08X, 0x%08X, " 1356 "0x%08X, 0x%08X, 0x%08X\n", 1357 dma_reason[0], dma_reason[1], 1358 dma_reason[2], dma_reason[3], 1359 dma_reason[4], dma_reason[5]); 1360 } 1361 1362 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG)) 1363 handle_irq_ucode_debug(dev); 1364 if (reason & B43legacy_IRQ_TBTT_INDI) 1365 handle_irq_tbtt_indication(dev); 1366 if (reason & B43legacy_IRQ_ATIM_END) 1367 handle_irq_atim_end(dev); 1368 if (reason & B43legacy_IRQ_BEACON) 1369 handle_irq_beacon(dev); 1370 if (reason & B43legacy_IRQ_PMQ) 1371 handle_irq_pmq(dev); 1372 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK) 1373 ;/*TODO*/ 1374 if (reason & B43legacy_IRQ_NOISESAMPLE_OK) 1375 handle_irq_noise(dev); 1376 1377 /* Check the DMA reason registers for received data. */ 1378 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) { 1379 if (b43legacy_using_pio(dev)) 1380 b43legacy_pio_rx(dev->pio.queue0); 1381 else 1382 b43legacy_dma_rx(dev->dma.rx_ring0); 1383 } 1384 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE); 1385 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE); 1386 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) { 1387 if (b43legacy_using_pio(dev)) 1388 b43legacy_pio_rx(dev->pio.queue3); 1389 else 1390 b43legacy_dma_rx(dev->dma.rx_ring3); 1391 } 1392 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE); 1393 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE); 1394 1395 if (reason & B43legacy_IRQ_TX_OK) 1396 handle_irq_transmit_status(dev); 1397 1398 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 1399 mmiowb(); 1400 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); 1401 } 1402 1403 static void pio_irq_workaround(struct b43legacy_wldev *dev, 1404 u16 base, int queueidx) 1405 { 1406 u16 rxctl; 1407 1408 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL); 1409 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE) 1410 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE; 1411 else 1412 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE; 1413 } 1414 1415 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason) 1416 { 1417 if (b43legacy_using_pio(dev) && 1418 (dev->dev->id.revision < 3) && 1419 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) { 1420 /* Apply a PIO specific workaround to the dma_reasons */ 1421 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0); 1422 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1); 1423 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2); 1424 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3); 1425 } 1426 1427 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason); 1428 1429 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON, 1430 dev->dma_reason[0]); 1431 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON, 1432 dev->dma_reason[1]); 1433 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON, 1434 dev->dma_reason[2]); 1435 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON, 1436 dev->dma_reason[3]); 1437 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON, 1438 dev->dma_reason[4]); 1439 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON, 1440 dev->dma_reason[5]); 1441 } 1442 1443 /* Interrupt handler top-half */ 1444 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id) 1445 { 1446 irqreturn_t ret = IRQ_NONE; 1447 struct b43legacy_wldev *dev = dev_id; 1448 u32 reason; 1449 1450 B43legacy_WARN_ON(!dev); 1451 1452 spin_lock(&dev->wl->irq_lock); 1453 1454 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED)) 1455 /* This can only happen on shared IRQ lines. */ 1456 goto out; 1457 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1458 if (reason == 0xffffffff) /* shared IRQ */ 1459 goto out; 1460 ret = IRQ_HANDLED; 1461 reason &= dev->irq_mask; 1462 if (!reason) 1463 goto out; 1464 1465 dev->dma_reason[0] = b43legacy_read32(dev, 1466 B43legacy_MMIO_DMA0_REASON) 1467 & 0x0001DC00; 1468 dev->dma_reason[1] = b43legacy_read32(dev, 1469 B43legacy_MMIO_DMA1_REASON) 1470 & 0x0000DC00; 1471 dev->dma_reason[2] = b43legacy_read32(dev, 1472 B43legacy_MMIO_DMA2_REASON) 1473 & 0x0000DC00; 1474 dev->dma_reason[3] = b43legacy_read32(dev, 1475 B43legacy_MMIO_DMA3_REASON) 1476 & 0x0001DC00; 1477 dev->dma_reason[4] = b43legacy_read32(dev, 1478 B43legacy_MMIO_DMA4_REASON) 1479 & 0x0000DC00; 1480 dev->dma_reason[5] = b43legacy_read32(dev, 1481 B43legacy_MMIO_DMA5_REASON) 1482 & 0x0000DC00; 1483 1484 b43legacy_interrupt_ack(dev, reason); 1485 /* Disable all IRQs. They are enabled again in the bottom half. */ 1486 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 1487 /* Save the reason code and call our bottom half. */ 1488 dev->irq_reason = reason; 1489 tasklet_schedule(&dev->isr_tasklet); 1490 out: 1491 mmiowb(); 1492 spin_unlock(&dev->wl->irq_lock); 1493 1494 return ret; 1495 } 1496 1497 static void b43legacy_release_firmware(struct b43legacy_wldev *dev) 1498 { 1499 release_firmware(dev->fw.ucode); 1500 dev->fw.ucode = NULL; 1501 release_firmware(dev->fw.pcm); 1502 dev->fw.pcm = NULL; 1503 release_firmware(dev->fw.initvals); 1504 dev->fw.initvals = NULL; 1505 release_firmware(dev->fw.initvals_band); 1506 dev->fw.initvals_band = NULL; 1507 } 1508 1509 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl) 1510 { 1511 b43legacyerr(wl, "You must go to http://wireless.kernel.org/en/users/" 1512 "Drivers/b43#devicefirmware " 1513 "and download the correct firmware (version 3).\n"); 1514 } 1515 1516 static void b43legacy_fw_cb(const struct firmware *firmware, void *context) 1517 { 1518 struct b43legacy_wldev *dev = context; 1519 1520 dev->fwp = firmware; 1521 complete(&dev->fw_load_complete); 1522 } 1523 1524 static int do_request_fw(struct b43legacy_wldev *dev, 1525 const char *name, 1526 const struct firmware **fw, bool async) 1527 { 1528 char path[sizeof(modparam_fwpostfix) + 32]; 1529 struct b43legacy_fw_header *hdr; 1530 u32 size; 1531 int err; 1532 1533 if (!name) 1534 return 0; 1535 1536 snprintf(path, ARRAY_SIZE(path), 1537 "b43legacy%s/%s.fw", 1538 modparam_fwpostfix, name); 1539 b43legacyinfo(dev->wl, "Loading firmware %s\n", path); 1540 if (async) { 1541 init_completion(&dev->fw_load_complete); 1542 err = request_firmware_nowait(THIS_MODULE, 1, path, 1543 dev->dev->dev, GFP_KERNEL, 1544 dev, b43legacy_fw_cb); 1545 if (err) { 1546 b43legacyerr(dev->wl, "Unable to load firmware\n"); 1547 return err; 1548 } 1549 /* stall here until fw ready */ 1550 wait_for_completion(&dev->fw_load_complete); 1551 if (!dev->fwp) 1552 err = -EINVAL; 1553 *fw = dev->fwp; 1554 } else { 1555 err = request_firmware(fw, path, dev->dev->dev); 1556 } 1557 if (err) { 1558 b43legacyerr(dev->wl, "Firmware file \"%s\" not found " 1559 "or load failed.\n", path); 1560 return err; 1561 } 1562 if ((*fw)->size < sizeof(struct b43legacy_fw_header)) 1563 goto err_format; 1564 hdr = (struct b43legacy_fw_header *)((*fw)->data); 1565 switch (hdr->type) { 1566 case B43legacy_FW_TYPE_UCODE: 1567 case B43legacy_FW_TYPE_PCM: 1568 size = be32_to_cpu(hdr->size); 1569 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header)) 1570 goto err_format; 1571 /* fallthrough */ 1572 case B43legacy_FW_TYPE_IV: 1573 if (hdr->ver != 1) 1574 goto err_format; 1575 break; 1576 default: 1577 goto err_format; 1578 } 1579 1580 return err; 1581 1582 err_format: 1583 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path); 1584 return -EPROTO; 1585 } 1586 1587 static int b43legacy_one_core_attach(struct ssb_device *dev, 1588 struct b43legacy_wl *wl); 1589 static void b43legacy_one_core_detach(struct ssb_device *dev); 1590 1591 static void b43legacy_request_firmware(struct work_struct *work) 1592 { 1593 struct b43legacy_wl *wl = container_of(work, 1594 struct b43legacy_wl, firmware_load); 1595 struct b43legacy_wldev *dev = wl->current_dev; 1596 struct b43legacy_firmware *fw = &dev->fw; 1597 const u8 rev = dev->dev->id.revision; 1598 const char *filename; 1599 int err; 1600 1601 if (!fw->ucode) { 1602 if (rev == 2) 1603 filename = "ucode2"; 1604 else if (rev == 4) 1605 filename = "ucode4"; 1606 else 1607 filename = "ucode5"; 1608 err = do_request_fw(dev, filename, &fw->ucode, true); 1609 if (err) 1610 goto err_load; 1611 } 1612 if (!fw->pcm) { 1613 if (rev < 5) 1614 filename = "pcm4"; 1615 else 1616 filename = "pcm5"; 1617 err = do_request_fw(dev, filename, &fw->pcm, false); 1618 if (err) 1619 goto err_load; 1620 } 1621 if (!fw->initvals) { 1622 switch (dev->phy.type) { 1623 case B43legacy_PHYTYPE_B: 1624 case B43legacy_PHYTYPE_G: 1625 if ((rev >= 5) && (rev <= 10)) 1626 filename = "b0g0initvals5"; 1627 else if (rev == 2 || rev == 4) 1628 filename = "b0g0initvals2"; 1629 else 1630 goto err_no_initvals; 1631 break; 1632 default: 1633 goto err_no_initvals; 1634 } 1635 err = do_request_fw(dev, filename, &fw->initvals, false); 1636 if (err) 1637 goto err_load; 1638 } 1639 if (!fw->initvals_band) { 1640 switch (dev->phy.type) { 1641 case B43legacy_PHYTYPE_B: 1642 case B43legacy_PHYTYPE_G: 1643 if ((rev >= 5) && (rev <= 10)) 1644 filename = "b0g0bsinitvals5"; 1645 else if (rev >= 11) 1646 filename = NULL; 1647 else if (rev == 2 || rev == 4) 1648 filename = NULL; 1649 else 1650 goto err_no_initvals; 1651 break; 1652 default: 1653 goto err_no_initvals; 1654 } 1655 err = do_request_fw(dev, filename, &fw->initvals_band, false); 1656 if (err) 1657 goto err_load; 1658 } 1659 err = ieee80211_register_hw(wl->hw); 1660 if (err) 1661 goto err_one_core_detach; 1662 return; 1663 1664 err_one_core_detach: 1665 b43legacy_one_core_detach(dev->dev); 1666 goto error; 1667 1668 err_load: 1669 b43legacy_print_fw_helptext(dev->wl); 1670 goto error; 1671 1672 err_no_initvals: 1673 err = -ENODEV; 1674 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, " 1675 "core rev %u\n", dev->phy.type, rev); 1676 goto error; 1677 1678 error: 1679 b43legacy_release_firmware(dev); 1680 return; 1681 } 1682 1683 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev) 1684 { 1685 struct wiphy *wiphy = dev->wl->hw->wiphy; 1686 const size_t hdr_len = sizeof(struct b43legacy_fw_header); 1687 const __be32 *data; 1688 unsigned int i; 1689 unsigned int len; 1690 u16 fwrev; 1691 u16 fwpatch; 1692 u16 fwdate; 1693 u16 fwtime; 1694 u32 tmp, macctl; 1695 int err = 0; 1696 1697 /* Jump the microcode PSM to offset 0 */ 1698 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1699 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN); 1700 macctl |= B43legacy_MACCTL_PSM_JMP0; 1701 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 1702 /* Zero out all microcode PSM registers and shared memory. */ 1703 for (i = 0; i < 64; i++) 1704 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0); 1705 for (i = 0; i < 4096; i += 2) 1706 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0); 1707 1708 /* Upload Microcode. */ 1709 data = (__be32 *) (dev->fw.ucode->data + hdr_len); 1710 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32); 1711 b43legacy_shm_control_word(dev, 1712 B43legacy_SHM_UCODE | 1713 B43legacy_SHM_AUTOINC_W, 1714 0x0000); 1715 for (i = 0; i < len; i++) { 1716 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 1717 be32_to_cpu(data[i])); 1718 udelay(10); 1719 } 1720 1721 if (dev->fw.pcm) { 1722 /* Upload PCM data. */ 1723 data = (__be32 *) (dev->fw.pcm->data + hdr_len); 1724 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32); 1725 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA); 1726 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000); 1727 /* No need for autoinc bit in SHM_HW */ 1728 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB); 1729 for (i = 0; i < len; i++) { 1730 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 1731 be32_to_cpu(data[i])); 1732 udelay(10); 1733 } 1734 } 1735 1736 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 1737 B43legacy_IRQ_ALL); 1738 1739 /* Start the microcode PSM */ 1740 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1741 macctl &= ~B43legacy_MACCTL_PSM_JMP0; 1742 macctl |= B43legacy_MACCTL_PSM_RUN; 1743 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 1744 1745 /* Wait for the microcode to load and respond */ 1746 i = 0; 1747 while (1) { 1748 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1749 if (tmp == B43legacy_IRQ_MAC_SUSPENDED) 1750 break; 1751 i++; 1752 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) { 1753 b43legacyerr(dev->wl, "Microcode not responding\n"); 1754 b43legacy_print_fw_helptext(dev->wl); 1755 err = -ENODEV; 1756 goto error; 1757 } 1758 msleep_interruptible(50); 1759 if (signal_pending(current)) { 1760 err = -EINTR; 1761 goto error; 1762 } 1763 } 1764 /* dummy read follows */ 1765 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1766 1767 /* Get and check the revisions. */ 1768 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1769 B43legacy_SHM_SH_UCODEREV); 1770 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1771 B43legacy_SHM_SH_UCODEPATCH); 1772 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1773 B43legacy_SHM_SH_UCODEDATE); 1774 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 1775 B43legacy_SHM_SH_UCODETIME); 1776 1777 if (fwrev > 0x128) { 1778 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE." 1779 " Only firmware from binary drivers version 3.x" 1780 " is supported. You must change your firmware" 1781 " files.\n"); 1782 b43legacy_print_fw_helptext(dev->wl); 1783 err = -EOPNOTSUPP; 1784 goto error; 1785 } 1786 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u " 1787 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch, 1788 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF, 1789 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, 1790 fwtime & 0x1F); 1791 1792 dev->fw.rev = fwrev; 1793 dev->fw.patch = fwpatch; 1794 1795 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u", 1796 dev->fw.rev, dev->fw.patch); 1797 wiphy->hw_version = dev->dev->id.coreid; 1798 1799 return 0; 1800 1801 error: 1802 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1803 macctl &= ~B43legacy_MACCTL_PSM_RUN; 1804 macctl |= B43legacy_MACCTL_PSM_JMP0; 1805 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 1806 1807 return err; 1808 } 1809 1810 static int b43legacy_write_initvals(struct b43legacy_wldev *dev, 1811 const struct b43legacy_iv *ivals, 1812 size_t count, 1813 size_t array_size) 1814 { 1815 const struct b43legacy_iv *iv; 1816 u16 offset; 1817 size_t i; 1818 bool bit32; 1819 1820 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6); 1821 iv = ivals; 1822 for (i = 0; i < count; i++) { 1823 if (array_size < sizeof(iv->offset_size)) 1824 goto err_format; 1825 array_size -= sizeof(iv->offset_size); 1826 offset = be16_to_cpu(iv->offset_size); 1827 bit32 = !!(offset & B43legacy_IV_32BIT); 1828 offset &= B43legacy_IV_OFFSET_MASK; 1829 if (offset >= 0x1000) 1830 goto err_format; 1831 if (bit32) { 1832 u32 value; 1833 1834 if (array_size < sizeof(iv->data.d32)) 1835 goto err_format; 1836 array_size -= sizeof(iv->data.d32); 1837 1838 value = get_unaligned_be32(&iv->data.d32); 1839 b43legacy_write32(dev, offset, value); 1840 1841 iv = (const struct b43legacy_iv *)((const uint8_t *)iv + 1842 sizeof(__be16) + 1843 sizeof(__be32)); 1844 } else { 1845 u16 value; 1846 1847 if (array_size < sizeof(iv->data.d16)) 1848 goto err_format; 1849 array_size -= sizeof(iv->data.d16); 1850 1851 value = be16_to_cpu(iv->data.d16); 1852 b43legacy_write16(dev, offset, value); 1853 1854 iv = (const struct b43legacy_iv *)((const uint8_t *)iv + 1855 sizeof(__be16) + 1856 sizeof(__be16)); 1857 } 1858 } 1859 if (array_size) 1860 goto err_format; 1861 1862 return 0; 1863 1864 err_format: 1865 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n"); 1866 b43legacy_print_fw_helptext(dev->wl); 1867 1868 return -EPROTO; 1869 } 1870 1871 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev) 1872 { 1873 const size_t hdr_len = sizeof(struct b43legacy_fw_header); 1874 const struct b43legacy_fw_header *hdr; 1875 struct b43legacy_firmware *fw = &dev->fw; 1876 const struct b43legacy_iv *ivals; 1877 size_t count; 1878 int err; 1879 1880 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data); 1881 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len); 1882 count = be32_to_cpu(hdr->size); 1883 err = b43legacy_write_initvals(dev, ivals, count, 1884 fw->initvals->size - hdr_len); 1885 if (err) 1886 goto out; 1887 if (fw->initvals_band) { 1888 hdr = (const struct b43legacy_fw_header *) 1889 (fw->initvals_band->data); 1890 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data 1891 + hdr_len); 1892 count = be32_to_cpu(hdr->size); 1893 err = b43legacy_write_initvals(dev, ivals, count, 1894 fw->initvals_band->size - hdr_len); 1895 if (err) 1896 goto out; 1897 } 1898 out: 1899 1900 return err; 1901 } 1902 1903 /* Initialize the GPIOs 1904 * http://bcm-specs.sipsolutions.net/GPIO 1905 */ 1906 static int b43legacy_gpio_init(struct b43legacy_wldev *dev) 1907 { 1908 struct ssb_bus *bus = dev->dev->bus; 1909 struct ssb_device *gpiodev, *pcidev = NULL; 1910 u32 mask; 1911 u32 set; 1912 1913 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 1914 b43legacy_read32(dev, 1915 B43legacy_MMIO_MACCTL) 1916 & 0xFFFF3FFF); 1917 1918 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, 1919 b43legacy_read16(dev, 1920 B43legacy_MMIO_GPIO_MASK) 1921 | 0x000F); 1922 1923 mask = 0x0000001F; 1924 set = 0x0000000F; 1925 if (dev->dev->bus->chip_id == 0x4301) { 1926 mask |= 0x0060; 1927 set |= 0x0060; 1928 } 1929 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) { 1930 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, 1931 b43legacy_read16(dev, 1932 B43legacy_MMIO_GPIO_MASK) 1933 | 0x0200); 1934 mask |= 0x0200; 1935 set |= 0x0200; 1936 } 1937 if (dev->dev->id.revision >= 2) 1938 mask |= 0x0010; /* FIXME: This is redundant. */ 1939 1940 #ifdef CONFIG_SSB_DRIVER_PCICORE 1941 pcidev = bus->pcicore.dev; 1942 #endif 1943 gpiodev = bus->chipco.dev ? : pcidev; 1944 if (!gpiodev) 1945 return 0; 1946 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 1947 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL) 1948 & ~mask) | set); 1949 1950 return 0; 1951 } 1952 1953 /* Turn off all GPIO stuff. Call this on module unload, for example. */ 1954 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev) 1955 { 1956 struct ssb_bus *bus = dev->dev->bus; 1957 struct ssb_device *gpiodev, *pcidev = NULL; 1958 1959 #ifdef CONFIG_SSB_DRIVER_PCICORE 1960 pcidev = bus->pcicore.dev; 1961 #endif 1962 gpiodev = bus->chipco.dev ? : pcidev; 1963 if (!gpiodev) 1964 return; 1965 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0); 1966 } 1967 1968 /* http://bcm-specs.sipsolutions.net/EnableMac */ 1969 void b43legacy_mac_enable(struct b43legacy_wldev *dev) 1970 { 1971 dev->mac_suspended--; 1972 B43legacy_WARN_ON(dev->mac_suspended < 0); 1973 B43legacy_WARN_ON(irqs_disabled()); 1974 if (dev->mac_suspended == 0) { 1975 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 1976 b43legacy_read32(dev, 1977 B43legacy_MMIO_MACCTL) 1978 | B43legacy_MACCTL_ENABLED); 1979 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 1980 B43legacy_IRQ_MAC_SUSPENDED); 1981 /* the next two are dummy reads */ 1982 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 1983 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1984 b43legacy_power_saving_ctl_bits(dev, -1, -1); 1985 1986 /* Re-enable IRQs. */ 1987 spin_lock_irq(&dev->wl->irq_lock); 1988 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 1989 dev->irq_mask); 1990 spin_unlock_irq(&dev->wl->irq_lock); 1991 } 1992 } 1993 1994 /* http://bcm-specs.sipsolutions.net/SuspendMAC */ 1995 void b43legacy_mac_suspend(struct b43legacy_wldev *dev) 1996 { 1997 int i; 1998 u32 tmp; 1999 2000 might_sleep(); 2001 B43legacy_WARN_ON(irqs_disabled()); 2002 B43legacy_WARN_ON(dev->mac_suspended < 0); 2003 2004 if (dev->mac_suspended == 0) { 2005 /* Mask IRQs before suspending MAC. Otherwise 2006 * the MAC stays busy and won't suspend. */ 2007 spin_lock_irq(&dev->wl->irq_lock); 2008 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 2009 spin_unlock_irq(&dev->wl->irq_lock); 2010 b43legacy_synchronize_irq(dev); 2011 2012 b43legacy_power_saving_ctl_bits(dev, -1, 1); 2013 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, 2014 b43legacy_read32(dev, 2015 B43legacy_MMIO_MACCTL) 2016 & ~B43legacy_MACCTL_ENABLED); 2017 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 2018 for (i = 40; i; i--) { 2019 tmp = b43legacy_read32(dev, 2020 B43legacy_MMIO_GEN_IRQ_REASON); 2021 if (tmp & B43legacy_IRQ_MAC_SUSPENDED) 2022 goto out; 2023 msleep(1); 2024 } 2025 b43legacyerr(dev->wl, "MAC suspend failed\n"); 2026 } 2027 out: 2028 dev->mac_suspended++; 2029 } 2030 2031 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev) 2032 { 2033 struct b43legacy_wl *wl = dev->wl; 2034 u32 ctl; 2035 u16 cfp_pretbtt; 2036 2037 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2038 /* Reset status to STA infrastructure mode. */ 2039 ctl &= ~B43legacy_MACCTL_AP; 2040 ctl &= ~B43legacy_MACCTL_KEEP_CTL; 2041 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP; 2042 ctl &= ~B43legacy_MACCTL_KEEP_BAD; 2043 ctl &= ~B43legacy_MACCTL_PROMISC; 2044 ctl &= ~B43legacy_MACCTL_BEACPROMISC; 2045 ctl |= B43legacy_MACCTL_INFRA; 2046 2047 if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP)) 2048 ctl |= B43legacy_MACCTL_AP; 2049 else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)) 2050 ctl &= ~B43legacy_MACCTL_INFRA; 2051 2052 if (wl->filter_flags & FIF_CONTROL) 2053 ctl |= B43legacy_MACCTL_KEEP_CTL; 2054 if (wl->filter_flags & FIF_FCSFAIL) 2055 ctl |= B43legacy_MACCTL_KEEP_BAD; 2056 if (wl->filter_flags & FIF_PLCPFAIL) 2057 ctl |= B43legacy_MACCTL_KEEP_BADPLCP; 2058 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC) 2059 ctl |= B43legacy_MACCTL_BEACPROMISC; 2060 2061 /* Workaround: On old hardware the HW-MAC-address-filter 2062 * doesn't work properly, so always run promisc in filter 2063 * it in software. */ 2064 if (dev->dev->id.revision <= 4) 2065 ctl |= B43legacy_MACCTL_PROMISC; 2066 2067 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl); 2068 2069 cfp_pretbtt = 2; 2070 if ((ctl & B43legacy_MACCTL_INFRA) && 2071 !(ctl & B43legacy_MACCTL_AP)) { 2072 if (dev->dev->bus->chip_id == 0x4306 && 2073 dev->dev->bus->chip_rev == 3) 2074 cfp_pretbtt = 100; 2075 else 2076 cfp_pretbtt = 50; 2077 } 2078 b43legacy_write16(dev, 0x612, cfp_pretbtt); 2079 } 2080 2081 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev, 2082 u16 rate, 2083 int is_ofdm) 2084 { 2085 u16 offset; 2086 2087 if (is_ofdm) { 2088 offset = 0x480; 2089 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2; 2090 } else { 2091 offset = 0x4C0; 2092 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2; 2093 } 2094 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20, 2095 b43legacy_shm_read16(dev, 2096 B43legacy_SHM_SHARED, offset)); 2097 } 2098 2099 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev) 2100 { 2101 switch (dev->phy.type) { 2102 case B43legacy_PHYTYPE_G: 2103 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1); 2104 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1); 2105 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1); 2106 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1); 2107 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1); 2108 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1); 2109 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1); 2110 /* fallthrough */ 2111 case B43legacy_PHYTYPE_B: 2112 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0); 2113 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0); 2114 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0); 2115 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0); 2116 break; 2117 default: 2118 B43legacy_BUG_ON(1); 2119 } 2120 } 2121 2122 /* Set the TX-Antenna for management frames sent by firmware. */ 2123 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev, 2124 int antenna) 2125 { 2126 u16 ant = 0; 2127 u16 tmp; 2128 2129 switch (antenna) { 2130 case B43legacy_ANTENNA0: 2131 ant |= B43legacy_TX4_PHY_ANT0; 2132 break; 2133 case B43legacy_ANTENNA1: 2134 ant |= B43legacy_TX4_PHY_ANT1; 2135 break; 2136 case B43legacy_ANTENNA_AUTO: 2137 ant |= B43legacy_TX4_PHY_ANTLAST; 2138 break; 2139 default: 2140 B43legacy_BUG_ON(1); 2141 } 2142 2143 /* FIXME We also need to set the other flags of the PHY control 2144 * field somewhere. */ 2145 2146 /* For Beacons */ 2147 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2148 B43legacy_SHM_SH_BEACPHYCTL); 2149 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; 2150 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2151 B43legacy_SHM_SH_BEACPHYCTL, tmp); 2152 /* For ACK/CTS */ 2153 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2154 B43legacy_SHM_SH_ACKCTSPHYCTL); 2155 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; 2156 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2157 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp); 2158 /* For Probe Resposes */ 2159 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2160 B43legacy_SHM_SH_PRPHYCTL); 2161 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant; 2162 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2163 B43legacy_SHM_SH_PRPHYCTL, tmp); 2164 } 2165 2166 /* This is the opposite of b43legacy_chip_init() */ 2167 static void b43legacy_chip_exit(struct b43legacy_wldev *dev) 2168 { 2169 b43legacy_radio_turn_off(dev, 1); 2170 b43legacy_gpio_cleanup(dev); 2171 /* firmware is released later */ 2172 } 2173 2174 /* Initialize the chip 2175 * http://bcm-specs.sipsolutions.net/ChipInit 2176 */ 2177 static int b43legacy_chip_init(struct b43legacy_wldev *dev) 2178 { 2179 struct b43legacy_phy *phy = &dev->phy; 2180 int err; 2181 int tmp; 2182 u32 value32, macctl; 2183 u16 value16; 2184 2185 /* Initialize the MAC control */ 2186 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED; 2187 if (dev->phy.gmode) 2188 macctl |= B43legacy_MACCTL_GMODE; 2189 macctl |= B43legacy_MACCTL_INFRA; 2190 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 2191 2192 err = b43legacy_upload_microcode(dev); 2193 if (err) 2194 goto out; /* firmware is released later */ 2195 2196 err = b43legacy_gpio_init(dev); 2197 if (err) 2198 goto out; /* firmware is released later */ 2199 2200 err = b43legacy_upload_initvals(dev); 2201 if (err) 2202 goto err_gpio_clean; 2203 b43legacy_radio_turn_on(dev); 2204 2205 b43legacy_write16(dev, 0x03E6, 0x0000); 2206 err = b43legacy_phy_init(dev); 2207 if (err) 2208 goto err_radio_off; 2209 2210 /* Select initial Interference Mitigation. */ 2211 tmp = phy->interfmode; 2212 phy->interfmode = B43legacy_INTERFMODE_NONE; 2213 b43legacy_radio_set_interference_mitigation(dev, tmp); 2214 2215 b43legacy_phy_set_antenna_diversity(dev); 2216 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT); 2217 2218 if (phy->type == B43legacy_PHYTYPE_B) { 2219 value16 = b43legacy_read16(dev, 0x005E); 2220 value16 |= 0x0004; 2221 b43legacy_write16(dev, 0x005E, value16); 2222 } 2223 b43legacy_write32(dev, 0x0100, 0x01000000); 2224 if (dev->dev->id.revision < 5) 2225 b43legacy_write32(dev, 0x010C, 0x01000000); 2226 2227 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2228 value32 &= ~B43legacy_MACCTL_INFRA; 2229 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); 2230 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2231 value32 |= B43legacy_MACCTL_INFRA; 2232 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); 2233 2234 if (b43legacy_using_pio(dev)) { 2235 b43legacy_write32(dev, 0x0210, 0x00000100); 2236 b43legacy_write32(dev, 0x0230, 0x00000100); 2237 b43legacy_write32(dev, 0x0250, 0x00000100); 2238 b43legacy_write32(dev, 0x0270, 0x00000100); 2239 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034, 2240 0x0000); 2241 } 2242 2243 /* Probe Response Timeout value */ 2244 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */ 2245 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000); 2246 2247 /* Initially set the wireless operation mode. */ 2248 b43legacy_adjust_opmode(dev); 2249 2250 if (dev->dev->id.revision < 3) { 2251 b43legacy_write16(dev, 0x060E, 0x0000); 2252 b43legacy_write16(dev, 0x0610, 0x8000); 2253 b43legacy_write16(dev, 0x0604, 0x0000); 2254 b43legacy_write16(dev, 0x0606, 0x0200); 2255 } else { 2256 b43legacy_write32(dev, 0x0188, 0x80000000); 2257 b43legacy_write32(dev, 0x018C, 0x02000000); 2258 } 2259 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000); 2260 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00); 2261 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00); 2262 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00); 2263 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00); 2264 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00); 2265 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00); 2266 2267 value32 = ssb_read32(dev->dev, SSB_TMSLOW); 2268 value32 |= B43legacy_TMSLOW_MACPHYCLKEN; 2269 ssb_write32(dev->dev, SSB_TMSLOW, value32); 2270 2271 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY, 2272 dev->dev->bus->chipco.fast_pwrup_delay); 2273 2274 /* PHY TX errors counter. */ 2275 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); 2276 2277 B43legacy_WARN_ON(err != 0); 2278 b43legacydbg(dev->wl, "Chip initialized\n"); 2279 out: 2280 return err; 2281 2282 err_radio_off: 2283 b43legacy_radio_turn_off(dev, 1); 2284 err_gpio_clean: 2285 b43legacy_gpio_cleanup(dev); 2286 goto out; 2287 } 2288 2289 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev) 2290 { 2291 struct b43legacy_phy *phy = &dev->phy; 2292 2293 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2) 2294 return; 2295 2296 b43legacy_mac_suspend(dev); 2297 b43legacy_phy_lo_g_measure(dev); 2298 b43legacy_mac_enable(dev); 2299 } 2300 2301 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev) 2302 { 2303 b43legacy_phy_lo_mark_all_unused(dev); 2304 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) { 2305 b43legacy_mac_suspend(dev); 2306 b43legacy_calc_nrssi_slope(dev); 2307 b43legacy_mac_enable(dev); 2308 } 2309 } 2310 2311 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev) 2312 { 2313 /* Update device statistics. */ 2314 b43legacy_calculate_link_quality(dev); 2315 } 2316 2317 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev) 2318 { 2319 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */ 2320 2321 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); 2322 wmb(); 2323 } 2324 2325 static void do_periodic_work(struct b43legacy_wldev *dev) 2326 { 2327 unsigned int state; 2328 2329 state = dev->periodic_state; 2330 if (state % 8 == 0) 2331 b43legacy_periodic_every120sec(dev); 2332 if (state % 4 == 0) 2333 b43legacy_periodic_every60sec(dev); 2334 if (state % 2 == 0) 2335 b43legacy_periodic_every30sec(dev); 2336 b43legacy_periodic_every15sec(dev); 2337 } 2338 2339 /* Periodic work locking policy: 2340 * The whole periodic work handler is protected by 2341 * wl->mutex. If another lock is needed somewhere in the 2342 * pwork callchain, it's acquired in-place, where it's needed. 2343 */ 2344 static void b43legacy_periodic_work_handler(struct work_struct *work) 2345 { 2346 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev, 2347 periodic_work.work); 2348 struct b43legacy_wl *wl = dev->wl; 2349 unsigned long delay; 2350 2351 mutex_lock(&wl->mutex); 2352 2353 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED)) 2354 goto out; 2355 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP)) 2356 goto out_requeue; 2357 2358 do_periodic_work(dev); 2359 2360 dev->periodic_state++; 2361 out_requeue: 2362 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST)) 2363 delay = msecs_to_jiffies(50); 2364 else 2365 delay = round_jiffies_relative(HZ * 15); 2366 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay); 2367 out: 2368 mutex_unlock(&wl->mutex); 2369 } 2370 2371 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev) 2372 { 2373 struct delayed_work *work = &dev->periodic_work; 2374 2375 dev->periodic_state = 0; 2376 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler); 2377 ieee80211_queue_delayed_work(dev->wl->hw, work, 0); 2378 } 2379 2380 /* Validate access to the chip (SHM) */ 2381 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev) 2382 { 2383 u32 value; 2384 u32 shm_backup; 2385 2386 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0); 2387 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA); 2388 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != 2389 0xAA5555AA) 2390 goto error; 2391 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55); 2392 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != 2393 0x55AAAA55) 2394 goto error; 2395 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup); 2396 2397 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 2398 if ((value | B43legacy_MACCTL_GMODE) != 2399 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED)) 2400 goto error; 2401 2402 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 2403 if (value) 2404 goto error; 2405 2406 return 0; 2407 error: 2408 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n"); 2409 return -ENODEV; 2410 } 2411 2412 static void b43legacy_security_init(struct b43legacy_wldev *dev) 2413 { 2414 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20; 2415 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key)); 2416 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2417 0x0056); 2418 /* KTP is a word address, but we address SHM bytewise. 2419 * So multiply by two. 2420 */ 2421 dev->ktp *= 2; 2422 if (dev->dev->id.revision >= 5) 2423 /* Number of RCMTA address slots */ 2424 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT, 2425 dev->max_nr_keys - 8); 2426 } 2427 2428 #ifdef CONFIG_B43LEGACY_HWRNG 2429 static int b43legacy_rng_read(struct hwrng *rng, u32 *data) 2430 { 2431 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv; 2432 unsigned long flags; 2433 2434 /* Don't take wl->mutex here, as it could deadlock with 2435 * hwrng internal locking. It's not needed to take 2436 * wl->mutex here, anyway. */ 2437 2438 spin_lock_irqsave(&wl->irq_lock, flags); 2439 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG); 2440 spin_unlock_irqrestore(&wl->irq_lock, flags); 2441 2442 return (sizeof(u16)); 2443 } 2444 #endif 2445 2446 static void b43legacy_rng_exit(struct b43legacy_wl *wl) 2447 { 2448 #ifdef CONFIG_B43LEGACY_HWRNG 2449 if (wl->rng_initialized) 2450 hwrng_unregister(&wl->rng); 2451 #endif 2452 } 2453 2454 static int b43legacy_rng_init(struct b43legacy_wl *wl) 2455 { 2456 int err = 0; 2457 2458 #ifdef CONFIG_B43LEGACY_HWRNG 2459 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name), 2460 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy)); 2461 wl->rng.name = wl->rng_name; 2462 wl->rng.data_read = b43legacy_rng_read; 2463 wl->rng.priv = (unsigned long)wl; 2464 wl->rng_initialized = 1; 2465 err = hwrng_register(&wl->rng); 2466 if (err) { 2467 wl->rng_initialized = 0; 2468 b43legacyerr(wl, "Failed to register the random " 2469 "number generator (%d)\n", err); 2470 } 2471 2472 #endif 2473 return err; 2474 } 2475 2476 static void b43legacy_tx_work(struct work_struct *work) 2477 { 2478 struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl, 2479 tx_work); 2480 struct b43legacy_wldev *dev; 2481 struct sk_buff *skb; 2482 int queue_num; 2483 int err = 0; 2484 2485 mutex_lock(&wl->mutex); 2486 dev = wl->current_dev; 2487 if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) { 2488 mutex_unlock(&wl->mutex); 2489 return; 2490 } 2491 2492 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) { 2493 while (skb_queue_len(&wl->tx_queue[queue_num])) { 2494 skb = skb_dequeue(&wl->tx_queue[queue_num]); 2495 if (b43legacy_using_pio(dev)) 2496 err = b43legacy_pio_tx(dev, skb); 2497 else 2498 err = b43legacy_dma_tx(dev, skb); 2499 if (err == -ENOSPC) { 2500 wl->tx_queue_stopped[queue_num] = 1; 2501 ieee80211_stop_queue(wl->hw, queue_num); 2502 skb_queue_head(&wl->tx_queue[queue_num], skb); 2503 break; 2504 } 2505 if (unlikely(err)) 2506 dev_kfree_skb(skb); /* Drop it */ 2507 err = 0; 2508 } 2509 2510 if (!err) 2511 wl->tx_queue_stopped[queue_num] = 0; 2512 } 2513 2514 mutex_unlock(&wl->mutex); 2515 } 2516 2517 static void b43legacy_op_tx(struct ieee80211_hw *hw, 2518 struct ieee80211_tx_control *control, 2519 struct sk_buff *skb) 2520 { 2521 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2522 2523 if (unlikely(skb->len < 2 + 2 + 6)) { 2524 /* Too short, this can't be a valid frame. */ 2525 dev_kfree_skb_any(skb); 2526 return; 2527 } 2528 B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags); 2529 2530 skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb); 2531 if (!wl->tx_queue_stopped[skb->queue_mapping]) 2532 ieee80211_queue_work(wl->hw, &wl->tx_work); 2533 else 2534 ieee80211_stop_queue(wl->hw, skb->queue_mapping); 2535 } 2536 2537 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, 2538 struct ieee80211_vif *vif, u16 queue, 2539 const struct ieee80211_tx_queue_params *params) 2540 { 2541 return 0; 2542 } 2543 2544 static int b43legacy_op_get_stats(struct ieee80211_hw *hw, 2545 struct ieee80211_low_level_stats *stats) 2546 { 2547 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2548 unsigned long flags; 2549 2550 spin_lock_irqsave(&wl->irq_lock, flags); 2551 memcpy(stats, &wl->ieee_stats, sizeof(*stats)); 2552 spin_unlock_irqrestore(&wl->irq_lock, flags); 2553 2554 return 0; 2555 } 2556 2557 static const char *phymode_to_string(unsigned int phymode) 2558 { 2559 switch (phymode) { 2560 case B43legacy_PHYMODE_B: 2561 return "B"; 2562 case B43legacy_PHYMODE_G: 2563 return "G"; 2564 default: 2565 B43legacy_BUG_ON(1); 2566 } 2567 return ""; 2568 } 2569 2570 static int find_wldev_for_phymode(struct b43legacy_wl *wl, 2571 unsigned int phymode, 2572 struct b43legacy_wldev **dev, 2573 bool *gmode) 2574 { 2575 struct b43legacy_wldev *d; 2576 2577 list_for_each_entry(d, &wl->devlist, list) { 2578 if (d->phy.possible_phymodes & phymode) { 2579 /* Ok, this device supports the PHY-mode. 2580 * Set the gmode bit. */ 2581 *gmode = true; 2582 *dev = d; 2583 2584 return 0; 2585 } 2586 } 2587 2588 return -ESRCH; 2589 } 2590 2591 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev) 2592 { 2593 struct ssb_device *sdev = dev->dev; 2594 u32 tmslow; 2595 2596 tmslow = ssb_read32(sdev, SSB_TMSLOW); 2597 tmslow &= ~B43legacy_TMSLOW_GMODE; 2598 tmslow |= B43legacy_TMSLOW_PHYRESET; 2599 tmslow |= SSB_TMSLOW_FGC; 2600 ssb_write32(sdev, SSB_TMSLOW, tmslow); 2601 msleep(1); 2602 2603 tmslow = ssb_read32(sdev, SSB_TMSLOW); 2604 tmslow &= ~SSB_TMSLOW_FGC; 2605 tmslow |= B43legacy_TMSLOW_PHYRESET; 2606 ssb_write32(sdev, SSB_TMSLOW, tmslow); 2607 msleep(1); 2608 } 2609 2610 /* Expects wl->mutex locked */ 2611 static int b43legacy_switch_phymode(struct b43legacy_wl *wl, 2612 unsigned int new_mode) 2613 { 2614 struct b43legacy_wldev *uninitialized_var(up_dev); 2615 struct b43legacy_wldev *down_dev; 2616 int err; 2617 bool gmode = false; 2618 int prev_status; 2619 2620 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode); 2621 if (err) { 2622 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n", 2623 phymode_to_string(new_mode)); 2624 return err; 2625 } 2626 if ((up_dev == wl->current_dev) && 2627 (!!wl->current_dev->phy.gmode == !!gmode)) 2628 /* This device is already running. */ 2629 return 0; 2630 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n", 2631 phymode_to_string(new_mode)); 2632 down_dev = wl->current_dev; 2633 2634 prev_status = b43legacy_status(down_dev); 2635 /* Shutdown the currently running core. */ 2636 if (prev_status >= B43legacy_STAT_STARTED) 2637 b43legacy_wireless_core_stop(down_dev); 2638 if (prev_status >= B43legacy_STAT_INITIALIZED) 2639 b43legacy_wireless_core_exit(down_dev); 2640 2641 if (down_dev != up_dev) 2642 /* We switch to a different core, so we put PHY into 2643 * RESET on the old core. */ 2644 b43legacy_put_phy_into_reset(down_dev); 2645 2646 /* Now start the new core. */ 2647 up_dev->phy.gmode = gmode; 2648 if (prev_status >= B43legacy_STAT_INITIALIZED) { 2649 err = b43legacy_wireless_core_init(up_dev); 2650 if (err) { 2651 b43legacyerr(wl, "Fatal: Could not initialize device" 2652 " for newly selected %s-PHY mode\n", 2653 phymode_to_string(new_mode)); 2654 goto init_failure; 2655 } 2656 } 2657 if (prev_status >= B43legacy_STAT_STARTED) { 2658 err = b43legacy_wireless_core_start(up_dev); 2659 if (err) { 2660 b43legacyerr(wl, "Fatal: Could not start device for " 2661 "newly selected %s-PHY mode\n", 2662 phymode_to_string(new_mode)); 2663 b43legacy_wireless_core_exit(up_dev); 2664 goto init_failure; 2665 } 2666 } 2667 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status); 2668 2669 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0); 2670 2671 wl->current_dev = up_dev; 2672 2673 return 0; 2674 init_failure: 2675 /* Whoops, failed to init the new core. No core is operating now. */ 2676 wl->current_dev = NULL; 2677 return err; 2678 } 2679 2680 /* Write the short and long frame retry limit values. */ 2681 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev, 2682 unsigned int short_retry, 2683 unsigned int long_retry) 2684 { 2685 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing 2686 * the chip-internal counter. */ 2687 short_retry = min(short_retry, (unsigned int)0xF); 2688 long_retry = min(long_retry, (unsigned int)0xF); 2689 2690 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry); 2691 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry); 2692 } 2693 2694 static int b43legacy_op_dev_config(struct ieee80211_hw *hw, 2695 u32 changed) 2696 { 2697 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2698 struct b43legacy_wldev *dev; 2699 struct b43legacy_phy *phy; 2700 struct ieee80211_conf *conf = &hw->conf; 2701 unsigned long flags; 2702 unsigned int new_phymode = 0xFFFF; 2703 int antenna_tx; 2704 int err = 0; 2705 2706 antenna_tx = B43legacy_ANTENNA_DEFAULT; 2707 2708 mutex_lock(&wl->mutex); 2709 dev = wl->current_dev; 2710 phy = &dev->phy; 2711 2712 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) 2713 b43legacy_set_retry_limits(dev, 2714 conf->short_frame_max_tx_count, 2715 conf->long_frame_max_tx_count); 2716 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS; 2717 if (!changed) 2718 goto out_unlock_mutex; 2719 2720 /* Switch the PHY mode (if necessary). */ 2721 switch (conf->chandef.chan->band) { 2722 case NL80211_BAND_2GHZ: 2723 if (phy->type == B43legacy_PHYTYPE_B) 2724 new_phymode = B43legacy_PHYMODE_B; 2725 else 2726 new_phymode = B43legacy_PHYMODE_G; 2727 break; 2728 default: 2729 B43legacy_WARN_ON(1); 2730 } 2731 err = b43legacy_switch_phymode(wl, new_phymode); 2732 if (err) 2733 goto out_unlock_mutex; 2734 2735 /* Disable IRQs while reconfiguring the device. 2736 * This makes it possible to drop the spinlock throughout 2737 * the reconfiguration process. */ 2738 spin_lock_irqsave(&wl->irq_lock, flags); 2739 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { 2740 spin_unlock_irqrestore(&wl->irq_lock, flags); 2741 goto out_unlock_mutex; 2742 } 2743 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 2744 spin_unlock_irqrestore(&wl->irq_lock, flags); 2745 b43legacy_synchronize_irq(dev); 2746 2747 /* Switch to the requested channel. 2748 * The firmware takes care of races with the TX handler. */ 2749 if (conf->chandef.chan->hw_value != phy->channel) 2750 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value, 2751 0); 2752 2753 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR); 2754 2755 /* Adjust the desired TX power level. */ 2756 if (conf->power_level != 0) { 2757 if (conf->power_level != phy->power_level) { 2758 phy->power_level = conf->power_level; 2759 b43legacy_phy_xmitpower(dev); 2760 } 2761 } 2762 2763 /* Antennas for RX and management frame TX. */ 2764 b43legacy_mgmtframe_txantenna(dev, antenna_tx); 2765 2766 if (wl->radio_enabled != phy->radio_on) { 2767 if (wl->radio_enabled) { 2768 b43legacy_radio_turn_on(dev); 2769 b43legacyinfo(dev->wl, "Radio turned on by software\n"); 2770 if (!dev->radio_hw_enable) 2771 b43legacyinfo(dev->wl, "The hardware RF-kill" 2772 " button still turns the radio" 2773 " physically off. Press the" 2774 " button to turn it on.\n"); 2775 } else { 2776 b43legacy_radio_turn_off(dev, 0); 2777 b43legacyinfo(dev->wl, "Radio turned off by" 2778 " software\n"); 2779 } 2780 } 2781 2782 spin_lock_irqsave(&wl->irq_lock, flags); 2783 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 2784 mmiowb(); 2785 spin_unlock_irqrestore(&wl->irq_lock, flags); 2786 out_unlock_mutex: 2787 mutex_unlock(&wl->mutex); 2788 2789 return err; 2790 } 2791 2792 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates) 2793 { 2794 struct ieee80211_supported_band *sband = 2795 dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ]; 2796 struct ieee80211_rate *rate; 2797 int i; 2798 u16 basic, direct, offset, basic_offset, rateptr; 2799 2800 for (i = 0; i < sband->n_bitrates; i++) { 2801 rate = &sband->bitrates[i]; 2802 2803 if (b43legacy_is_cck_rate(rate->hw_value)) { 2804 direct = B43legacy_SHM_SH_CCKDIRECT; 2805 basic = B43legacy_SHM_SH_CCKBASIC; 2806 offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value); 2807 offset &= 0xF; 2808 } else { 2809 direct = B43legacy_SHM_SH_OFDMDIRECT; 2810 basic = B43legacy_SHM_SH_OFDMBASIC; 2811 offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value); 2812 offset &= 0xF; 2813 } 2814 2815 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate); 2816 2817 if (b43legacy_is_cck_rate(rate->hw_value)) { 2818 basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value); 2819 basic_offset &= 0xF; 2820 } else { 2821 basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value); 2822 basic_offset &= 0xF; 2823 } 2824 2825 /* 2826 * Get the pointer that we need to point to 2827 * from the direct map 2828 */ 2829 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 2830 direct + 2 * basic_offset); 2831 /* and write it to the basic map */ 2832 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 2833 basic + 2 * offset, rateptr); 2834 } 2835 } 2836 2837 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw, 2838 struct ieee80211_vif *vif, 2839 struct ieee80211_bss_conf *conf, 2840 u32 changed) 2841 { 2842 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2843 struct b43legacy_wldev *dev; 2844 unsigned long flags; 2845 2846 mutex_lock(&wl->mutex); 2847 B43legacy_WARN_ON(wl->vif != vif); 2848 2849 dev = wl->current_dev; 2850 2851 /* Disable IRQs while reconfiguring the device. 2852 * This makes it possible to drop the spinlock throughout 2853 * the reconfiguration process. */ 2854 spin_lock_irqsave(&wl->irq_lock, flags); 2855 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { 2856 spin_unlock_irqrestore(&wl->irq_lock, flags); 2857 goto out_unlock_mutex; 2858 } 2859 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 2860 2861 if (changed & BSS_CHANGED_BSSID) { 2862 b43legacy_synchronize_irq(dev); 2863 2864 if (conf->bssid) 2865 memcpy(wl->bssid, conf->bssid, ETH_ALEN); 2866 else 2867 eth_zero_addr(wl->bssid); 2868 } 2869 2870 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) { 2871 if (changed & BSS_CHANGED_BEACON && 2872 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) || 2873 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))) 2874 b43legacy_update_templates(wl); 2875 2876 if (changed & BSS_CHANGED_BSSID) 2877 b43legacy_write_mac_bssid_templates(dev); 2878 } 2879 spin_unlock_irqrestore(&wl->irq_lock, flags); 2880 2881 b43legacy_mac_suspend(dev); 2882 2883 if (changed & BSS_CHANGED_BEACON_INT && 2884 (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) || 2885 b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))) 2886 b43legacy_set_beacon_int(dev, conf->beacon_int); 2887 2888 if (changed & BSS_CHANGED_BASIC_RATES) 2889 b43legacy_update_basic_rates(dev, conf->basic_rates); 2890 2891 if (changed & BSS_CHANGED_ERP_SLOT) { 2892 if (conf->use_short_slot) 2893 b43legacy_short_slot_timing_enable(dev); 2894 else 2895 b43legacy_short_slot_timing_disable(dev); 2896 } 2897 2898 b43legacy_mac_enable(dev); 2899 2900 spin_lock_irqsave(&wl->irq_lock, flags); 2901 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 2902 /* XXX: why? */ 2903 mmiowb(); 2904 spin_unlock_irqrestore(&wl->irq_lock, flags); 2905 out_unlock_mutex: 2906 mutex_unlock(&wl->mutex); 2907 } 2908 2909 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw, 2910 unsigned int changed, 2911 unsigned int *fflags,u64 multicast) 2912 { 2913 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 2914 struct b43legacy_wldev *dev = wl->current_dev; 2915 unsigned long flags; 2916 2917 if (!dev) { 2918 *fflags = 0; 2919 return; 2920 } 2921 2922 spin_lock_irqsave(&wl->irq_lock, flags); 2923 *fflags &= FIF_ALLMULTI | 2924 FIF_FCSFAIL | 2925 FIF_PLCPFAIL | 2926 FIF_CONTROL | 2927 FIF_OTHER_BSS | 2928 FIF_BCN_PRBRESP_PROMISC; 2929 2930 changed &= FIF_ALLMULTI | 2931 FIF_FCSFAIL | 2932 FIF_PLCPFAIL | 2933 FIF_CONTROL | 2934 FIF_OTHER_BSS | 2935 FIF_BCN_PRBRESP_PROMISC; 2936 2937 wl->filter_flags = *fflags; 2938 2939 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) 2940 b43legacy_adjust_opmode(dev); 2941 spin_unlock_irqrestore(&wl->irq_lock, flags); 2942 } 2943 2944 /* Locking: wl->mutex */ 2945 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev) 2946 { 2947 struct b43legacy_wl *wl = dev->wl; 2948 unsigned long flags; 2949 int queue_num; 2950 2951 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) 2952 return; 2953 2954 /* Disable and sync interrupts. We must do this before than 2955 * setting the status to INITIALIZED, as the interrupt handler 2956 * won't care about IRQs then. */ 2957 spin_lock_irqsave(&wl->irq_lock, flags); 2958 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); 2959 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */ 2960 spin_unlock_irqrestore(&wl->irq_lock, flags); 2961 b43legacy_synchronize_irq(dev); 2962 2963 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); 2964 2965 mutex_unlock(&wl->mutex); 2966 /* Must unlock as it would otherwise deadlock. No races here. 2967 * Cancel the possibly running self-rearming periodic work. */ 2968 cancel_delayed_work_sync(&dev->periodic_work); 2969 cancel_work_sync(&wl->tx_work); 2970 mutex_lock(&wl->mutex); 2971 2972 /* Drain all TX queues. */ 2973 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) { 2974 while (skb_queue_len(&wl->tx_queue[queue_num])) 2975 dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num])); 2976 } 2977 2978 b43legacy_mac_suspend(dev); 2979 free_irq(dev->dev->irq, dev); 2980 b43legacydbg(wl, "Wireless interface stopped\n"); 2981 } 2982 2983 /* Locking: wl->mutex */ 2984 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev) 2985 { 2986 int err; 2987 2988 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED); 2989 2990 drain_txstatus_queue(dev); 2991 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler, 2992 IRQF_SHARED, KBUILD_MODNAME, dev); 2993 if (err) { 2994 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n", 2995 dev->dev->irq); 2996 goto out; 2997 } 2998 /* We are ready to run. */ 2999 ieee80211_wake_queues(dev->wl->hw); 3000 b43legacy_set_status(dev, B43legacy_STAT_STARTED); 3001 3002 /* Start data flow (TX/RX) */ 3003 b43legacy_mac_enable(dev); 3004 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); 3005 3006 /* Start maintenance work */ 3007 b43legacy_periodic_tasks_setup(dev); 3008 3009 b43legacydbg(dev->wl, "Wireless interface started\n"); 3010 out: 3011 return err; 3012 } 3013 3014 /* Get PHY and RADIO versioning numbers */ 3015 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev) 3016 { 3017 struct b43legacy_phy *phy = &dev->phy; 3018 u32 tmp; 3019 u8 analog_type; 3020 u8 phy_type; 3021 u8 phy_rev; 3022 u16 radio_manuf; 3023 u16 radio_ver; 3024 u16 radio_rev; 3025 int unsupported = 0; 3026 3027 /* Get PHY versioning */ 3028 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); 3029 analog_type = (tmp & B43legacy_PHYVER_ANALOG) 3030 >> B43legacy_PHYVER_ANALOG_SHIFT; 3031 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT; 3032 phy_rev = (tmp & B43legacy_PHYVER_VERSION); 3033 switch (phy_type) { 3034 case B43legacy_PHYTYPE_B: 3035 if (phy_rev != 2 && phy_rev != 4 3036 && phy_rev != 6 && phy_rev != 7) 3037 unsupported = 1; 3038 break; 3039 case B43legacy_PHYTYPE_G: 3040 if (phy_rev > 8) 3041 unsupported = 1; 3042 break; 3043 default: 3044 unsupported = 1; 3045 } 3046 if (unsupported) { 3047 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY " 3048 "(Analog %u, Type %u, Revision %u)\n", 3049 analog_type, phy_type, phy_rev); 3050 return -EOPNOTSUPP; 3051 } 3052 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n", 3053 analog_type, phy_type, phy_rev); 3054 3055 3056 /* Get RADIO versioning */ 3057 if (dev->dev->bus->chip_id == 0x4317) { 3058 if (dev->dev->bus->chip_rev == 0) 3059 tmp = 0x3205017F; 3060 else if (dev->dev->bus->chip_rev == 1) 3061 tmp = 0x4205017F; 3062 else 3063 tmp = 0x5205017F; 3064 } else { 3065 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, 3066 B43legacy_RADIOCTL_ID); 3067 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH); 3068 tmp <<= 16; 3069 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, 3070 B43legacy_RADIOCTL_ID); 3071 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW); 3072 } 3073 radio_manuf = (tmp & 0x00000FFF); 3074 radio_ver = (tmp & 0x0FFFF000) >> 12; 3075 radio_rev = (tmp & 0xF0000000) >> 28; 3076 switch (phy_type) { 3077 case B43legacy_PHYTYPE_B: 3078 if ((radio_ver & 0xFFF0) != 0x2050) 3079 unsupported = 1; 3080 break; 3081 case B43legacy_PHYTYPE_G: 3082 if (radio_ver != 0x2050) 3083 unsupported = 1; 3084 break; 3085 default: 3086 B43legacy_BUG_ON(1); 3087 } 3088 if (unsupported) { 3089 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO " 3090 "(Manuf 0x%X, Version 0x%X, Revision %u)\n", 3091 radio_manuf, radio_ver, radio_rev); 3092 return -EOPNOTSUPP; 3093 } 3094 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X," 3095 " Revision %u\n", radio_manuf, radio_ver, radio_rev); 3096 3097 3098 phy->radio_manuf = radio_manuf; 3099 phy->radio_ver = radio_ver; 3100 phy->radio_rev = radio_rev; 3101 3102 phy->analog = analog_type; 3103 phy->type = phy_type; 3104 phy->rev = phy_rev; 3105 3106 return 0; 3107 } 3108 3109 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev, 3110 struct b43legacy_phy *phy) 3111 { 3112 struct b43legacy_lopair *lo; 3113 int i; 3114 3115 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); 3116 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); 3117 3118 /* Assume the radio is enabled. If it's not enabled, the state will 3119 * immediately get fixed on the first periodic work run. */ 3120 dev->radio_hw_enable = true; 3121 3122 phy->savedpctlreg = 0xFFFF; 3123 phy->aci_enable = false; 3124 phy->aci_wlan_automatic = false; 3125 phy->aci_hw_rssi = false; 3126 3127 lo = phy->_lo_pairs; 3128 if (lo) 3129 memset(lo, 0, sizeof(struct b43legacy_lopair) * 3130 B43legacy_LO_COUNT); 3131 phy->max_lb_gain = 0; 3132 phy->trsw_rx_gain = 0; 3133 3134 /* Set default attenuation values. */ 3135 phy->bbatt = b43legacy_default_baseband_attenuation(dev); 3136 phy->rfatt = b43legacy_default_radio_attenuation(dev); 3137 phy->txctl1 = b43legacy_default_txctl1(dev); 3138 phy->txpwr_offset = 0; 3139 3140 /* NRSSI */ 3141 phy->nrssislope = 0; 3142 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) 3143 phy->nrssi[i] = -1000; 3144 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) 3145 phy->nrssi_lt[i] = i; 3146 3147 phy->lofcal = 0xFFFF; 3148 phy->initval = 0xFFFF; 3149 3150 phy->interfmode = B43legacy_INTERFMODE_NONE; 3151 phy->channel = 0xFF; 3152 } 3153 3154 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev) 3155 { 3156 /* Flags */ 3157 dev->dfq_valid = false; 3158 3159 /* Stats */ 3160 memset(&dev->stats, 0, sizeof(dev->stats)); 3161 3162 setup_struct_phy_for_init(dev, &dev->phy); 3163 3164 /* IRQ related flags */ 3165 dev->irq_reason = 0; 3166 memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); 3167 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE; 3168 3169 dev->mac_suspended = 1; 3170 3171 /* Noise calculation context */ 3172 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc)); 3173 } 3174 3175 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev, 3176 bool idle) { 3177 u16 pu_delay = 1050; 3178 3179 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle) 3180 pu_delay = 500; 3181 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8)) 3182 pu_delay = max(pu_delay, (u16)2400); 3183 3184 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3185 B43legacy_SHM_SH_SPUWKUP, pu_delay); 3186 } 3187 3188 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */ 3189 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev) 3190 { 3191 u16 pretbtt; 3192 3193 /* The time value is in microseconds. */ 3194 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) 3195 pretbtt = 2; 3196 else 3197 pretbtt = 250; 3198 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3199 B43legacy_SHM_SH_PRETBTT, pretbtt); 3200 b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt); 3201 } 3202 3203 /* Shutdown a wireless core */ 3204 /* Locking: wl->mutex */ 3205 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev) 3206 { 3207 struct b43legacy_phy *phy = &dev->phy; 3208 u32 macctl; 3209 3210 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED); 3211 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED) 3212 return; 3213 b43legacy_set_status(dev, B43legacy_STAT_UNINIT); 3214 3215 /* Stop the microcode PSM. */ 3216 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); 3217 macctl &= ~B43legacy_MACCTL_PSM_RUN; 3218 macctl |= B43legacy_MACCTL_PSM_JMP0; 3219 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); 3220 3221 b43legacy_leds_exit(dev); 3222 b43legacy_rng_exit(dev->wl); 3223 b43legacy_pio_free(dev); 3224 b43legacy_dma_free(dev); 3225 b43legacy_chip_exit(dev); 3226 b43legacy_radio_turn_off(dev, 1); 3227 b43legacy_switch_analog(dev, 0); 3228 if (phy->dyn_tssi_tbl) 3229 kfree(phy->tssi2dbm); 3230 kfree(phy->lo_control); 3231 phy->lo_control = NULL; 3232 if (dev->wl->current_beacon) { 3233 dev_kfree_skb_any(dev->wl->current_beacon); 3234 dev->wl->current_beacon = NULL; 3235 } 3236 3237 ssb_device_disable(dev->dev, 0); 3238 ssb_bus_may_powerdown(dev->dev->bus); 3239 } 3240 3241 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev) 3242 { 3243 struct b43legacy_phy *phy = &dev->phy; 3244 int i; 3245 3246 /* Set default attenuation values. */ 3247 phy->bbatt = b43legacy_default_baseband_attenuation(dev); 3248 phy->rfatt = b43legacy_default_radio_attenuation(dev); 3249 phy->txctl1 = b43legacy_default_txctl1(dev); 3250 phy->txctl2 = 0xFFFF; 3251 phy->txpwr_offset = 0; 3252 3253 /* NRSSI */ 3254 phy->nrssislope = 0; 3255 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++) 3256 phy->nrssi[i] = -1000; 3257 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++) 3258 phy->nrssi_lt[i] = i; 3259 3260 phy->lofcal = 0xFFFF; 3261 phy->initval = 0xFFFF; 3262 3263 phy->aci_enable = false; 3264 phy->aci_wlan_automatic = false; 3265 phy->aci_hw_rssi = false; 3266 3267 phy->antenna_diversity = 0xFFFF; 3268 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig)); 3269 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos)); 3270 3271 /* Flags */ 3272 phy->calibrated = 0; 3273 3274 if (phy->_lo_pairs) 3275 memset(phy->_lo_pairs, 0, 3276 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT); 3277 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain)); 3278 } 3279 3280 /* Initialize a wireless core */ 3281 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev) 3282 { 3283 struct b43legacy_wl *wl = dev->wl; 3284 struct ssb_bus *bus = dev->dev->bus; 3285 struct b43legacy_phy *phy = &dev->phy; 3286 struct ssb_sprom *sprom = &dev->dev->bus->sprom; 3287 int err; 3288 u32 hf; 3289 u32 tmp; 3290 3291 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); 3292 3293 err = ssb_bus_powerup(bus, 0); 3294 if (err) 3295 goto out; 3296 if (!ssb_device_is_enabled(dev->dev)) { 3297 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0; 3298 b43legacy_wireless_core_reset(dev, tmp); 3299 } 3300 3301 if ((phy->type == B43legacy_PHYTYPE_B) || 3302 (phy->type == B43legacy_PHYTYPE_G)) { 3303 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair) 3304 * B43legacy_LO_COUNT, 3305 GFP_KERNEL); 3306 if (!phy->_lo_pairs) 3307 return -ENOMEM; 3308 } 3309 setup_struct_wldev_for_init(dev); 3310 3311 err = b43legacy_phy_init_tssi2dbm_table(dev); 3312 if (err) 3313 goto err_kfree_lo_control; 3314 3315 /* Enable IRQ routing to this device. */ 3316 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev); 3317 3318 prepare_phy_data_for_init(dev); 3319 b43legacy_phy_calibrate(dev); 3320 err = b43legacy_chip_init(dev); 3321 if (err) 3322 goto err_kfree_tssitbl; 3323 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3324 B43legacy_SHM_SH_WLCOREREV, 3325 dev->dev->id.revision); 3326 hf = b43legacy_hf_read(dev); 3327 if (phy->type == B43legacy_PHYTYPE_G) { 3328 hf |= B43legacy_HF_SYMW; 3329 if (phy->rev == 1) 3330 hf |= B43legacy_HF_GDCW; 3331 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL) 3332 hf |= B43legacy_HF_OFDMPABOOST; 3333 } else if (phy->type == B43legacy_PHYTYPE_B) { 3334 hf |= B43legacy_HF_SYMW; 3335 if (phy->rev >= 2 && phy->radio_ver == 0x2050) 3336 hf &= ~B43legacy_HF_GDCW; 3337 } 3338 b43legacy_hf_write(dev, hf); 3339 3340 b43legacy_set_retry_limits(dev, 3341 B43legacy_DEFAULT_SHORT_RETRY_LIMIT, 3342 B43legacy_DEFAULT_LONG_RETRY_LIMIT); 3343 3344 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3345 0x0044, 3); 3346 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3347 0x0046, 2); 3348 3349 /* Disable sending probe responses from firmware. 3350 * Setting the MaxTime to one usec will always trigger 3351 * a timeout, so we never send any probe resp. 3352 * A timeout of zero is infinite. */ 3353 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 3354 B43legacy_SHM_SH_PRMAXTIME, 1); 3355 3356 b43legacy_rate_memory_init(dev); 3357 3358 /* Minimum Contention Window */ 3359 if (phy->type == B43legacy_PHYTYPE_B) 3360 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 3361 0x0003, 31); 3362 else 3363 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 3364 0x0003, 15); 3365 /* Maximum Contention Window */ 3366 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 3367 0x0004, 1023); 3368 3369 do { 3370 if (b43legacy_using_pio(dev)) 3371 err = b43legacy_pio_init(dev); 3372 else { 3373 err = b43legacy_dma_init(dev); 3374 if (!err) 3375 b43legacy_qos_init(dev); 3376 } 3377 } while (err == -EAGAIN); 3378 if (err) 3379 goto err_chip_exit; 3380 3381 b43legacy_set_synth_pu_delay(dev, 1); 3382 3383 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */ 3384 b43legacy_upload_card_macaddress(dev); 3385 b43legacy_security_init(dev); 3386 b43legacy_rng_init(wl); 3387 3388 ieee80211_wake_queues(dev->wl->hw); 3389 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); 3390 3391 b43legacy_leds_init(dev); 3392 out: 3393 return err; 3394 3395 err_chip_exit: 3396 b43legacy_chip_exit(dev); 3397 err_kfree_tssitbl: 3398 if (phy->dyn_tssi_tbl) 3399 kfree(phy->tssi2dbm); 3400 err_kfree_lo_control: 3401 kfree(phy->lo_control); 3402 phy->lo_control = NULL; 3403 ssb_bus_may_powerdown(bus); 3404 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); 3405 return err; 3406 } 3407 3408 static int b43legacy_op_add_interface(struct ieee80211_hw *hw, 3409 struct ieee80211_vif *vif) 3410 { 3411 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3412 struct b43legacy_wldev *dev; 3413 unsigned long flags; 3414 int err = -EOPNOTSUPP; 3415 3416 /* TODO: allow WDS/AP devices to coexist */ 3417 3418 if (vif->type != NL80211_IFTYPE_AP && 3419 vif->type != NL80211_IFTYPE_STATION && 3420 vif->type != NL80211_IFTYPE_WDS && 3421 vif->type != NL80211_IFTYPE_ADHOC) 3422 return -EOPNOTSUPP; 3423 3424 mutex_lock(&wl->mutex); 3425 if (wl->operating) 3426 goto out_mutex_unlock; 3427 3428 b43legacydbg(wl, "Adding Interface type %d\n", vif->type); 3429 3430 dev = wl->current_dev; 3431 wl->operating = true; 3432 wl->vif = vif; 3433 wl->if_type = vif->type; 3434 memcpy(wl->mac_addr, vif->addr, ETH_ALEN); 3435 3436 spin_lock_irqsave(&wl->irq_lock, flags); 3437 b43legacy_adjust_opmode(dev); 3438 b43legacy_set_pretbtt(dev); 3439 b43legacy_set_synth_pu_delay(dev, 0); 3440 b43legacy_upload_card_macaddress(dev); 3441 spin_unlock_irqrestore(&wl->irq_lock, flags); 3442 3443 err = 0; 3444 out_mutex_unlock: 3445 mutex_unlock(&wl->mutex); 3446 3447 return err; 3448 } 3449 3450 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw, 3451 struct ieee80211_vif *vif) 3452 { 3453 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3454 struct b43legacy_wldev *dev = wl->current_dev; 3455 unsigned long flags; 3456 3457 b43legacydbg(wl, "Removing Interface type %d\n", vif->type); 3458 3459 mutex_lock(&wl->mutex); 3460 3461 B43legacy_WARN_ON(!wl->operating); 3462 B43legacy_WARN_ON(wl->vif != vif); 3463 wl->vif = NULL; 3464 3465 wl->operating = false; 3466 3467 spin_lock_irqsave(&wl->irq_lock, flags); 3468 b43legacy_adjust_opmode(dev); 3469 eth_zero_addr(wl->mac_addr); 3470 b43legacy_upload_card_macaddress(dev); 3471 spin_unlock_irqrestore(&wl->irq_lock, flags); 3472 3473 mutex_unlock(&wl->mutex); 3474 } 3475 3476 static int b43legacy_op_start(struct ieee80211_hw *hw) 3477 { 3478 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3479 struct b43legacy_wldev *dev = wl->current_dev; 3480 int did_init = 0; 3481 int err = 0; 3482 3483 /* Kill all old instance specific information to make sure 3484 * the card won't use it in the short timeframe between start 3485 * and mac80211 reconfiguring it. */ 3486 eth_zero_addr(wl->bssid); 3487 eth_zero_addr(wl->mac_addr); 3488 wl->filter_flags = 0; 3489 wl->beacon0_uploaded = false; 3490 wl->beacon1_uploaded = false; 3491 wl->beacon_templates_virgin = true; 3492 wl->radio_enabled = true; 3493 3494 mutex_lock(&wl->mutex); 3495 3496 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) { 3497 err = b43legacy_wireless_core_init(dev); 3498 if (err) 3499 goto out_mutex_unlock; 3500 did_init = 1; 3501 } 3502 3503 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { 3504 err = b43legacy_wireless_core_start(dev); 3505 if (err) { 3506 if (did_init) 3507 b43legacy_wireless_core_exit(dev); 3508 goto out_mutex_unlock; 3509 } 3510 } 3511 3512 wiphy_rfkill_start_polling(hw->wiphy); 3513 3514 out_mutex_unlock: 3515 mutex_unlock(&wl->mutex); 3516 3517 return err; 3518 } 3519 3520 static void b43legacy_op_stop(struct ieee80211_hw *hw) 3521 { 3522 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3523 struct b43legacy_wldev *dev = wl->current_dev; 3524 3525 cancel_work_sync(&(wl->beacon_update_trigger)); 3526 3527 mutex_lock(&wl->mutex); 3528 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED) 3529 b43legacy_wireless_core_stop(dev); 3530 b43legacy_wireless_core_exit(dev); 3531 wl->radio_enabled = false; 3532 mutex_unlock(&wl->mutex); 3533 } 3534 3535 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw, 3536 struct ieee80211_sta *sta, bool set) 3537 { 3538 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3539 unsigned long flags; 3540 3541 spin_lock_irqsave(&wl->irq_lock, flags); 3542 b43legacy_update_templates(wl); 3543 spin_unlock_irqrestore(&wl->irq_lock, flags); 3544 3545 return 0; 3546 } 3547 3548 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx, 3549 struct survey_info *survey) 3550 { 3551 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3552 struct b43legacy_wldev *dev = wl->current_dev; 3553 struct ieee80211_conf *conf = &hw->conf; 3554 3555 if (idx != 0) 3556 return -ENOENT; 3557 3558 survey->channel = conf->chandef.chan; 3559 survey->filled = SURVEY_INFO_NOISE_DBM; 3560 survey->noise = dev->stats.link_noise; 3561 3562 return 0; 3563 } 3564 3565 static const struct ieee80211_ops b43legacy_hw_ops = { 3566 .tx = b43legacy_op_tx, 3567 .conf_tx = b43legacy_op_conf_tx, 3568 .add_interface = b43legacy_op_add_interface, 3569 .remove_interface = b43legacy_op_remove_interface, 3570 .config = b43legacy_op_dev_config, 3571 .bss_info_changed = b43legacy_op_bss_info_changed, 3572 .configure_filter = b43legacy_op_configure_filter, 3573 .get_stats = b43legacy_op_get_stats, 3574 .start = b43legacy_op_start, 3575 .stop = b43legacy_op_stop, 3576 .set_tim = b43legacy_op_beacon_set_tim, 3577 .get_survey = b43legacy_op_get_survey, 3578 .rfkill_poll = b43legacy_rfkill_poll, 3579 }; 3580 3581 /* Hard-reset the chip. Do not call this directly. 3582 * Use b43legacy_controller_restart() 3583 */ 3584 static void b43legacy_chip_reset(struct work_struct *work) 3585 { 3586 struct b43legacy_wldev *dev = 3587 container_of(work, struct b43legacy_wldev, restart_work); 3588 struct b43legacy_wl *wl = dev->wl; 3589 int err = 0; 3590 int prev_status; 3591 3592 mutex_lock(&wl->mutex); 3593 3594 prev_status = b43legacy_status(dev); 3595 /* Bring the device down... */ 3596 if (prev_status >= B43legacy_STAT_STARTED) 3597 b43legacy_wireless_core_stop(dev); 3598 if (prev_status >= B43legacy_STAT_INITIALIZED) 3599 b43legacy_wireless_core_exit(dev); 3600 3601 /* ...and up again. */ 3602 if (prev_status >= B43legacy_STAT_INITIALIZED) { 3603 err = b43legacy_wireless_core_init(dev); 3604 if (err) 3605 goto out; 3606 } 3607 if (prev_status >= B43legacy_STAT_STARTED) { 3608 err = b43legacy_wireless_core_start(dev); 3609 if (err) { 3610 b43legacy_wireless_core_exit(dev); 3611 goto out; 3612 } 3613 } 3614 out: 3615 if (err) 3616 wl->current_dev = NULL; /* Failed to init the dev. */ 3617 mutex_unlock(&wl->mutex); 3618 if (err) 3619 b43legacyerr(wl, "Controller restart FAILED\n"); 3620 else 3621 b43legacyinfo(wl, "Controller restarted\n"); 3622 } 3623 3624 static int b43legacy_setup_modes(struct b43legacy_wldev *dev, 3625 int have_bphy, 3626 int have_gphy) 3627 { 3628 struct ieee80211_hw *hw = dev->wl->hw; 3629 struct b43legacy_phy *phy = &dev->phy; 3630 3631 phy->possible_phymodes = 0; 3632 if (have_bphy) { 3633 hw->wiphy->bands[NL80211_BAND_2GHZ] = 3634 &b43legacy_band_2GHz_BPHY; 3635 phy->possible_phymodes |= B43legacy_PHYMODE_B; 3636 } 3637 3638 if (have_gphy) { 3639 hw->wiphy->bands[NL80211_BAND_2GHZ] = 3640 &b43legacy_band_2GHz_GPHY; 3641 phy->possible_phymodes |= B43legacy_PHYMODE_G; 3642 } 3643 3644 return 0; 3645 } 3646 3647 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev) 3648 { 3649 /* We release firmware that late to not be required to re-request 3650 * is all the time when we reinit the core. */ 3651 b43legacy_release_firmware(dev); 3652 } 3653 3654 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev) 3655 { 3656 struct b43legacy_wl *wl = dev->wl; 3657 struct ssb_bus *bus = dev->dev->bus; 3658 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL; 3659 int err; 3660 int have_bphy = 0; 3661 int have_gphy = 0; 3662 u32 tmp; 3663 3664 /* Do NOT do any device initialization here. 3665 * Do it in wireless_core_init() instead. 3666 * This function is for gathering basic information about the HW, only. 3667 * Also some structs may be set up here. But most likely you want to 3668 * have that in core_init(), too. 3669 */ 3670 3671 err = ssb_bus_powerup(bus, 0); 3672 if (err) { 3673 b43legacyerr(wl, "Bus powerup failed\n"); 3674 goto out; 3675 } 3676 /* Get the PHY type. */ 3677 if (dev->dev->id.revision >= 5) { 3678 u32 tmshigh; 3679 3680 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH); 3681 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY); 3682 if (!have_gphy) 3683 have_bphy = 1; 3684 } else if (dev->dev->id.revision == 4) 3685 have_gphy = 1; 3686 else 3687 have_bphy = 1; 3688 3689 dev->phy.gmode = (have_gphy || have_bphy); 3690 dev->phy.radio_on = true; 3691 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; 3692 b43legacy_wireless_core_reset(dev, tmp); 3693 3694 err = b43legacy_phy_versioning(dev); 3695 if (err) 3696 goto err_powerdown; 3697 /* Check if this device supports multiband. */ 3698 if (!pdev || 3699 (pdev->device != 0x4312 && 3700 pdev->device != 0x4319 && 3701 pdev->device != 0x4324)) { 3702 /* No multiband support. */ 3703 have_bphy = 0; 3704 have_gphy = 0; 3705 switch (dev->phy.type) { 3706 case B43legacy_PHYTYPE_B: 3707 have_bphy = 1; 3708 break; 3709 case B43legacy_PHYTYPE_G: 3710 have_gphy = 1; 3711 break; 3712 default: 3713 B43legacy_BUG_ON(1); 3714 } 3715 } 3716 dev->phy.gmode = (have_gphy || have_bphy); 3717 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; 3718 b43legacy_wireless_core_reset(dev, tmp); 3719 3720 err = b43legacy_validate_chipaccess(dev); 3721 if (err) 3722 goto err_powerdown; 3723 err = b43legacy_setup_modes(dev, have_bphy, have_gphy); 3724 if (err) 3725 goto err_powerdown; 3726 3727 /* Now set some default "current_dev" */ 3728 if (!wl->current_dev) 3729 wl->current_dev = dev; 3730 INIT_WORK(&dev->restart_work, b43legacy_chip_reset); 3731 3732 b43legacy_radio_turn_off(dev, 1); 3733 b43legacy_switch_analog(dev, 0); 3734 ssb_device_disable(dev->dev, 0); 3735 ssb_bus_may_powerdown(bus); 3736 3737 out: 3738 return err; 3739 3740 err_powerdown: 3741 ssb_bus_may_powerdown(bus); 3742 return err; 3743 } 3744 3745 static void b43legacy_one_core_detach(struct ssb_device *dev) 3746 { 3747 struct b43legacy_wldev *wldev; 3748 struct b43legacy_wl *wl; 3749 3750 /* Do not cancel ieee80211-workqueue based work here. 3751 * See comment in b43legacy_remove(). */ 3752 3753 wldev = ssb_get_drvdata(dev); 3754 wl = wldev->wl; 3755 b43legacy_debugfs_remove_device(wldev); 3756 b43legacy_wireless_core_detach(wldev); 3757 list_del(&wldev->list); 3758 wl->nr_devs--; 3759 ssb_set_drvdata(dev, NULL); 3760 kfree(wldev); 3761 } 3762 3763 static int b43legacy_one_core_attach(struct ssb_device *dev, 3764 struct b43legacy_wl *wl) 3765 { 3766 struct b43legacy_wldev *wldev; 3767 int err = -ENOMEM; 3768 3769 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL); 3770 if (!wldev) 3771 goto out; 3772 3773 wldev->dev = dev; 3774 wldev->wl = wl; 3775 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT); 3776 wldev->bad_frames_preempt = modparam_bad_frames_preempt; 3777 tasklet_init(&wldev->isr_tasklet, 3778 (void (*)(unsigned long))b43legacy_interrupt_tasklet, 3779 (unsigned long)wldev); 3780 if (modparam_pio) 3781 wldev->__using_pio = true; 3782 INIT_LIST_HEAD(&wldev->list); 3783 3784 err = b43legacy_wireless_core_attach(wldev); 3785 if (err) 3786 goto err_kfree_wldev; 3787 3788 list_add(&wldev->list, &wl->devlist); 3789 wl->nr_devs++; 3790 ssb_set_drvdata(dev, wldev); 3791 b43legacy_debugfs_add_device(wldev); 3792 out: 3793 return err; 3794 3795 err_kfree_wldev: 3796 kfree(wldev); 3797 return err; 3798 } 3799 3800 static void b43legacy_sprom_fixup(struct ssb_bus *bus) 3801 { 3802 /* boardflags workarounds */ 3803 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE && 3804 bus->boardinfo.type == 0x4E && 3805 bus->sprom.board_rev > 0x40) 3806 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL; 3807 } 3808 3809 static void b43legacy_wireless_exit(struct ssb_device *dev, 3810 struct b43legacy_wl *wl) 3811 { 3812 struct ieee80211_hw *hw = wl->hw; 3813 3814 ssb_set_devtypedata(dev, NULL); 3815 ieee80211_free_hw(hw); 3816 } 3817 3818 static int b43legacy_wireless_init(struct ssb_device *dev) 3819 { 3820 struct ssb_sprom *sprom = &dev->bus->sprom; 3821 struct ieee80211_hw *hw; 3822 struct b43legacy_wl *wl; 3823 int err = -ENOMEM; 3824 int queue_num; 3825 3826 b43legacy_sprom_fixup(dev->bus); 3827 3828 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops); 3829 if (!hw) { 3830 b43legacyerr(NULL, "Could not allocate ieee80211 device\n"); 3831 goto out; 3832 } 3833 3834 /* fill hw info */ 3835 ieee80211_hw_set(hw, RX_INCLUDES_FCS); 3836 ieee80211_hw_set(hw, SIGNAL_DBM); 3837 3838 hw->wiphy->interface_modes = 3839 BIT(NL80211_IFTYPE_AP) | 3840 BIT(NL80211_IFTYPE_STATION) | 3841 #ifdef CONFIG_WIRELESS_WDS 3842 BIT(NL80211_IFTYPE_WDS) | 3843 #endif 3844 BIT(NL80211_IFTYPE_ADHOC); 3845 hw->queues = 1; /* FIXME: hardware has more queues */ 3846 hw->max_rates = 2; 3847 SET_IEEE80211_DEV(hw, dev->dev); 3848 if (is_valid_ether_addr(sprom->et1mac)) 3849 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac); 3850 else 3851 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac); 3852 3853 /* Get and initialize struct b43legacy_wl */ 3854 wl = hw_to_b43legacy_wl(hw); 3855 memset(wl, 0, sizeof(*wl)); 3856 wl->hw = hw; 3857 spin_lock_init(&wl->irq_lock); 3858 spin_lock_init(&wl->leds_lock); 3859 mutex_init(&wl->mutex); 3860 INIT_LIST_HEAD(&wl->devlist); 3861 INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work); 3862 INIT_WORK(&wl->tx_work, b43legacy_tx_work); 3863 3864 /* Initialize queues and flags. */ 3865 for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) { 3866 skb_queue_head_init(&wl->tx_queue[queue_num]); 3867 wl->tx_queue_stopped[queue_num] = 0; 3868 } 3869 3870 ssb_set_devtypedata(dev, wl); 3871 b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n", 3872 dev->bus->chip_id, dev->id.revision); 3873 err = 0; 3874 out: 3875 return err; 3876 } 3877 3878 static int b43legacy_probe(struct ssb_device *dev, 3879 const struct ssb_device_id *id) 3880 { 3881 struct b43legacy_wl *wl; 3882 int err; 3883 int first = 0; 3884 3885 wl = ssb_get_devtypedata(dev); 3886 if (!wl) { 3887 /* Probing the first core - setup common struct b43legacy_wl */ 3888 first = 1; 3889 err = b43legacy_wireless_init(dev); 3890 if (err) 3891 goto out; 3892 wl = ssb_get_devtypedata(dev); 3893 B43legacy_WARN_ON(!wl); 3894 } 3895 err = b43legacy_one_core_attach(dev, wl); 3896 if (err) 3897 goto err_wireless_exit; 3898 3899 /* setup and start work to load firmware */ 3900 INIT_WORK(&wl->firmware_load, b43legacy_request_firmware); 3901 schedule_work(&wl->firmware_load); 3902 3903 out: 3904 return err; 3905 3906 err_wireless_exit: 3907 if (first) 3908 b43legacy_wireless_exit(dev, wl); 3909 return err; 3910 } 3911 3912 static void b43legacy_remove(struct ssb_device *dev) 3913 { 3914 struct b43legacy_wl *wl = ssb_get_devtypedata(dev); 3915 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); 3916 3917 /* We must cancel any work here before unregistering from ieee80211, 3918 * as the ieee80211 unreg will destroy the workqueue. */ 3919 cancel_work_sync(&wldev->restart_work); 3920 cancel_work_sync(&wl->firmware_load); 3921 complete(&wldev->fw_load_complete); 3922 3923 B43legacy_WARN_ON(!wl); 3924 if (!wldev->fw.ucode) 3925 return; /* NULL if fw never loaded */ 3926 if (wl->current_dev == wldev) 3927 ieee80211_unregister_hw(wl->hw); 3928 3929 b43legacy_one_core_detach(dev); 3930 3931 if (list_empty(&wl->devlist)) 3932 /* Last core on the chip unregistered. 3933 * We can destroy common struct b43legacy_wl. 3934 */ 3935 b43legacy_wireless_exit(dev, wl); 3936 } 3937 3938 /* Perform a hardware reset. This can be called from any context. */ 3939 void b43legacy_controller_restart(struct b43legacy_wldev *dev, 3940 const char *reason) 3941 { 3942 /* Must avoid requeueing, if we are in shutdown. */ 3943 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) 3944 return; 3945 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason); 3946 ieee80211_queue_work(dev->wl->hw, &dev->restart_work); 3947 } 3948 3949 #ifdef CONFIG_PM 3950 3951 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state) 3952 { 3953 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); 3954 struct b43legacy_wl *wl = wldev->wl; 3955 3956 b43legacydbg(wl, "Suspending...\n"); 3957 3958 mutex_lock(&wl->mutex); 3959 wldev->suspend_init_status = b43legacy_status(wldev); 3960 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) 3961 b43legacy_wireless_core_stop(wldev); 3962 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) 3963 b43legacy_wireless_core_exit(wldev); 3964 mutex_unlock(&wl->mutex); 3965 3966 b43legacydbg(wl, "Device suspended.\n"); 3967 3968 return 0; 3969 } 3970 3971 static int b43legacy_resume(struct ssb_device *dev) 3972 { 3973 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev); 3974 struct b43legacy_wl *wl = wldev->wl; 3975 int err = 0; 3976 3977 b43legacydbg(wl, "Resuming...\n"); 3978 3979 mutex_lock(&wl->mutex); 3980 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) { 3981 err = b43legacy_wireless_core_init(wldev); 3982 if (err) { 3983 b43legacyerr(wl, "Resume failed at core init\n"); 3984 goto out; 3985 } 3986 } 3987 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) { 3988 err = b43legacy_wireless_core_start(wldev); 3989 if (err) { 3990 b43legacy_wireless_core_exit(wldev); 3991 b43legacyerr(wl, "Resume failed at core start\n"); 3992 goto out; 3993 } 3994 } 3995 3996 b43legacydbg(wl, "Device resumed.\n"); 3997 out: 3998 mutex_unlock(&wl->mutex); 3999 return err; 4000 } 4001 4002 #else /* CONFIG_PM */ 4003 # define b43legacy_suspend NULL 4004 # define b43legacy_resume NULL 4005 #endif /* CONFIG_PM */ 4006 4007 static struct ssb_driver b43legacy_ssb_driver = { 4008 .name = KBUILD_MODNAME, 4009 .id_table = b43legacy_ssb_tbl, 4010 .probe = b43legacy_probe, 4011 .remove = b43legacy_remove, 4012 .suspend = b43legacy_suspend, 4013 .resume = b43legacy_resume, 4014 }; 4015 4016 static void b43legacy_print_driverinfo(void) 4017 { 4018 const char *feat_pci = "", *feat_leds = "", 4019 *feat_pio = "", *feat_dma = ""; 4020 4021 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT 4022 feat_pci = "P"; 4023 #endif 4024 #ifdef CONFIG_B43LEGACY_LEDS 4025 feat_leds = "L"; 4026 #endif 4027 #ifdef CONFIG_B43LEGACY_PIO 4028 feat_pio = "I"; 4029 #endif 4030 #ifdef CONFIG_B43LEGACY_DMA 4031 feat_dma = "D"; 4032 #endif 4033 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded " 4034 "[ Features: %s%s%s%s ]\n", 4035 feat_pci, feat_leds, feat_pio, feat_dma); 4036 } 4037 4038 static int __init b43legacy_init(void) 4039 { 4040 int err; 4041 4042 b43legacy_debugfs_init(); 4043 4044 err = ssb_driver_register(&b43legacy_ssb_driver); 4045 if (err) 4046 goto err_dfs_exit; 4047 4048 b43legacy_print_driverinfo(); 4049 4050 return err; 4051 4052 err_dfs_exit: 4053 b43legacy_debugfs_exit(); 4054 return err; 4055 } 4056 4057 static void __exit b43legacy_exit(void) 4058 { 4059 ssb_driver_unregister(&b43legacy_ssb_driver); 4060 b43legacy_debugfs_exit(); 4061 } 4062 4063 module_init(b43legacy_init) 4064 module_exit(b43legacy_exit) 4065