xref: /linux/drivers/net/wireless/ath/ath10k/core.h (revision cbdb1f163af2bb90d01be1f0263df1d8d5c9d9d3)
1 /* SPDX-License-Identifier: ISC */
2 /*
3  * Copyright (c) 2005-2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6  */
7 
8 #ifndef _CORE_H_
9 #define _CORE_H_
10 
11 #include <linux/completion.h>
12 #include <linux/if_ether.h>
13 #include <linux/types.h>
14 #include <linux/pci.h>
15 #include <linux/uuid.h>
16 #include <linux/time.h>
17 
18 #include "htt.h"
19 #include "htc.h"
20 #include "hw.h"
21 #include "targaddrs.h"
22 #include "wmi.h"
23 #include "../ath.h"
24 #include "../regd.h"
25 #include "../dfs_pattern_detector.h"
26 #include "spectral.h"
27 #include "thermal.h"
28 #include "wow.h"
29 #include "swap.h"
30 
31 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
32 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
33 #define WO(_f)      ((_f##_OFFSET) >> 2)
34 
35 #define ATH10K_SCAN_ID 0
36 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */
37 #define WMI_READY_TIMEOUT (5 * HZ)
38 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
39 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
40 #define ATH10K_NUM_CHANS 41
41 #define ATH10K_MAX_5G_CHAN 173
42 
43 /* Antenna noise floor */
44 #define ATH10K_DEFAULT_NOISE_FLOOR -95
45 
46 #define ATH10K_INVALID_RSSI 128
47 
48 #define ATH10K_MAX_NUM_MGMT_PENDING 128
49 
50 /* number of failed packets (20 packets with 16 sw reties each) */
51 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
52 
53 /*
54  * Use insanely high numbers to make sure that the firmware implementation
55  * won't start, we have the same functionality already in hostapd. Unit
56  * is seconds.
57  */
58 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
59 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
60 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
61 
62 /* SMBIOS type containing Board Data File Name Extension */
63 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
64 
65 /* SMBIOS type structure length (excluding strings-set) */
66 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
67 
68 /* Offset pointing to Board Data File Name Extension */
69 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
70 
71 /* Board Data File Name Extension string length.
72  * String format: BDF_<Customer ID>_<Extension>\0
73  */
74 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
75 
76 /* The magic used by QCA spec */
77 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
78 
79 /* Default Airtime weight multiplier (Tuned for multiclient performance) */
80 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER  4
81 
82 #define ATH10K_MAX_RETRY_COUNT 30
83 
84 #define ATH10K_ITER_NORMAL_FLAGS (IEEE80211_IFACE_ITER_NORMAL | \
85 				  IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
86 #define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\
87 				  IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
88 
89 struct ath10k;
90 
91 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
92 {
93 	switch (bus) {
94 	case ATH10K_BUS_PCI:
95 		return "pci";
96 	case ATH10K_BUS_AHB:
97 		return "ahb";
98 	case ATH10K_BUS_SDIO:
99 		return "sdio";
100 	case ATH10K_BUS_USB:
101 		return "usb";
102 	case ATH10K_BUS_SNOC:
103 		return "snoc";
104 	}
105 
106 	return "unknown";
107 }
108 
109 enum ath10k_skb_flags {
110 	ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
111 	ATH10K_SKB_F_DTIM_ZERO = BIT(1),
112 	ATH10K_SKB_F_DELIVER_CAB = BIT(2),
113 	ATH10K_SKB_F_MGMT = BIT(3),
114 	ATH10K_SKB_F_QOS = BIT(4),
115 	ATH10K_SKB_F_RAW_TX = BIT(5),
116 	ATH10K_SKB_F_NOACK_TID = BIT(6),
117 };
118 
119 struct ath10k_skb_cb {
120 	dma_addr_t paddr;
121 	u8 flags;
122 	u8 eid;
123 	u16 msdu_id;
124 	u16 airtime_est;
125 	struct ieee80211_vif *vif;
126 	struct ieee80211_txq *txq;
127 	u32 ucast_cipher;
128 } __packed;
129 
130 struct ath10k_skb_rxcb {
131 	dma_addr_t paddr;
132 	struct hlist_node hlist;
133 	u8 eid;
134 };
135 
136 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
137 {
138 	BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
139 		     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
140 	return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
141 }
142 
143 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
144 {
145 	BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
146 	return (struct ath10k_skb_rxcb *)skb->cb;
147 }
148 
149 #define ATH10K_RXCB_SKB(rxcb) \
150 		container_of((void *)rxcb, struct sk_buff, cb)
151 
152 static inline u32 host_interest_item_address(u32 item_offset)
153 {
154 	return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
155 }
156 
157 enum ath10k_phy_mode {
158 	ATH10K_PHY_MODE_LEGACY = 0,
159 	ATH10K_PHY_MODE_HT = 1,
160 	ATH10K_PHY_MODE_VHT = 2,
161 };
162 
163 /* Data rate 100KBPS based on IE Index */
164 struct ath10k_index_ht_data_rate_type {
165 	u8   beacon_rate_index;
166 	u16  supported_rate[4];
167 };
168 
169 /* Data rate 100KBPS based on IE Index */
170 struct ath10k_index_vht_data_rate_type {
171 	u8   beacon_rate_index;
172 	u16  supported_VHT80_rate[2];
173 	u16  supported_VHT40_rate[2];
174 	u16  supported_VHT20_rate[2];
175 };
176 
177 struct ath10k_bmi {
178 	bool done_sent;
179 };
180 
181 struct ath10k_mem_chunk {
182 	void *vaddr;
183 	dma_addr_t paddr;
184 	u32 len;
185 	u32 req_id;
186 };
187 
188 struct ath10k_wmi {
189 	enum ath10k_htc_ep_id eid;
190 	struct completion service_ready;
191 	struct completion unified_ready;
192 	struct completion barrier;
193 	struct completion radar_confirm;
194 	wait_queue_head_t tx_credits_wq;
195 	DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
196 	struct wmi_cmd_map *cmd;
197 	struct wmi_vdev_param_map *vdev_param;
198 	struct wmi_pdev_param_map *pdev_param;
199 	struct wmi_peer_param_map *peer_param;
200 	const struct wmi_ops *ops;
201 	const struct wmi_peer_flags_map *peer_flags;
202 
203 	u32 mgmt_max_num_pending_tx;
204 
205 	/* Protected by data_lock */
206 	struct idr mgmt_pending_tx;
207 
208 	u32 num_mem_chunks;
209 	u32 rx_decap_mode;
210 	struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
211 };
212 
213 struct ath10k_fw_stats_peer {
214 	struct list_head list;
215 
216 	u8 peer_macaddr[ETH_ALEN];
217 	u32 peer_rssi;
218 	u32 peer_tx_rate;
219 	u32 peer_rx_rate; /* 10x only */
220 	u64 rx_duration;
221 };
222 
223 struct ath10k_fw_extd_stats_peer {
224 	struct list_head list;
225 
226 	u8 peer_macaddr[ETH_ALEN];
227 	u64 rx_duration;
228 };
229 
230 struct ath10k_fw_stats_vdev {
231 	struct list_head list;
232 
233 	u32 vdev_id;
234 	u32 beacon_snr;
235 	u32 data_snr;
236 	u32 num_tx_frames[4];
237 	u32 num_rx_frames;
238 	u32 num_tx_frames_retries[4];
239 	u32 num_tx_frames_failures[4];
240 	u32 num_rts_fail;
241 	u32 num_rts_success;
242 	u32 num_rx_err;
243 	u32 num_rx_discard;
244 	u32 num_tx_not_acked;
245 	u32 tx_rate_history[10];
246 	u32 beacon_rssi_history[10];
247 };
248 
249 struct ath10k_fw_stats_vdev_extd {
250 	struct list_head list;
251 
252 	u32 vdev_id;
253 	u32 ppdu_aggr_cnt;
254 	u32 ppdu_noack;
255 	u32 mpdu_queued;
256 	u32 ppdu_nonaggr_cnt;
257 	u32 mpdu_sw_requeued;
258 	u32 mpdu_suc_retry;
259 	u32 mpdu_suc_multitry;
260 	u32 mpdu_fail_retry;
261 	u32 tx_ftm_suc;
262 	u32 tx_ftm_suc_retry;
263 	u32 tx_ftm_fail;
264 	u32 rx_ftmr_cnt;
265 	u32 rx_ftmr_dup_cnt;
266 	u32 rx_iftmr_cnt;
267 	u32 rx_iftmr_dup_cnt;
268 };
269 
270 struct ath10k_fw_stats_pdev {
271 	struct list_head list;
272 
273 	/* PDEV stats */
274 	s32 ch_noise_floor;
275 	u32 tx_frame_count; /* Cycles spent transmitting frames */
276 	u32 rx_frame_count; /* Cycles spent receiving frames */
277 	u32 rx_clear_count; /* Total channel busy time, evidently */
278 	u32 cycle_count; /* Total on-channel time */
279 	u32 phy_err_count;
280 	u32 chan_tx_power;
281 	u32 ack_rx_bad;
282 	u32 rts_bad;
283 	u32 rts_good;
284 	u32 fcs_bad;
285 	u32 no_beacons;
286 	u32 mib_int_count;
287 
288 	/* PDEV TX stats */
289 	s32 comp_queued;
290 	s32 comp_delivered;
291 	s32 msdu_enqued;
292 	s32 mpdu_enqued;
293 	s32 wmm_drop;
294 	s32 local_enqued;
295 	s32 local_freed;
296 	s32 hw_queued;
297 	s32 hw_reaped;
298 	s32 underrun;
299 	u32 hw_paused;
300 	s32 tx_abort;
301 	s32 mpdus_requeued;
302 	u32 tx_ko;
303 	u32 data_rc;
304 	u32 self_triggers;
305 	u32 sw_retry_failure;
306 	u32 illgl_rate_phy_err;
307 	u32 pdev_cont_xretry;
308 	u32 pdev_tx_timeout;
309 	u32 pdev_resets;
310 	u32 phy_underrun;
311 	u32 txop_ovf;
312 	u32 seq_posted;
313 	u32 seq_failed_queueing;
314 	u32 seq_completed;
315 	u32 seq_restarted;
316 	u32 mu_seq_posted;
317 	u32 mpdus_sw_flush;
318 	u32 mpdus_hw_filter;
319 	u32 mpdus_truncated;
320 	u32 mpdus_ack_failed;
321 	u32 mpdus_expired;
322 
323 	/* PDEV RX stats */
324 	s32 mid_ppdu_route_change;
325 	s32 status_rcvd;
326 	s32 r0_frags;
327 	s32 r1_frags;
328 	s32 r2_frags;
329 	s32 r3_frags;
330 	s32 htt_msdus;
331 	s32 htt_mpdus;
332 	s32 loc_msdus;
333 	s32 loc_mpdus;
334 	s32 oversize_amsdu;
335 	s32 phy_errs;
336 	s32 phy_err_drop;
337 	s32 mpdu_errs;
338 	s32 rx_ovfl_errs;
339 };
340 
341 struct ath10k_fw_stats {
342 	bool extended;
343 	struct list_head pdevs;
344 	struct list_head vdevs;
345 	struct list_head peers;
346 	struct list_head peers_extd;
347 };
348 
349 #define ATH10K_TPC_TABLE_TYPE_FLAG	1
350 #define ATH10K_TPC_PREAM_TABLE_END	0xFFFF
351 
352 struct ath10k_tpc_table {
353 	u32 pream_idx[WMI_TPC_RATE_MAX];
354 	u8 rate_code[WMI_TPC_RATE_MAX];
355 	char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
356 };
357 
358 struct ath10k_tpc_stats {
359 	u32 reg_domain;
360 	u32 chan_freq;
361 	u32 phy_mode;
362 	u32 twice_antenna_reduction;
363 	u32 twice_max_rd_power;
364 	s32 twice_antenna_gain;
365 	u32 power_limit;
366 	u32 num_tx_chain;
367 	u32 ctl;
368 	u32 rate_max;
369 	u8 flag[WMI_TPC_FLAG];
370 	struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
371 };
372 
373 struct ath10k_tpc_table_final {
374 	u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
375 	u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
376 	char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
377 };
378 
379 struct ath10k_tpc_stats_final {
380 	u32 reg_domain;
381 	u32 chan_freq;
382 	u32 phy_mode;
383 	u32 twice_antenna_reduction;
384 	u32 twice_max_rd_power;
385 	s32 twice_antenna_gain;
386 	u32 power_limit;
387 	u32 num_tx_chain;
388 	u32 ctl;
389 	u32 rate_max;
390 	u8 flag[WMI_TPC_FLAG];
391 	struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
392 };
393 
394 struct ath10k_dfs_stats {
395 	u32 phy_errors;
396 	u32 pulses_total;
397 	u32 pulses_detected;
398 	u32 pulses_discarded;
399 	u32 radar_detected;
400 };
401 
402 enum ath10k_radar_confirmation_state {
403 	ATH10K_RADAR_CONFIRMATION_IDLE = 0,
404 	ATH10K_RADAR_CONFIRMATION_INPROGRESS,
405 	ATH10K_RADAR_CONFIRMATION_STOPPED,
406 };
407 
408 struct ath10k_radar_found_info {
409 	u32 pri_min;
410 	u32 pri_max;
411 	u32 width_min;
412 	u32 width_max;
413 	u32 sidx_min;
414 	u32 sidx_max;
415 };
416 
417 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
418 
419 struct ath10k_peer {
420 	struct list_head list;
421 	struct ieee80211_vif *vif;
422 	struct ieee80211_sta *sta;
423 
424 	bool removed;
425 	int vdev_id;
426 	u8 addr[ETH_ALEN];
427 	DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
428 
429 	/* protected by ar->data_lock */
430 	struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
431 	union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
432 	bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS];
433 	union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
434 	u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS];
435 	struct {
436 		enum htt_security_types sec_type;
437 		int pn_len;
438 	} rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX];
439 };
440 
441 struct ath10k_txq {
442 	struct list_head list;
443 	unsigned long num_fw_queued;
444 	unsigned long num_push_allowed;
445 };
446 
447 enum ath10k_pkt_rx_err {
448 	ATH10K_PKT_RX_ERR_FCS,
449 	ATH10K_PKT_RX_ERR_TKIP,
450 	ATH10K_PKT_RX_ERR_CRYPT,
451 	ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
452 	ATH10K_PKT_RX_ERR_MAX,
453 };
454 
455 enum ath10k_ampdu_subfrm_num {
456 	ATH10K_AMPDU_SUBFRM_NUM_10,
457 	ATH10K_AMPDU_SUBFRM_NUM_20,
458 	ATH10K_AMPDU_SUBFRM_NUM_30,
459 	ATH10K_AMPDU_SUBFRM_NUM_40,
460 	ATH10K_AMPDU_SUBFRM_NUM_50,
461 	ATH10K_AMPDU_SUBFRM_NUM_60,
462 	ATH10K_AMPDU_SUBFRM_NUM_MORE,
463 	ATH10K_AMPDU_SUBFRM_NUM_MAX,
464 };
465 
466 enum ath10k_amsdu_subfrm_num {
467 	ATH10K_AMSDU_SUBFRM_NUM_1,
468 	ATH10K_AMSDU_SUBFRM_NUM_2,
469 	ATH10K_AMSDU_SUBFRM_NUM_3,
470 	ATH10K_AMSDU_SUBFRM_NUM_4,
471 	ATH10K_AMSDU_SUBFRM_NUM_MORE,
472 	ATH10K_AMSDU_SUBFRM_NUM_MAX,
473 };
474 
475 struct ath10k_sta_tid_stats {
476 	unsigned long rx_pkt_from_fw;
477 	unsigned long rx_pkt_unchained;
478 	unsigned long rx_pkt_drop_chained;
479 	unsigned long rx_pkt_drop_filter;
480 	unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
481 	unsigned long rx_pkt_queued_for_mac;
482 	unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
483 	unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
484 };
485 
486 enum ath10k_counter_type {
487 	ATH10K_COUNTER_TYPE_BYTES,
488 	ATH10K_COUNTER_TYPE_PKTS,
489 	ATH10K_COUNTER_TYPE_MAX,
490 };
491 
492 enum ath10k_stats_type {
493 	ATH10K_STATS_TYPE_SUCC,
494 	ATH10K_STATS_TYPE_FAIL,
495 	ATH10K_STATS_TYPE_RETRY,
496 	ATH10K_STATS_TYPE_AMPDU,
497 	ATH10K_STATS_TYPE_MAX,
498 };
499 
500 struct ath10k_htt_data_stats {
501 	u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM];
502 	u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM];
503 	u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM];
504 	u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM];
505 	u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM];
506 	u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM];
507 	u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM];
508 };
509 
510 struct ath10k_htt_tx_stats {
511 	struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX];
512 	u64 tx_duration;
513 	u64 ba_fails;
514 	u64 ack_fails;
515 };
516 
517 #define ATH10K_TID_MAX	8
518 
519 struct ath10k_sta {
520 	struct ath10k_vif *arvif;
521 
522 	/* the following are protected by ar->data_lock */
523 	u32 changed; /* IEEE80211_RC_* */
524 	u32 bw;
525 	u32 nss;
526 	u32 smps;
527 	u16 peer_id;
528 	struct rate_info txrate;
529 	struct ieee80211_tx_info tx_info;
530 	u32 tx_retries;
531 	u32 tx_failed;
532 	u32 last_tx_bitrate;
533 
534 	u32 rx_rate_code;
535 	u32 rx_bitrate_kbps;
536 	u32 tx_rate_code;
537 	u32 tx_bitrate_kbps;
538 	struct work_struct update_wk;
539 	u64 rx_duration;
540 	struct ath10k_htt_tx_stats *tx_stats;
541 	u32 ucast_cipher;
542 
543 #ifdef CONFIG_MAC80211_DEBUGFS
544 	/* protected by conf_mutex */
545 	bool aggr_mode;
546 
547 	/* Protected with ar->data_lock */
548 	struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
549 #endif
550 	/* Protected with ar->data_lock */
551 	u32 peer_ps_state;
552 	struct work_struct tid_config_wk;
553 	int noack[ATH10K_TID_MAX];
554 	int retry_long[ATH10K_TID_MAX];
555 	int ampdu[ATH10K_TID_MAX];
556 	u8 rate_ctrl[ATH10K_TID_MAX];
557 	u32 rate_code[ATH10K_TID_MAX];
558 	int rtscts[ATH10K_TID_MAX];
559 };
560 
561 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ	(5 * HZ)
562 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ	(5 * HZ)
563 
564 enum ath10k_beacon_state {
565 	ATH10K_BEACON_SCHEDULED = 0,
566 	ATH10K_BEACON_SENDING,
567 	ATH10K_BEACON_SENT,
568 };
569 
570 struct ath10k_vif {
571 	struct list_head list;
572 
573 	u32 vdev_id;
574 	u16 peer_id;
575 	enum wmi_vdev_type vdev_type;
576 	enum wmi_vdev_subtype vdev_subtype;
577 	u32 beacon_interval;
578 	u32 dtim_period;
579 	struct sk_buff *beacon;
580 	/* protected by data_lock */
581 	enum ath10k_beacon_state beacon_state;
582 	void *beacon_buf;
583 	dma_addr_t beacon_paddr;
584 	unsigned long tx_paused; /* arbitrary values defined by target */
585 
586 	struct ath10k *ar;
587 	struct ieee80211_vif *vif;
588 
589 	bool is_started;
590 	bool is_up;
591 	bool spectral_enabled;
592 	bool ps;
593 	u32 aid;
594 	u8 bssid[ETH_ALEN];
595 
596 	struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
597 	s8 def_wep_key_idx;
598 
599 	u16 tx_seq_no;
600 
601 	union {
602 		struct {
603 			u32 uapsd;
604 		} sta;
605 		struct {
606 			/* 512 stations */
607 			u8 tim_bitmap[64];
608 			u8 tim_len;
609 			u32 ssid_len;
610 			u8 ssid[IEEE80211_MAX_SSID_LEN];
611 			bool hidden_ssid;
612 			/* P2P_IE with NoA attribute for P2P_GO case */
613 			u32 noa_len;
614 			u8 *noa_data;
615 		} ap;
616 	} u;
617 
618 	bool use_cts_prot;
619 	bool nohwcrypt;
620 	int num_legacy_stations;
621 	int txpower;
622 	bool ftm_responder;
623 	struct wmi_wmm_params_all_arg wmm_params;
624 	struct work_struct ap_csa_work;
625 	struct delayed_work connection_loss_work;
626 	struct cfg80211_bitrate_mask bitrate_mask;
627 
628 	/* For setting VHT peer fixed rate, protected by conf_mutex */
629 	int vht_num_rates;
630 	u8 vht_pfr;
631 	u32 tid_conf_changed[ATH10K_TID_MAX];
632 	int noack[ATH10K_TID_MAX];
633 	int retry_long[ATH10K_TID_MAX];
634 	int ampdu[ATH10K_TID_MAX];
635 	u8 rate_ctrl[ATH10K_TID_MAX];
636 	u32 rate_code[ATH10K_TID_MAX];
637 	int rtscts[ATH10K_TID_MAX];
638 	u32 tids_rst;
639 };
640 
641 struct ath10k_vif_iter {
642 	u32 vdev_id;
643 	struct ath10k_vif *arvif;
644 };
645 
646 /* Copy Engine register dump, protected by ce-lock */
647 struct ath10k_ce_crash_data {
648 	__le32 base_addr;
649 	__le32 src_wr_idx;
650 	__le32 src_r_idx;
651 	__le32 dst_wr_idx;
652 	__le32 dst_r_idx;
653 };
654 
655 struct ath10k_ce_crash_hdr {
656 	__le32 ce_count;
657 	__le32 reserved[3]; /* for future use */
658 	struct ath10k_ce_crash_data entries[];
659 };
660 
661 #define MAX_MEM_DUMP_TYPE	5
662 
663 /* used for crash-dump storage, protected by data-lock */
664 struct ath10k_fw_crash_data {
665 	guid_t guid;
666 	struct timespec64 timestamp;
667 	__le32 registers[REG_DUMP_COUNT_QCA988X];
668 	struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
669 
670 	u8 *ramdump_buf;
671 	size_t ramdump_buf_len;
672 };
673 
674 struct ath10k_debug {
675 	struct dentry *debugfs_phy;
676 
677 	struct ath10k_fw_stats fw_stats;
678 	struct completion fw_stats_complete;
679 	bool fw_stats_done;
680 
681 	unsigned long htt_stats_mask;
682 	unsigned long reset_htt_stats;
683 	struct delayed_work htt_stats_dwork;
684 	struct ath10k_dfs_stats dfs_stats;
685 	struct ath_dfs_pool_stats dfs_pool_stats;
686 
687 	/* used for tpc-dump storage, protected by data-lock */
688 	struct ath10k_tpc_stats *tpc_stats;
689 	struct ath10k_tpc_stats_final *tpc_stats_final;
690 
691 	struct completion tpc_complete;
692 
693 	/* protected by conf_mutex */
694 	u64 fw_dbglog_mask;
695 	u32 fw_dbglog_level;
696 	u32 reg_addr;
697 	u32 nf_cal_period;
698 	void *cal_data;
699 	u32 enable_extd_tx_stats;
700 	u8 fw_dbglog_mode;
701 };
702 
703 enum ath10k_state {
704 	ATH10K_STATE_OFF = 0,
705 	ATH10K_STATE_ON,
706 
707 	/* When doing firmware recovery the device is first powered down.
708 	 * mac80211 is supposed to call in to start() hook later on. It is
709 	 * however possible that driver unloading and firmware crash overlap.
710 	 * mac80211 can wait on conf_mutex in stop() while the device is
711 	 * stopped in ath10k_core_restart() work holding conf_mutex. The state
712 	 * RESTARTED means that the device is up and mac80211 has started hw
713 	 * reconfiguration. Once mac80211 is done with the reconfiguration we
714 	 * set the state to STATE_ON in reconfig_complete().
715 	 */
716 	ATH10K_STATE_RESTARTING,
717 	ATH10K_STATE_RESTARTED,
718 
719 	/* The device has crashed while restarting hw. This state is like ON
720 	 * but commands are blocked in HTC and -ECOMM response is given. This
721 	 * prevents completion timeouts and makes the driver more responsive to
722 	 * userspace commands. This is also prevents recursive recovery.
723 	 */
724 	ATH10K_STATE_WEDGED,
725 
726 	/* factory tests */
727 	ATH10K_STATE_UTF,
728 };
729 
730 enum ath10k_firmware_mode {
731 	/* the default mode, standard 802.11 functionality */
732 	ATH10K_FIRMWARE_MODE_NORMAL,
733 
734 	/* factory tests etc */
735 	ATH10K_FIRMWARE_MODE_UTF,
736 };
737 
738 enum ath10k_fw_features {
739 	/* wmi_mgmt_rx_hdr contains extra RSSI information */
740 	ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
741 
742 	/* Firmware from 10X branch. Deprecated, don't use in new code. */
743 	ATH10K_FW_FEATURE_WMI_10X = 1,
744 
745 	/* firmware support tx frame management over WMI, otherwise it's HTT */
746 	ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
747 
748 	/* Firmware does not support P2P */
749 	ATH10K_FW_FEATURE_NO_P2P = 3,
750 
751 	/* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
752 	 * bit is required to be set as well. Deprecated, don't use in new
753 	 * code.
754 	 */
755 	ATH10K_FW_FEATURE_WMI_10_2 = 4,
756 
757 	/* Some firmware revisions lack proper multi-interface client powersave
758 	 * implementation. Enabling PS could result in connection drops,
759 	 * traffic stalls, etc.
760 	 */
761 	ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
762 
763 	/* Some firmware revisions have an incomplete WoWLAN implementation
764 	 * despite WMI service bit being advertised. This feature flag is used
765 	 * to distinguish whether WoWLAN is really supported or not.
766 	 */
767 	ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
768 
769 	/* Don't trust error code from otp.bin */
770 	ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
771 
772 	/* Some firmware revisions pad 4th hw address to 4 byte boundary making
773 	 * it 8 bytes long in Native Wifi Rx decap.
774 	 */
775 	ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
776 
777 	/* Firmware supports bypassing PLL setting on init. */
778 	ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
779 
780 	/* Raw mode support. If supported, FW supports receiving and trasmitting
781 	 * frames in raw mode.
782 	 */
783 	ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
784 
785 	/* Firmware Supports Adaptive CCA*/
786 	ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
787 
788 	/* Firmware supports management frame protection */
789 	ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
790 
791 	/* Firmware supports pull-push model where host shares it's software
792 	 * queue state with firmware and firmware generates fetch requests
793 	 * telling host which queues to dequeue tx from.
794 	 *
795 	 * Primary function of this is improved MU-MIMO performance with
796 	 * multiple clients.
797 	 */
798 	ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
799 
800 	/* Firmware supports BT-Coex without reloading firmware via pdev param.
801 	 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
802 	 * extended resource config should be enabled always. This firmware IE
803 	 * is used to configure WMI_COEX_GPIO_SUPPORT.
804 	 */
805 	ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
806 
807 	/* Unused flag and proven to be not working, enable this if you want
808 	 * to experiment sending NULL func data frames in HTT TX
809 	 */
810 	ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
811 
812 	/* Firmware allow other BSS mesh broadcast/multicast frames without
813 	 * creating monitor interface. Appropriate rxfilters are programmed for
814 	 * mesh vdev by firmware itself. This feature flags will be used for
815 	 * not creating monitor vdev while configuring mesh node.
816 	 */
817 	ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
818 
819 	/* Firmware does not support power save in station mode. */
820 	ATH10K_FW_FEATURE_NO_PS = 17,
821 
822 	/* Firmware allows management tx by reference instead of by value. */
823 	ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
824 
825 	/* Firmware load is done externally, not by bmi */
826 	ATH10K_FW_FEATURE_NON_BMI = 19,
827 
828 	/* Firmware sends only one chan_info event per channel */
829 	ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20,
830 
831 	/* Firmware allows setting peer fixed rate */
832 	ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21,
833 
834 	/* Firmware support IRAM recovery */
835 	ATH10K_FW_FEATURE_IRAM_RECOVERY = 22,
836 
837 	/* keep last */
838 	ATH10K_FW_FEATURE_COUNT,
839 };
840 
841 enum ath10k_dev_flags {
842 	/* Indicates that ath10k device is during CAC phase of DFS */
843 	ATH10K_CAC_RUNNING,
844 	ATH10K_FLAG_CORE_REGISTERED,
845 
846 	/* Device has crashed and needs to restart. This indicates any pending
847 	 * waiters should immediately cancel instead of waiting for a time out.
848 	 */
849 	ATH10K_FLAG_CRASH_FLUSH,
850 
851 	/* Use Raw mode instead of native WiFi Tx/Rx encap mode.
852 	 * Raw mode supports both hardware and software crypto. Native WiFi only
853 	 * supports hardware crypto.
854 	 */
855 	ATH10K_FLAG_RAW_MODE,
856 
857 	/* Disable HW crypto engine */
858 	ATH10K_FLAG_HW_CRYPTO_DISABLED,
859 
860 	/* Bluetooth coexistence enabled */
861 	ATH10K_FLAG_BTCOEX,
862 
863 	/* Per Station statistics service */
864 	ATH10K_FLAG_PEER_STATS,
865 
866 	/* Indicates that ath10k device is during recovery process and not complete */
867 	ATH10K_FLAG_RESTARTING,
868 
869 	/* protected by conf_mutex */
870 	ATH10K_FLAG_NAPI_ENABLED,
871 };
872 
873 enum ath10k_cal_mode {
874 	ATH10K_CAL_MODE_FILE,
875 	ATH10K_CAL_MODE_OTP,
876 	ATH10K_CAL_MODE_DT,
877 	ATH10K_CAL_MODE_NVMEM,
878 	ATH10K_PRE_CAL_MODE_FILE,
879 	ATH10K_PRE_CAL_MODE_DT,
880 	ATH10K_PRE_CAL_MODE_NVMEM,
881 	ATH10K_CAL_MODE_EEPROM,
882 };
883 
884 enum ath10k_crypt_mode {
885 	/* Only use hardware crypto engine */
886 	ATH10K_CRYPT_MODE_HW,
887 	/* Only use software crypto engine */
888 	ATH10K_CRYPT_MODE_SW,
889 };
890 
891 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
892 {
893 	switch (mode) {
894 	case ATH10K_CAL_MODE_FILE:
895 		return "file";
896 	case ATH10K_CAL_MODE_OTP:
897 		return "otp";
898 	case ATH10K_CAL_MODE_DT:
899 		return "dt";
900 	case ATH10K_CAL_MODE_NVMEM:
901 		return "nvmem";
902 	case ATH10K_PRE_CAL_MODE_FILE:
903 		return "pre-cal-file";
904 	case ATH10K_PRE_CAL_MODE_DT:
905 		return "pre-cal-dt";
906 	case ATH10K_PRE_CAL_MODE_NVMEM:
907 		return "pre-cal-nvmem";
908 	case ATH10K_CAL_MODE_EEPROM:
909 		return "eeprom";
910 	}
911 
912 	return "unknown";
913 }
914 
915 enum ath10k_scan_state {
916 	ATH10K_SCAN_IDLE,
917 	ATH10K_SCAN_STARTING,
918 	ATH10K_SCAN_RUNNING,
919 	ATH10K_SCAN_ABORTING,
920 };
921 
922 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
923 {
924 	switch (state) {
925 	case ATH10K_SCAN_IDLE:
926 		return "idle";
927 	case ATH10K_SCAN_STARTING:
928 		return "starting";
929 	case ATH10K_SCAN_RUNNING:
930 		return "running";
931 	case ATH10K_SCAN_ABORTING:
932 		return "aborting";
933 	}
934 
935 	return "unknown";
936 }
937 
938 enum ath10k_tx_pause_reason {
939 	ATH10K_TX_PAUSE_Q_FULL,
940 	ATH10K_TX_PAUSE_MAX,
941 };
942 
943 struct ath10k_fw_file {
944 	const struct firmware *firmware;
945 
946 	char fw_version[ETHTOOL_FWVERS_LEN];
947 
948 	DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
949 
950 	enum ath10k_fw_wmi_op_version wmi_op_version;
951 	enum ath10k_fw_htt_op_version htt_op_version;
952 
953 	const void *firmware_data;
954 	size_t firmware_len;
955 
956 	const void *otp_data;
957 	size_t otp_len;
958 
959 	const void *codeswap_data;
960 	size_t codeswap_len;
961 
962 	/* The original idea of struct ath10k_fw_file was that it only
963 	 * contains struct firmware and pointers to various parts (actual
964 	 * firmware binary, otp, metadata etc) of the file. This seg_info
965 	 * is actually created separate but as this is used similarly as
966 	 * the other firmware components it's more convenient to have it
967 	 * here.
968 	 */
969 	struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
970 };
971 
972 struct ath10k_fw_components {
973 	const struct firmware *board;
974 	const void *board_data;
975 	size_t board_len;
976 	const struct firmware *ext_board;
977 	const void *ext_board_data;
978 	size_t ext_board_len;
979 
980 	struct ath10k_fw_file fw_file;
981 };
982 
983 struct ath10k_per_peer_tx_stats {
984 	u32	succ_bytes;
985 	u32	retry_bytes;
986 	u32	failed_bytes;
987 	u8	ratecode;
988 	u8	flags;
989 	u16	peer_id;
990 	u16	succ_pkts;
991 	u16	retry_pkts;
992 	u16	failed_pkts;
993 	u16	duration;
994 	u32	reserved1;
995 	u32	reserved2;
996 };
997 
998 enum ath10k_dev_type {
999 	ATH10K_DEV_TYPE_LL,
1000 	ATH10K_DEV_TYPE_HL,
1001 };
1002 
1003 struct ath10k_bus_params {
1004 	u32 chip_id;
1005 	enum ath10k_dev_type dev_type;
1006 	bool link_can_suspend;
1007 	bool hl_msdu_ids;
1008 };
1009 
1010 struct ath10k {
1011 	struct ath_common ath_common;
1012 	struct ieee80211_hw *hw;
1013 	struct ieee80211_ops *ops;
1014 	struct device *dev;
1015 	struct msa_region {
1016 		dma_addr_t paddr;
1017 		u32 mem_size;
1018 		void *vaddr;
1019 	} msa;
1020 	u8 mac_addr[ETH_ALEN];
1021 
1022 	enum ath10k_hw_rev hw_rev;
1023 	u16 dev_id;
1024 	u32 chip_id;
1025 	u32 target_version;
1026 	u8 fw_version_major;
1027 	u32 fw_version_minor;
1028 	u16 fw_version_release;
1029 	u16 fw_version_build;
1030 	u32 fw_stats_req_mask;
1031 	u32 phy_capability;
1032 	u32 hw_min_tx_power;
1033 	u32 hw_max_tx_power;
1034 	u32 hw_eeprom_rd;
1035 	u32 ht_cap_info;
1036 	u32 vht_cap_info;
1037 	u32 vht_supp_mcs;
1038 	u32 num_rf_chains;
1039 	u32 max_spatial_stream;
1040 	/* protected by conf_mutex */
1041 	u32 low_2ghz_chan;
1042 	u32 high_2ghz_chan;
1043 	u32 low_5ghz_chan;
1044 	u32 high_5ghz_chan;
1045 	bool ani_enabled;
1046 	u32 sys_cap_info;
1047 
1048 	/* protected by data_lock */
1049 	bool hw_rfkill_on;
1050 
1051 	/* protected by conf_mutex */
1052 	u8 ps_state_enable;
1053 
1054 	bool nlo_enabled;
1055 	bool p2p;
1056 
1057 	struct {
1058 		enum ath10k_bus bus;
1059 		const struct ath10k_hif_ops *ops;
1060 	} hif;
1061 
1062 	struct completion target_suspend;
1063 	struct completion driver_recovery;
1064 
1065 	const struct ath10k_hw_regs *regs;
1066 	const struct ath10k_hw_ce_regs *hw_ce_regs;
1067 	const struct ath10k_hw_values *hw_values;
1068 	struct ath10k_bmi bmi;
1069 	struct ath10k_wmi wmi;
1070 	struct ath10k_htc htc;
1071 	struct ath10k_htt htt;
1072 
1073 	struct ath10k_hw_params hw_params;
1074 
1075 	/* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
1076 	struct ath10k_fw_components normal_mode_fw;
1077 
1078 	/* READ-ONLY images of the running firmware, which can be either
1079 	 * normal or UTF. Do not modify, release etc!
1080 	 */
1081 	const struct ath10k_fw_components *running_fw;
1082 
1083 	const struct firmware *pre_cal_file;
1084 	const struct firmware *cal_file;
1085 
1086 	struct {
1087 		u32 vendor;
1088 		u32 device;
1089 		u32 subsystem_vendor;
1090 		u32 subsystem_device;
1091 
1092 		bool bmi_ids_valid;
1093 		bool qmi_ids_valid;
1094 		u32 qmi_board_id;
1095 		u32 qmi_chip_id;
1096 		u8 bmi_board_id;
1097 		u8 bmi_eboard_id;
1098 		u8 bmi_chip_id;
1099 		bool ext_bid_supported;
1100 
1101 		char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
1102 	} id;
1103 
1104 	int fw_api;
1105 	int bd_api;
1106 	enum ath10k_cal_mode cal_mode;
1107 
1108 	struct {
1109 		struct completion started;
1110 		struct completion completed;
1111 		struct completion on_channel;
1112 		struct delayed_work timeout;
1113 		enum ath10k_scan_state state;
1114 		bool is_roc;
1115 		int vdev_id;
1116 		int roc_freq;
1117 		bool roc_notify;
1118 	} scan;
1119 
1120 	struct {
1121 		struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
1122 	} mac;
1123 
1124 	/* should never be NULL; needed for regular htt rx */
1125 	struct ieee80211_channel *rx_channel;
1126 
1127 	/* valid during scan; needed for mgmt rx during scan */
1128 	struct ieee80211_channel *scan_channel;
1129 
1130 	/* current operating channel definition */
1131 	struct cfg80211_chan_def chandef;
1132 
1133 	/* currently configured operating channel in firmware */
1134 	struct ieee80211_channel *tgt_oper_chan;
1135 
1136 	unsigned long long free_vdev_map;
1137 	struct ath10k_vif *monitor_arvif;
1138 	bool monitor;
1139 	int monitor_vdev_id;
1140 	bool monitor_started;
1141 	unsigned int filter_flags;
1142 	unsigned long dev_flags;
1143 	bool dfs_block_radar_events;
1144 
1145 	/* protected by conf_mutex */
1146 	bool radar_enabled;
1147 	int num_started_vdevs;
1148 
1149 	/* Protected by conf-mutex */
1150 	u8 cfg_tx_chainmask;
1151 	u8 cfg_rx_chainmask;
1152 
1153 	struct completion install_key_done;
1154 
1155 	int last_wmi_vdev_start_status;
1156 	struct completion vdev_setup_done;
1157 	struct completion vdev_delete_done;
1158 	struct completion peer_stats_info_complete;
1159 
1160 	struct workqueue_struct *workqueue;
1161 	/* Auxiliary workqueue */
1162 	struct workqueue_struct *workqueue_aux;
1163 	struct workqueue_struct *workqueue_tx_complete;
1164 	/* prevents concurrent FW reconfiguration */
1165 	struct mutex conf_mutex;
1166 
1167 	/* protects coredump data */
1168 	struct mutex dump_mutex;
1169 
1170 	/* protects shared structure data */
1171 	spinlock_t data_lock;
1172 
1173 	struct list_head arvifs;
1174 	struct list_head peers;
1175 	struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
1176 	wait_queue_head_t peer_mapping_wq;
1177 
1178 	/* protected by conf_mutex */
1179 	int num_peers;
1180 	int num_stations;
1181 
1182 	int max_num_peers;
1183 	int max_num_stations;
1184 	int max_num_vdevs;
1185 	int max_num_tdls_vdevs;
1186 	int num_active_peers;
1187 	int num_tids;
1188 
1189 	struct work_struct svc_rdy_work;
1190 	struct sk_buff *svc_rdy_skb;
1191 
1192 	struct work_struct offchan_tx_work;
1193 	struct sk_buff_head offchan_tx_queue;
1194 	struct completion offchan_tx_completed;
1195 	struct sk_buff *offchan_tx_skb;
1196 
1197 	struct work_struct wmi_mgmt_tx_work;
1198 	struct sk_buff_head wmi_mgmt_tx_queue;
1199 
1200 	enum ath10k_state state;
1201 
1202 	struct work_struct register_work;
1203 	struct work_struct restart_work;
1204 	struct work_struct bundle_tx_work;
1205 	struct work_struct tx_complete_work;
1206 
1207 	/* cycle count is reported twice for each visited channel during scan.
1208 	 * access protected by data_lock
1209 	 */
1210 	u32 survey_last_rx_clear_count;
1211 	u32 survey_last_cycle_count;
1212 	struct survey_info survey[ATH10K_NUM_CHANS];
1213 
1214 	/* Channel info events are expected to come in pairs without and with
1215 	 * COMPLETE flag set respectively for each channel visit during scan.
1216 	 *
1217 	 * However there are deviations from this rule. This flag is used to
1218 	 * avoid reporting garbage data.
1219 	 */
1220 	bool ch_info_can_report_survey;
1221 	struct completion bss_survey_done;
1222 
1223 	struct dfs_pattern_detector *dfs_detector;
1224 
1225 	unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
1226 
1227 #ifdef CONFIG_ATH10K_DEBUGFS
1228 	struct ath10k_debug debug;
1229 	struct {
1230 		/* relay(fs) channel for spectral scan */
1231 		struct rchan *rfs_chan_spec_scan;
1232 
1233 		/* spectral_mode and spec_config are protected by conf_mutex */
1234 		enum ath10k_spectral_mode mode;
1235 		struct ath10k_spec_scan config;
1236 	} spectral;
1237 #endif
1238 
1239 	u32 pktlog_filter;
1240 
1241 #ifdef CONFIG_DEV_COREDUMP
1242 	struct {
1243 		struct ath10k_fw_crash_data *fw_crash_data;
1244 	} coredump;
1245 #endif
1246 
1247 	struct {
1248 		/* protected by conf_mutex */
1249 		struct ath10k_fw_components utf_mode_fw;
1250 
1251 		/* protected by data_lock */
1252 		bool utf_monitor;
1253 	} testmode;
1254 
1255 	struct {
1256 		/* protected by data_lock */
1257 		u32 rx_crc_err_drop;
1258 		u32 fw_crash_counter;
1259 		u32 fw_warm_reset_counter;
1260 		u32 fw_cold_reset_counter;
1261 	} stats;
1262 
1263 	struct ath10k_thermal thermal;
1264 	struct ath10k_wow wow;
1265 	struct ath10k_per_peer_tx_stats peer_tx_stats;
1266 
1267 	/* NAPI */
1268 	struct net_device napi_dev;
1269 	struct napi_struct napi;
1270 
1271 	struct work_struct set_coverage_class_work;
1272 	/* protected by conf_mutex */
1273 	struct {
1274 		/* writing also protected by data_lock */
1275 		s16 coverage_class;
1276 
1277 		u32 reg_phyclk;
1278 		u32 reg_slottime_conf;
1279 		u32 reg_slottime_orig;
1280 		u32 reg_ack_cts_timeout_conf;
1281 		u32 reg_ack_cts_timeout_orig;
1282 	} fw_coverage;
1283 
1284 	u32 ampdu_reference;
1285 
1286 	const u8 *wmi_key_cipher;
1287 	void *ce_priv;
1288 
1289 	u32 sta_tid_stats_mask;
1290 
1291 	/* protected by data_lock */
1292 	enum ath10k_radar_confirmation_state radar_conf_state;
1293 	struct ath10k_radar_found_info last_radar_info;
1294 	struct work_struct radar_confirmation_work;
1295 	struct ath10k_bus_params bus_param;
1296 	struct completion peer_delete_done;
1297 
1298 	bool coex_support;
1299 	int coex_gpio_pin;
1300 
1301 	s32 tx_power_2g_limit;
1302 	s32 tx_power_5g_limit;
1303 
1304 	/* must be last */
1305 	u8 drv_priv[] __aligned(sizeof(void *));
1306 };
1307 
1308 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
1309 {
1310 	if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
1311 	    test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
1312 		return true;
1313 
1314 	return false;
1315 }
1316 
1317 extern unsigned int ath10k_frame_mode;
1318 extern unsigned long ath10k_coredump_mask;
1319 
1320 void ath10k_core_napi_sync_disable(struct ath10k *ar);
1321 void ath10k_core_napi_enable(struct ath10k *ar);
1322 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1323 				  enum ath10k_bus bus,
1324 				  enum ath10k_hw_rev hw_rev,
1325 				  const struct ath10k_hif_ops *hif_ops);
1326 void ath10k_core_destroy(struct ath10k *ar);
1327 void ath10k_core_get_fw_features_str(struct ath10k *ar,
1328 				     char *buf,
1329 				     size_t max_len);
1330 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1331 				     struct ath10k_fw_file *fw_file);
1332 
1333 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1334 		      const struct ath10k_fw_components *fw_components);
1335 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
1336 void ath10k_core_stop(struct ath10k *ar);
1337 void ath10k_core_start_recovery(struct ath10k *ar);
1338 int ath10k_core_register(struct ath10k *ar,
1339 			 const struct ath10k_bus_params *bus_params);
1340 void ath10k_core_unregister(struct ath10k *ar);
1341 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type);
1342 int ath10k_core_check_dt(struct ath10k *ar);
1343 void ath10k_core_free_board_files(struct ath10k *ar);
1344 
1345 #endif /* _CORE_H_ */
1346