xref: /linux/drivers/net/ethernet/sfc/tc.h (revision 58f6259b7a08f8d47d4629609703d358b042f0fd)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /****************************************************************************
3  * Driver for Solarflare network controllers and boards
4  * Copyright 2019 Solarflare Communications Inc.
5  * Copyright 2020-2022 Xilinx Inc.
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published
9  * by the Free Software Foundation, incorporated herein by reference.
10  */
11 
12 #ifndef EFX_TC_H
13 #define EFX_TC_H
14 #include <net/flow_offload.h>
15 #include <linux/rhashtable.h>
16 #include "net_driver.h"
17 #include "tc_counters.h"
18 
19 #define IS_ALL_ONES(v)	(!(typeof (v))~(v))
20 
21 #ifdef CONFIG_IPV6
22 static inline bool efx_ipv6_addr_all_ones(struct in6_addr *addr)
23 {
24 	return !memchr_inv(addr, 0xff, sizeof(*addr));
25 }
26 #endif
27 
28 struct efx_tc_encap_action; /* see tc_encap_actions.h */
29 
30 struct efx_tc_action_set {
31 	u16 vlan_push:2;
32 	u16 vlan_pop:2;
33 	u16 decap:1;
34 	u16 deliver:1;
35 	__be16 vlan_tci[2]; /* TCIs for vlan_push */
36 	__be16 vlan_proto[2]; /* Ethertypes for vlan_push */
37 	struct efx_tc_counter_index *count;
38 	struct efx_tc_encap_action *encap_md; /* entry in tc_encap_ht table */
39 	struct list_head encap_user; /* entry on encap_md->users list */
40 	struct efx_tc_action_set_list *user; /* Only populated if encap_md */
41 	struct list_head count_user; /* entry on counter->users list, if encap */
42 	u32 dest_mport;
43 	u32 fw_id; /* index of this entry in firmware actions table */
44 	struct list_head list;
45 };
46 
47 struct efx_tc_match_fields {
48 	/* L1 */
49 	u32 ingress_port;
50 	u8 recirc_id;
51 	/* L2 (inner when encap) */
52 	__be16 eth_proto;
53 	__be16 vlan_tci[2], vlan_proto[2];
54 	u8 eth_saddr[ETH_ALEN], eth_daddr[ETH_ALEN];
55 	/* L3 (when IP) */
56 	u8 ip_proto, ip_tos, ip_ttl;
57 	__be32 src_ip, dst_ip;
58 #ifdef CONFIG_IPV6
59 	struct in6_addr src_ip6, dst_ip6;
60 #endif
61 	bool ip_frag, ip_firstfrag;
62 	/* L4 */
63 	__be16 l4_sport, l4_dport; /* Ports (UDP, TCP) */
64 	__be16 tcp_flags;
65 	/* Encap.  The following are *outer* fields.  Note that there are no
66 	 * outer eth (L2) fields; this is because TC doesn't have them.
67 	 */
68 	__be32 enc_src_ip, enc_dst_ip;
69 	struct in6_addr enc_src_ip6, enc_dst_ip6;
70 	u8 enc_ip_tos, enc_ip_ttl;
71 	__be16 enc_sport, enc_dport;
72 	__be32 enc_keyid; /* e.g. VNI, VSID */
73 };
74 
75 static inline bool efx_tc_match_is_encap(const struct efx_tc_match_fields *mask)
76 {
77 	return mask->enc_src_ip || mask->enc_dst_ip ||
78 	       !ipv6_addr_any(&mask->enc_src_ip6) ||
79 	       !ipv6_addr_any(&mask->enc_dst_ip6) || mask->enc_ip_tos ||
80 	       mask->enc_ip_ttl || mask->enc_sport || mask->enc_dport;
81 }
82 
83 /**
84  * enum efx_tc_em_pseudo_type - &struct efx_tc_encap_match pseudo type
85  *
86  * These are used to classify "pseudo" encap matches, which don't refer
87  * to an entry in hardware but rather indicate that a section of the
88  * match space is in use by another Outer Rule.
89  *
90  * @EFX_TC_EM_DIRECT: real HW entry in Outer Rule table; not a pseudo.
91  *	Hardware index in &struct efx_tc_encap_match.fw_id is valid.
92  * @EFX_TC_EM_PSEUDO_MASK: registered by an encap match which includes a
93  *	match on an optional field (currently ip_tos and/or udp_sport),
94  *	to prevent an overlapping encap match _without_ optional fields.
95  *	The pseudo encap match may be referenced again by an encap match
96  *	with different values for these fields, but all masks must match the
97  *	first (stored in our child_* fields).
98  */
99 enum efx_tc_em_pseudo_type {
100 	EFX_TC_EM_DIRECT,
101 	EFX_TC_EM_PSEUDO_MASK,
102 };
103 
104 struct efx_tc_encap_match {
105 	__be32 src_ip, dst_ip;
106 	struct in6_addr src_ip6, dst_ip6;
107 	__be16 udp_dport;
108 	__be16 udp_sport, udp_sport_mask;
109 	u8 ip_tos, ip_tos_mask;
110 	struct rhash_head linkage;
111 	enum efx_encap_type tun_type;
112 	u8 child_ip_tos_mask;
113 	__be16 child_udp_sport_mask;
114 	refcount_t ref;
115 	enum efx_tc_em_pseudo_type type;
116 	u32 fw_id; /* index of this entry in firmware encap match table */
117 	struct efx_tc_encap_match *pseudo; /* Referenced pseudo EM if needed */
118 };
119 
120 struct efx_tc_match {
121 	struct efx_tc_match_fields value;
122 	struct efx_tc_match_fields mask;
123 	struct efx_tc_encap_match *encap;
124 };
125 
126 struct efx_tc_action_set_list {
127 	struct list_head list;
128 	u32 fw_id;
129 };
130 
131 struct efx_tc_flow_rule {
132 	unsigned long cookie;
133 	struct rhash_head linkage;
134 	struct efx_tc_match match;
135 	struct efx_tc_action_set_list acts;
136 	struct efx_tc_action_set_list *fallback; /* what to use when unready? */
137 	u32 fw_id;
138 };
139 
140 enum efx_tc_rule_prios {
141 	EFX_TC_PRIO_TC, /* Rule inserted by TC */
142 	EFX_TC_PRIO_DFLT, /* Default switch rule; one of efx_tc_default_rules */
143 	EFX_TC_PRIO__NUM
144 };
145 
146 /**
147  * struct efx_tc_state - control plane data for TC offload
148  *
149  * @caps: MAE capabilities reported by MCDI
150  * @block_list: List of &struct efx_tc_block_binding
151  * @mutex: Used to serialise operations on TC hashtables
152  * @counter_ht: Hashtable of TC counters (FW IDs and counter values)
153  * @counter_id_ht: Hashtable mapping TC counter cookies to counters
154  * @encap_ht: Hashtable of TC encap actions
155  * @encap_match_ht: Hashtable of TC encap matches
156  * @match_action_ht: Hashtable of TC match-action rules
157  * @neigh_ht: Hashtable of neighbour watches (&struct efx_neigh_binder)
158  * @reps_mport_id: MAE port allocated for representor RX
159  * @reps_filter_uc: VNIC filter for representor unicast RX (promisc)
160  * @reps_filter_mc: VNIC filter for representor multicast RX (allmulti)
161  * @reps_mport_vport_id: vport_id for representor RX filters
162  * @flush_counters: counters have been stopped, waiting for drain
163  * @flush_gen: final generation count per type array as reported by
164  *             MC_CMD_MAE_COUNTERS_STREAM_STOP
165  * @seen_gen: most recent generation count per type as seen by efx_tc_rx()
166  * @flush_wq: wait queue used by efx_mae_stop_counters() to wait for
167  *	MAE counters RXQ to finish draining
168  * @dflt: Match-action rules for default switching; at priority
169  *	%EFX_TC_PRIO_DFLT.  Named by *ingress* port
170  * @dflt.pf: rule for traffic ingressing from PF (egresses to wire)
171  * @dflt.wire: rule for traffic ingressing from wire (egresses to PF)
172  * @facts: Fallback action-set-lists for unready rules.  Named by *egress* port
173  * @facts.pf: action-set-list for unready rules on PF netdev, hence applying to
174  *	traffic from wire, and egressing to PF
175  * @facts.reps: action-set-list for unready rules on representors, hence
176  *	applying to traffic from representees, and egressing to the reps mport
177  * @up: have TC datastructures been set up?
178  */
179 struct efx_tc_state {
180 	struct mae_caps *caps;
181 	struct list_head block_list;
182 	struct mutex mutex;
183 	struct rhashtable counter_ht;
184 	struct rhashtable counter_id_ht;
185 	struct rhashtable encap_ht;
186 	struct rhashtable encap_match_ht;
187 	struct rhashtable match_action_ht;
188 	struct rhashtable neigh_ht;
189 	u32 reps_mport_id, reps_mport_vport_id;
190 	s32 reps_filter_uc, reps_filter_mc;
191 	bool flush_counters;
192 	u32 flush_gen[EFX_TC_COUNTER_TYPE_MAX];
193 	u32 seen_gen[EFX_TC_COUNTER_TYPE_MAX];
194 	wait_queue_head_t flush_wq;
195 	struct {
196 		struct efx_tc_flow_rule pf;
197 		struct efx_tc_flow_rule wire;
198 	} dflt;
199 	struct {
200 		struct efx_tc_action_set_list pf;
201 		struct efx_tc_action_set_list reps;
202 	} facts;
203 	bool up;
204 };
205 
206 struct efx_rep;
207 
208 enum efx_encap_type efx_tc_indr_netdev_type(struct net_device *net_dev);
209 struct efx_rep *efx_tc_flower_lookup_efv(struct efx_nic *efx,
210 					 struct net_device *dev);
211 s64 efx_tc_flower_external_mport(struct efx_nic *efx, struct efx_rep *efv);
212 int efx_tc_configure_default_rule_rep(struct efx_rep *efv);
213 void efx_tc_deconfigure_default_rule(struct efx_nic *efx,
214 				     struct efx_tc_flow_rule *rule);
215 int efx_tc_flower(struct efx_nic *efx, struct net_device *net_dev,
216 		  struct flow_cls_offload *tc, struct efx_rep *efv);
217 
218 int efx_tc_insert_rep_filters(struct efx_nic *efx);
219 void efx_tc_remove_rep_filters(struct efx_nic *efx);
220 
221 int efx_init_tc(struct efx_nic *efx);
222 void efx_fini_tc(struct efx_nic *efx);
223 
224 int efx_init_struct_tc(struct efx_nic *efx);
225 void efx_fini_struct_tc(struct efx_nic *efx);
226 
227 #endif /* EFX_TC_H */
228