1 /* QLogic qede NIC Driver 2 * Copyright (c) 2015-2017 QLogic Corporation 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and /or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 #include <linux/version.h> 33 #include <linux/types.h> 34 #include <linux/netdevice.h> 35 #include <linux/etherdevice.h> 36 #include <linux/ethtool.h> 37 #include <linux/string.h> 38 #include <linux/pci.h> 39 #include <linux/capability.h> 40 #include <linux/vmalloc.h> 41 #include "qede.h" 42 #include "qede_ptp.h" 43 44 #define QEDE_RQSTAT_OFFSET(stat_name) \ 45 (offsetof(struct qede_rx_queue, stat_name)) 46 #define QEDE_RQSTAT_STRING(stat_name) (#stat_name) 47 #define QEDE_RQSTAT(stat_name) \ 48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)} 49 50 #define QEDE_SELFTEST_POLL_COUNT 100 51 #define QEDE_DUMP_VERSION 0x1 52 #define QEDE_DUMP_NVM_ARG_COUNT 2 53 54 static const struct { 55 u64 offset; 56 char string[ETH_GSTRING_LEN]; 57 } qede_rqstats_arr[] = { 58 QEDE_RQSTAT(rcv_pkts), 59 QEDE_RQSTAT(rx_hw_errors), 60 QEDE_RQSTAT(rx_alloc_errors), 61 QEDE_RQSTAT(rx_ip_frags), 62 QEDE_RQSTAT(xdp_no_pass), 63 }; 64 65 #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr) 66 #define QEDE_TQSTAT_OFFSET(stat_name) \ 67 (offsetof(struct qede_tx_queue, stat_name)) 68 #define QEDE_TQSTAT_STRING(stat_name) (#stat_name) 69 #define QEDE_TQSTAT(stat_name) \ 70 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)} 71 #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr) 72 static const struct { 73 u64 offset; 74 char string[ETH_GSTRING_LEN]; 75 } qede_tqstats_arr[] = { 76 QEDE_TQSTAT(xmit_pkts), 77 QEDE_TQSTAT(stopped_cnt), 78 QEDE_TQSTAT(tx_mem_alloc_err), 79 }; 80 81 #define QEDE_STAT_OFFSET(stat_name, type, base) \ 82 (offsetof(type, stat_name) + (base)) 83 #define QEDE_STAT_STRING(stat_name) (#stat_name) 84 #define _QEDE_STAT(stat_name, type, base, attr) \ 85 {QEDE_STAT_OFFSET(stat_name, type, base), \ 86 QEDE_STAT_STRING(stat_name), \ 87 attr} 88 #define QEDE_STAT(stat_name) \ 89 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0) 90 #define QEDE_PF_STAT(stat_name) \ 91 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \ 92 BIT(QEDE_STAT_PF_ONLY)) 93 #define QEDE_PF_BB_STAT(stat_name) \ 94 _QEDE_STAT(stat_name, struct qede_stats_bb, \ 95 offsetof(struct qede_stats, bb), \ 96 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY)) 97 #define QEDE_PF_AH_STAT(stat_name) \ 98 _QEDE_STAT(stat_name, struct qede_stats_ah, \ 99 offsetof(struct qede_stats, ah), \ 100 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY)) 101 static const struct { 102 u64 offset; 103 char string[ETH_GSTRING_LEN]; 104 unsigned long attr; 105 #define QEDE_STAT_PF_ONLY 0 106 #define QEDE_STAT_BB_ONLY 1 107 #define QEDE_STAT_AH_ONLY 2 108 } qede_stats_arr[] = { 109 QEDE_STAT(rx_ucast_bytes), 110 QEDE_STAT(rx_mcast_bytes), 111 QEDE_STAT(rx_bcast_bytes), 112 QEDE_STAT(rx_ucast_pkts), 113 QEDE_STAT(rx_mcast_pkts), 114 QEDE_STAT(rx_bcast_pkts), 115 116 QEDE_STAT(tx_ucast_bytes), 117 QEDE_STAT(tx_mcast_bytes), 118 QEDE_STAT(tx_bcast_bytes), 119 QEDE_STAT(tx_ucast_pkts), 120 QEDE_STAT(tx_mcast_pkts), 121 QEDE_STAT(tx_bcast_pkts), 122 123 QEDE_PF_STAT(rx_64_byte_packets), 124 QEDE_PF_STAT(rx_65_to_127_byte_packets), 125 QEDE_PF_STAT(rx_128_to_255_byte_packets), 126 QEDE_PF_STAT(rx_256_to_511_byte_packets), 127 QEDE_PF_STAT(rx_512_to_1023_byte_packets), 128 QEDE_PF_STAT(rx_1024_to_1518_byte_packets), 129 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets), 130 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets), 131 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets), 132 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets), 133 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets), 134 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets), 135 QEDE_PF_STAT(tx_64_byte_packets), 136 QEDE_PF_STAT(tx_65_to_127_byte_packets), 137 QEDE_PF_STAT(tx_128_to_255_byte_packets), 138 QEDE_PF_STAT(tx_256_to_511_byte_packets), 139 QEDE_PF_STAT(tx_512_to_1023_byte_packets), 140 QEDE_PF_STAT(tx_1024_to_1518_byte_packets), 141 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets), 142 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets), 143 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets), 144 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets), 145 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets), 146 QEDE_PF_STAT(rx_mac_crtl_frames), 147 QEDE_PF_STAT(tx_mac_ctrl_frames), 148 QEDE_PF_STAT(rx_pause_frames), 149 QEDE_PF_STAT(tx_pause_frames), 150 QEDE_PF_STAT(rx_pfc_frames), 151 QEDE_PF_STAT(tx_pfc_frames), 152 153 QEDE_PF_STAT(rx_crc_errors), 154 QEDE_PF_STAT(rx_align_errors), 155 QEDE_PF_STAT(rx_carrier_errors), 156 QEDE_PF_STAT(rx_oversize_packets), 157 QEDE_PF_STAT(rx_jabbers), 158 QEDE_PF_STAT(rx_undersize_packets), 159 QEDE_PF_STAT(rx_fragments), 160 QEDE_PF_BB_STAT(tx_lpi_entry_count), 161 QEDE_PF_BB_STAT(tx_total_collisions), 162 QEDE_PF_STAT(brb_truncates), 163 QEDE_PF_STAT(brb_discards), 164 QEDE_STAT(no_buff_discards), 165 QEDE_PF_STAT(mftag_filter_discards), 166 QEDE_PF_STAT(mac_filter_discards), 167 QEDE_PF_STAT(gft_filter_drop), 168 QEDE_STAT(tx_err_drop_pkts), 169 QEDE_STAT(ttl0_discard), 170 QEDE_STAT(packet_too_big_discard), 171 172 QEDE_STAT(coalesced_pkts), 173 QEDE_STAT(coalesced_events), 174 QEDE_STAT(coalesced_aborts_num), 175 QEDE_STAT(non_coalesced_pkts), 176 QEDE_STAT(coalesced_bytes), 177 178 QEDE_STAT(link_change_count), 179 QEDE_STAT(ptp_skip_txts), 180 }; 181 182 #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr) 183 #define QEDE_STAT_IS_PF_ONLY(i) \ 184 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr) 185 #define QEDE_STAT_IS_BB_ONLY(i) \ 186 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr) 187 #define QEDE_STAT_IS_AH_ONLY(i) \ 188 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr) 189 190 enum { 191 QEDE_PRI_FLAG_CMT, 192 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */ 193 QEDE_PRI_FLAG_RECOVER_ON_ERROR, 194 QEDE_PRI_FLAG_LEN, 195 }; 196 197 static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = { 198 "Coupled-Function", 199 "SmartAN capable", 200 "Recover on error", 201 }; 202 203 enum qede_ethtool_tests { 204 QEDE_ETHTOOL_INT_LOOPBACK, 205 QEDE_ETHTOOL_INTERRUPT_TEST, 206 QEDE_ETHTOOL_MEMORY_TEST, 207 QEDE_ETHTOOL_REGISTER_TEST, 208 QEDE_ETHTOOL_CLOCK_TEST, 209 QEDE_ETHTOOL_NVRAM_TEST, 210 QEDE_ETHTOOL_TEST_MAX 211 }; 212 213 static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = { 214 "Internal loopback (offline)", 215 "Interrupt (online)\t", 216 "Memory (online)\t\t", 217 "Register (online)\t", 218 "Clock (online)\t\t", 219 "Nvram (online)\t\t", 220 }; 221 222 static void qede_get_strings_stats_txq(struct qede_dev *edev, 223 struct qede_tx_queue *txq, u8 **buf) 224 { 225 int i; 226 227 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 228 if (txq->is_xdp) 229 sprintf(*buf, "%d [XDP]: %s", 230 QEDE_TXQ_XDP_TO_IDX(edev, txq), 231 qede_tqstats_arr[i].string); 232 else 233 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos, 234 qede_tqstats_arr[i].string); 235 *buf += ETH_GSTRING_LEN; 236 } 237 } 238 239 static void qede_get_strings_stats_rxq(struct qede_dev *edev, 240 struct qede_rx_queue *rxq, u8 **buf) 241 { 242 int i; 243 244 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 245 sprintf(*buf, "%d: %s", rxq->rxq_id, 246 qede_rqstats_arr[i].string); 247 *buf += ETH_GSTRING_LEN; 248 } 249 } 250 251 static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index) 252 { 253 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) || 254 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) || 255 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index)); 256 } 257 258 static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf) 259 { 260 struct qede_fastpath *fp; 261 int i; 262 263 /* Account for queue statistics */ 264 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 265 fp = &edev->fp_array[i]; 266 267 if (fp->type & QEDE_FASTPATH_RX) 268 qede_get_strings_stats_rxq(edev, fp->rxq, &buf); 269 270 if (fp->type & QEDE_FASTPATH_XDP) 271 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf); 272 273 if (fp->type & QEDE_FASTPATH_TX) { 274 int cos; 275 276 for_each_cos_in_txq(edev, cos) 277 qede_get_strings_stats_txq(edev, 278 &fp->txq[cos], &buf); 279 } 280 } 281 282 /* Account for non-queue statistics */ 283 for (i = 0; i < QEDE_NUM_STATS; i++) { 284 if (qede_is_irrelevant_stat(edev, i)) 285 continue; 286 strcpy(buf, qede_stats_arr[i].string); 287 buf += ETH_GSTRING_LEN; 288 } 289 } 290 291 static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf) 292 { 293 struct qede_dev *edev = netdev_priv(dev); 294 295 switch (stringset) { 296 case ETH_SS_STATS: 297 qede_get_strings_stats(edev, buf); 298 break; 299 case ETH_SS_PRIV_FLAGS: 300 memcpy(buf, qede_private_arr, 301 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN); 302 break; 303 case ETH_SS_TEST: 304 memcpy(buf, qede_tests_str_arr, 305 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX); 306 break; 307 default: 308 DP_VERBOSE(edev, QED_MSG_DEBUG, 309 "Unsupported stringset 0x%08x\n", stringset); 310 } 311 } 312 313 static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf) 314 { 315 int i; 316 317 for (i = 0; i < QEDE_NUM_TQSTATS; i++) { 318 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset)); 319 (*buf)++; 320 } 321 } 322 323 static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf) 324 { 325 int i; 326 327 for (i = 0; i < QEDE_NUM_RQSTATS; i++) { 328 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset)); 329 (*buf)++; 330 } 331 } 332 333 static void qede_get_ethtool_stats(struct net_device *dev, 334 struct ethtool_stats *stats, u64 *buf) 335 { 336 struct qede_dev *edev = netdev_priv(dev); 337 struct qede_fastpath *fp; 338 int i; 339 340 qede_fill_by_demand_stats(edev); 341 342 /* Need to protect the access to the fastpath array */ 343 __qede_lock(edev); 344 345 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) { 346 fp = &edev->fp_array[i]; 347 348 if (fp->type & QEDE_FASTPATH_RX) 349 qede_get_ethtool_stats_rxq(fp->rxq, &buf); 350 351 if (fp->type & QEDE_FASTPATH_XDP) 352 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf); 353 354 if (fp->type & QEDE_FASTPATH_TX) { 355 int cos; 356 357 for_each_cos_in_txq(edev, cos) 358 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf); 359 } 360 } 361 362 for (i = 0; i < QEDE_NUM_STATS; i++) { 363 if (qede_is_irrelevant_stat(edev, i)) 364 continue; 365 *buf = *((u64 *)(((void *)&edev->stats) + 366 qede_stats_arr[i].offset)); 367 368 buf++; 369 } 370 371 __qede_unlock(edev); 372 } 373 374 static int qede_get_sset_count(struct net_device *dev, int stringset) 375 { 376 struct qede_dev *edev = netdev_priv(dev); 377 int num_stats = QEDE_NUM_STATS, i; 378 379 switch (stringset) { 380 case ETH_SS_STATS: 381 for (i = 0; i < QEDE_NUM_STATS; i++) 382 if (qede_is_irrelevant_stat(edev, i)) 383 num_stats--; 384 385 /* Account for the Regular Tx statistics */ 386 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS * 387 edev->dev_info.num_tc; 388 389 /* Account for the Regular Rx statistics */ 390 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS; 391 392 /* Account for XDP statistics [if needed] */ 393 if (edev->xdp_prog) 394 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS; 395 return num_stats; 396 397 case ETH_SS_PRIV_FLAGS: 398 return QEDE_PRI_FLAG_LEN; 399 case ETH_SS_TEST: 400 if (!IS_VF(edev)) 401 return QEDE_ETHTOOL_TEST_MAX; 402 else 403 return 0; 404 default: 405 DP_VERBOSE(edev, QED_MSG_DEBUG, 406 "Unsupported stringset 0x%08x\n", stringset); 407 return -EINVAL; 408 } 409 } 410 411 static u32 qede_get_priv_flags(struct net_device *dev) 412 { 413 struct qede_dev *edev = netdev_priv(dev); 414 u32 flags = 0; 415 416 if (edev->dev_info.common.num_hwfns > 1) 417 flags |= BIT(QEDE_PRI_FLAG_CMT); 418 419 if (edev->dev_info.common.smart_an) 420 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT); 421 422 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE)) 423 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR); 424 425 return flags; 426 } 427 428 static int qede_set_priv_flags(struct net_device *dev, u32 flags) 429 { 430 struct qede_dev *edev = netdev_priv(dev); 431 u32 cflags = qede_get_priv_flags(dev); 432 u32 dflags = flags ^ cflags; 433 434 /* can only change RECOVER_ON_ERROR flag */ 435 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR)) 436 return -EINVAL; 437 438 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR)) 439 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags); 440 else 441 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags); 442 443 return 0; 444 } 445 446 struct qede_link_mode_mapping { 447 u32 qed_link_mode; 448 u32 ethtool_link_mode; 449 }; 450 451 static const struct qede_link_mode_mapping qed_lm_map[] = { 452 {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT}, 453 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT}, 454 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT}, 455 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT}, 456 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT}, 457 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT}, 458 {QED_LM_TP_BIT, ETHTOOL_LINK_MODE_TP_BIT}, 459 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT}, 460 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT}, 461 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT}, 462 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 463 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 464 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT}, 465 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT}, 466 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT}, 467 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT}, 468 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT}, 469 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT}, 470 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT}, 471 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT}, 472 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT}, 473 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT}, 474 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT}, 475 {QED_LM_100000baseKR4_Full_BIT, 476 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT}, 477 {QED_LM_100000baseSR4_Full_BIT, 478 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT}, 479 {QED_LM_100000baseCR4_Full_BIT, 480 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT}, 481 {QED_LM_100000baseLR4_ER4_Full_BIT, 482 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT}, 483 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT}, 484 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT}, 485 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT}, 486 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT}, 487 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT}, 488 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT}, 489 }; 490 491 #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \ 492 { \ 493 int i; \ 494 \ 495 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 496 if ((caps) & (qed_lm_map[i].qed_link_mode)) \ 497 __set_bit(qed_lm_map[i].ethtool_link_mode,\ 498 lk_ksettings->link_modes.name); \ 499 } \ 500 } 501 502 #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \ 503 { \ 504 int i; \ 505 \ 506 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \ 507 if (test_bit(qed_lm_map[i].ethtool_link_mode, \ 508 lk_ksettings->link_modes.name)) \ 509 caps |= qed_lm_map[i].qed_link_mode; \ 510 } \ 511 } 512 513 static int qede_get_link_ksettings(struct net_device *dev, 514 struct ethtool_link_ksettings *cmd) 515 { 516 struct ethtool_link_settings *base = &cmd->base; 517 struct qede_dev *edev = netdev_priv(dev); 518 struct qed_link_output current_link; 519 520 __qede_lock(edev); 521 522 memset(¤t_link, 0, sizeof(current_link)); 523 edev->ops->common->get_link(edev->cdev, ¤t_link); 524 525 ethtool_link_ksettings_zero_link_mode(cmd, supported); 526 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported) 527 528 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 529 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising) 530 531 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 532 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising) 533 534 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) { 535 base->speed = current_link.speed; 536 base->duplex = current_link.duplex; 537 } else { 538 base->speed = SPEED_UNKNOWN; 539 base->duplex = DUPLEX_UNKNOWN; 540 } 541 542 __qede_unlock(edev); 543 544 base->port = current_link.port; 545 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE : 546 AUTONEG_DISABLE; 547 548 return 0; 549 } 550 551 static int qede_set_link_ksettings(struct net_device *dev, 552 const struct ethtool_link_ksettings *cmd) 553 { 554 const struct ethtool_link_settings *base = &cmd->base; 555 struct qede_dev *edev = netdev_priv(dev); 556 struct qed_link_output current_link; 557 struct qed_link_params params; 558 u32 sup_caps; 559 560 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 561 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 562 return -EOPNOTSUPP; 563 } 564 memset(¤t_link, 0, sizeof(current_link)); 565 memset(¶ms, 0, sizeof(params)); 566 edev->ops->common->get_link(edev->cdev, ¤t_link); 567 568 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS; 569 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG; 570 if (base->autoneg == AUTONEG_ENABLE) { 571 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 572 DP_INFO(edev, "Auto negotiation is not supported\n"); 573 return -EOPNOTSUPP; 574 } 575 576 params.autoneg = true; 577 params.forced_speed = 0; 578 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising) 579 } else { /* forced speed */ 580 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED; 581 params.autoneg = false; 582 params.forced_speed = base->speed; 583 switch (base->speed) { 584 case SPEED_1000: 585 sup_caps = QED_LM_1000baseT_Full_BIT | 586 QED_LM_1000baseKX_Full_BIT | 587 QED_LM_1000baseX_Full_BIT; 588 if (!(current_link.supported_caps & sup_caps)) { 589 DP_INFO(edev, "1G speed not supported\n"); 590 return -EINVAL; 591 } 592 params.adv_speeds = current_link.supported_caps & 593 sup_caps; 594 break; 595 case SPEED_10000: 596 sup_caps = QED_LM_10000baseT_Full_BIT | 597 QED_LM_10000baseKR_Full_BIT | 598 QED_LM_10000baseKX4_Full_BIT | 599 QED_LM_10000baseR_FEC_BIT | 600 QED_LM_10000baseCR_Full_BIT | 601 QED_LM_10000baseSR_Full_BIT | 602 QED_LM_10000baseLR_Full_BIT | 603 QED_LM_10000baseLRM_Full_BIT; 604 if (!(current_link.supported_caps & sup_caps)) { 605 DP_INFO(edev, "10G speed not supported\n"); 606 return -EINVAL; 607 } 608 params.adv_speeds = current_link.supported_caps & 609 sup_caps; 610 break; 611 case SPEED_20000: 612 if (!(current_link.supported_caps & 613 QED_LM_20000baseKR2_Full_BIT)) { 614 DP_INFO(edev, "20G speed not supported\n"); 615 return -EINVAL; 616 } 617 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT; 618 break; 619 case SPEED_25000: 620 sup_caps = QED_LM_25000baseKR_Full_BIT | 621 QED_LM_25000baseCR_Full_BIT | 622 QED_LM_25000baseSR_Full_BIT; 623 if (!(current_link.supported_caps & sup_caps)) { 624 DP_INFO(edev, "25G speed not supported\n"); 625 return -EINVAL; 626 } 627 params.adv_speeds = current_link.supported_caps & 628 sup_caps; 629 break; 630 case SPEED_40000: 631 sup_caps = QED_LM_40000baseLR4_Full_BIT | 632 QED_LM_40000baseKR4_Full_BIT | 633 QED_LM_40000baseCR4_Full_BIT | 634 QED_LM_40000baseSR4_Full_BIT; 635 if (!(current_link.supported_caps & sup_caps)) { 636 DP_INFO(edev, "40G speed not supported\n"); 637 return -EINVAL; 638 } 639 params.adv_speeds = current_link.supported_caps & 640 sup_caps; 641 break; 642 case SPEED_50000: 643 sup_caps = QED_LM_50000baseKR2_Full_BIT | 644 QED_LM_50000baseCR2_Full_BIT | 645 QED_LM_50000baseSR2_Full_BIT; 646 if (!(current_link.supported_caps & sup_caps)) { 647 DP_INFO(edev, "50G speed not supported\n"); 648 return -EINVAL; 649 } 650 params.adv_speeds = current_link.supported_caps & 651 sup_caps; 652 break; 653 case SPEED_100000: 654 sup_caps = QED_LM_100000baseKR4_Full_BIT | 655 QED_LM_100000baseSR4_Full_BIT | 656 QED_LM_100000baseCR4_Full_BIT | 657 QED_LM_100000baseLR4_ER4_Full_BIT; 658 if (!(current_link.supported_caps & sup_caps)) { 659 DP_INFO(edev, "100G speed not supported\n"); 660 return -EINVAL; 661 } 662 params.adv_speeds = current_link.supported_caps & 663 sup_caps; 664 break; 665 default: 666 DP_INFO(edev, "Unsupported speed %u\n", base->speed); 667 return -EINVAL; 668 } 669 } 670 671 params.link_up = true; 672 edev->ops->common->set_link(edev->cdev, ¶ms); 673 674 return 0; 675 } 676 677 static void qede_get_drvinfo(struct net_device *ndev, 678 struct ethtool_drvinfo *info) 679 { 680 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN]; 681 struct qede_dev *edev = netdev_priv(ndev); 682 char mbi[ETHTOOL_FWVERS_LEN]; 683 684 strlcpy(info->driver, "qede", sizeof(info->driver)); 685 686 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 687 edev->dev_info.common.fw_major, 688 edev->dev_info.common.fw_minor, 689 edev->dev_info.common.fw_rev, 690 edev->dev_info.common.fw_eng); 691 692 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d", 693 (edev->dev_info.common.mfw_rev >> 24) & 0xFF, 694 (edev->dev_info.common.mfw_rev >> 16) & 0xFF, 695 (edev->dev_info.common.mfw_rev >> 8) & 0xFF, 696 edev->dev_info.common.mfw_rev & 0xFF); 697 698 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) < 699 sizeof(info->version)) 700 snprintf(info->version, sizeof(info->version), 701 "%s [storm %s]", DRV_MODULE_VERSION, storm); 702 else 703 snprintf(info->version, sizeof(info->version), 704 "%s %s", DRV_MODULE_VERSION, storm); 705 706 if (edev->dev_info.common.mbi_version) { 707 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d", 708 (edev->dev_info.common.mbi_version & 709 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET, 710 (edev->dev_info.common.mbi_version & 711 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET, 712 (edev->dev_info.common.mbi_version & 713 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET); 714 snprintf(info->fw_version, sizeof(info->fw_version), 715 "mbi %s [mfw %s]", mbi, mfw); 716 } else { 717 snprintf(info->fw_version, sizeof(info->fw_version), 718 "mfw %s", mfw); 719 } 720 721 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info)); 722 } 723 724 static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 725 { 726 struct qede_dev *edev = netdev_priv(ndev); 727 728 if (edev->dev_info.common.wol_support) { 729 wol->supported = WAKE_MAGIC; 730 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0; 731 } 732 } 733 734 static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol) 735 { 736 struct qede_dev *edev = netdev_priv(ndev); 737 bool wol_requested; 738 int rc; 739 740 if (wol->wolopts & ~WAKE_MAGIC) { 741 DP_INFO(edev, 742 "Can't support WoL options other than magic-packet\n"); 743 return -EINVAL; 744 } 745 746 wol_requested = !!(wol->wolopts & WAKE_MAGIC); 747 if (wol_requested == edev->wol_enabled) 748 return 0; 749 750 /* Need to actually change configuration */ 751 if (!edev->dev_info.common.wol_support) { 752 DP_INFO(edev, "Device doesn't support WoL\n"); 753 return -EINVAL; 754 } 755 756 rc = edev->ops->common->update_wol(edev->cdev, wol_requested); 757 if (!rc) 758 edev->wol_enabled = wol_requested; 759 760 return rc; 761 } 762 763 static u32 qede_get_msglevel(struct net_device *ndev) 764 { 765 struct qede_dev *edev = netdev_priv(ndev); 766 767 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module; 768 } 769 770 static void qede_set_msglevel(struct net_device *ndev, u32 level) 771 { 772 struct qede_dev *edev = netdev_priv(ndev); 773 u32 dp_module = 0; 774 u8 dp_level = 0; 775 776 qede_config_debug(level, &dp_module, &dp_level); 777 778 edev->dp_level = dp_level; 779 edev->dp_module = dp_module; 780 edev->ops->common->update_msglvl(edev->cdev, 781 dp_module, dp_level); 782 } 783 784 static int qede_nway_reset(struct net_device *dev) 785 { 786 struct qede_dev *edev = netdev_priv(dev); 787 struct qed_link_output current_link; 788 struct qed_link_params link_params; 789 790 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 791 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 792 return -EOPNOTSUPP; 793 } 794 795 if (!netif_running(dev)) 796 return 0; 797 798 memset(¤t_link, 0, sizeof(current_link)); 799 edev->ops->common->get_link(edev->cdev, ¤t_link); 800 if (!current_link.link_up) 801 return 0; 802 803 /* Toggle the link */ 804 memset(&link_params, 0, sizeof(link_params)); 805 link_params.link_up = false; 806 edev->ops->common->set_link(edev->cdev, &link_params); 807 link_params.link_up = true; 808 edev->ops->common->set_link(edev->cdev, &link_params); 809 810 return 0; 811 } 812 813 static u32 qede_get_link(struct net_device *dev) 814 { 815 struct qede_dev *edev = netdev_priv(dev); 816 struct qed_link_output current_link; 817 818 memset(¤t_link, 0, sizeof(current_link)); 819 edev->ops->common->get_link(edev->cdev, ¤t_link); 820 821 return current_link.link_up; 822 } 823 824 static int qede_flash_device(struct net_device *dev, 825 struct ethtool_flash *flash) 826 { 827 struct qede_dev *edev = netdev_priv(dev); 828 829 return edev->ops->common->nvm_flash(edev->cdev, flash->data); 830 } 831 832 static int qede_get_coalesce(struct net_device *dev, 833 struct ethtool_coalesce *coal) 834 { 835 void *rx_handle = NULL, *tx_handle = NULL; 836 struct qede_dev *edev = netdev_priv(dev); 837 u16 rx_coal, tx_coal, i, rc = 0; 838 struct qede_fastpath *fp; 839 840 rx_coal = QED_DEFAULT_RX_USECS; 841 tx_coal = QED_DEFAULT_TX_USECS; 842 843 memset(coal, 0, sizeof(struct ethtool_coalesce)); 844 845 __qede_lock(edev); 846 if (edev->state == QEDE_STATE_OPEN) { 847 for_each_queue(i) { 848 fp = &edev->fp_array[i]; 849 850 if (fp->type & QEDE_FASTPATH_RX) { 851 rx_handle = fp->rxq->handle; 852 break; 853 } 854 } 855 856 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle); 857 if (rc) { 858 DP_INFO(edev, "Read Rx coalesce error\n"); 859 goto out; 860 } 861 862 for_each_queue(i) { 863 struct qede_tx_queue *txq; 864 865 fp = &edev->fp_array[i]; 866 867 /* All TX queues of given fastpath uses same 868 * coalescing value, so no need to iterate over 869 * all TCs, TC0 txq should suffice. 870 */ 871 if (fp->type & QEDE_FASTPATH_TX) { 872 txq = QEDE_FP_TC0_TXQ(fp); 873 tx_handle = txq->handle; 874 break; 875 } 876 } 877 878 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle); 879 if (rc) 880 DP_INFO(edev, "Read Tx coalesce error\n"); 881 } 882 883 out: 884 __qede_unlock(edev); 885 886 coal->rx_coalesce_usecs = rx_coal; 887 coal->tx_coalesce_usecs = tx_coal; 888 889 return rc; 890 } 891 892 static int qede_set_coalesce(struct net_device *dev, 893 struct ethtool_coalesce *coal) 894 { 895 struct qede_dev *edev = netdev_priv(dev); 896 struct qede_fastpath *fp; 897 int i, rc = 0; 898 u16 rxc, txc; 899 900 if (!netif_running(dev)) { 901 DP_INFO(edev, "Interface is down\n"); 902 return -EINVAL; 903 } 904 905 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX || 906 coal->tx_coalesce_usecs > QED_COALESCE_MAX) { 907 DP_INFO(edev, 908 "Can't support requested %s coalesce value [max supported value %d]\n", 909 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" : 910 "tx", QED_COALESCE_MAX); 911 return -EINVAL; 912 } 913 914 rxc = (u16)coal->rx_coalesce_usecs; 915 txc = (u16)coal->tx_coalesce_usecs; 916 for_each_queue(i) { 917 fp = &edev->fp_array[i]; 918 919 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 920 rc = edev->ops->common->set_coalesce(edev->cdev, 921 rxc, 0, 922 fp->rxq->handle); 923 if (rc) { 924 DP_INFO(edev, 925 "Set RX coalesce error, rc = %d\n", rc); 926 return rc; 927 } 928 } 929 930 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) { 931 struct qede_tx_queue *txq; 932 933 /* All TX queues of given fastpath uses same 934 * coalescing value, so no need to iterate over 935 * all TCs, TC0 txq should suffice. 936 */ 937 txq = QEDE_FP_TC0_TXQ(fp); 938 939 rc = edev->ops->common->set_coalesce(edev->cdev, 940 0, txc, 941 txq->handle); 942 if (rc) { 943 DP_INFO(edev, 944 "Set TX coalesce error, rc = %d\n", rc); 945 return rc; 946 } 947 } 948 } 949 950 return rc; 951 } 952 953 static void qede_get_ringparam(struct net_device *dev, 954 struct ethtool_ringparam *ering) 955 { 956 struct qede_dev *edev = netdev_priv(dev); 957 958 ering->rx_max_pending = NUM_RX_BDS_MAX; 959 ering->rx_pending = edev->q_num_rx_buffers; 960 ering->tx_max_pending = NUM_TX_BDS_MAX; 961 ering->tx_pending = edev->q_num_tx_buffers; 962 } 963 964 static int qede_set_ringparam(struct net_device *dev, 965 struct ethtool_ringparam *ering) 966 { 967 struct qede_dev *edev = netdev_priv(dev); 968 969 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 970 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n", 971 ering->rx_pending, ering->tx_pending); 972 973 /* Validate legality of configuration */ 974 if (ering->rx_pending > NUM_RX_BDS_MAX || 975 ering->rx_pending < NUM_RX_BDS_MIN || 976 ering->tx_pending > NUM_TX_BDS_MAX || 977 ering->tx_pending < NUM_TX_BDS_MIN) { 978 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 979 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n", 980 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX, 981 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX); 982 return -EINVAL; 983 } 984 985 /* Change ring size and re-load */ 986 edev->q_num_rx_buffers = ering->rx_pending; 987 edev->q_num_tx_buffers = ering->tx_pending; 988 989 qede_reload(edev, NULL, false); 990 991 return 0; 992 } 993 994 static void qede_get_pauseparam(struct net_device *dev, 995 struct ethtool_pauseparam *epause) 996 { 997 struct qede_dev *edev = netdev_priv(dev); 998 struct qed_link_output current_link; 999 1000 memset(¤t_link, 0, sizeof(current_link)); 1001 edev->ops->common->get_link(edev->cdev, ¤t_link); 1002 1003 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE) 1004 epause->autoneg = true; 1005 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE) 1006 epause->rx_pause = true; 1007 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE) 1008 epause->tx_pause = true; 1009 1010 DP_VERBOSE(edev, QED_MSG_DEBUG, 1011 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n", 1012 epause->cmd, epause->autoneg, epause->rx_pause, 1013 epause->tx_pause); 1014 } 1015 1016 static int qede_set_pauseparam(struct net_device *dev, 1017 struct ethtool_pauseparam *epause) 1018 { 1019 struct qede_dev *edev = netdev_priv(dev); 1020 struct qed_link_params params; 1021 struct qed_link_output current_link; 1022 1023 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) { 1024 DP_INFO(edev, 1025 "Pause settings are not allowed to be changed\n"); 1026 return -EOPNOTSUPP; 1027 } 1028 1029 memset(¤t_link, 0, sizeof(current_link)); 1030 edev->ops->common->get_link(edev->cdev, ¤t_link); 1031 1032 memset(¶ms, 0, sizeof(params)); 1033 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG; 1034 if (epause->autoneg) { 1035 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) { 1036 DP_INFO(edev, "autoneg not supported\n"); 1037 return -EINVAL; 1038 } 1039 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE; 1040 } 1041 if (epause->rx_pause) 1042 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE; 1043 if (epause->tx_pause) 1044 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE; 1045 1046 params.link_up = true; 1047 edev->ops->common->set_link(edev->cdev, ¶ms); 1048 1049 return 0; 1050 } 1051 1052 static void qede_get_regs(struct net_device *ndev, 1053 struct ethtool_regs *regs, void *buffer) 1054 { 1055 struct qede_dev *edev = netdev_priv(ndev); 1056 1057 regs->version = 0; 1058 memset(buffer, 0, regs->len); 1059 1060 if (edev->ops && edev->ops->common) 1061 edev->ops->common->dbg_all_data(edev->cdev, buffer); 1062 } 1063 1064 static int qede_get_regs_len(struct net_device *ndev) 1065 { 1066 struct qede_dev *edev = netdev_priv(ndev); 1067 1068 if (edev->ops && edev->ops->common) 1069 return edev->ops->common->dbg_all_data_size(edev->cdev); 1070 else 1071 return -EINVAL; 1072 } 1073 1074 static void qede_update_mtu(struct qede_dev *edev, 1075 struct qede_reload_args *args) 1076 { 1077 edev->ndev->mtu = args->u.mtu; 1078 } 1079 1080 /* Netdevice NDOs */ 1081 int qede_change_mtu(struct net_device *ndev, int new_mtu) 1082 { 1083 struct qede_dev *edev = netdev_priv(ndev); 1084 struct qede_reload_args args; 1085 1086 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1087 "Configuring MTU size of %d\n", new_mtu); 1088 1089 if (new_mtu > PAGE_SIZE) 1090 ndev->features &= ~NETIF_F_GRO_HW; 1091 1092 /* Set the mtu field and re-start the interface if needed */ 1093 args.u.mtu = new_mtu; 1094 args.func = &qede_update_mtu; 1095 qede_reload(edev, &args, false); 1096 1097 edev->ops->common->update_mtu(edev->cdev, new_mtu); 1098 1099 return 0; 1100 } 1101 1102 static void qede_get_channels(struct net_device *dev, 1103 struct ethtool_channels *channels) 1104 { 1105 struct qede_dev *edev = netdev_priv(dev); 1106 1107 channels->max_combined = QEDE_MAX_RSS_CNT(edev); 1108 channels->max_rx = QEDE_MAX_RSS_CNT(edev); 1109 channels->max_tx = QEDE_MAX_RSS_CNT(edev); 1110 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx - 1111 edev->fp_num_rx; 1112 channels->tx_count = edev->fp_num_tx; 1113 channels->rx_count = edev->fp_num_rx; 1114 } 1115 1116 static int qede_set_channels(struct net_device *dev, 1117 struct ethtool_channels *channels) 1118 { 1119 struct qede_dev *edev = netdev_priv(dev); 1120 u32 count; 1121 1122 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1123 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n", 1124 channels->rx_count, channels->tx_count, 1125 channels->other_count, channels->combined_count); 1126 1127 count = channels->rx_count + channels->tx_count + 1128 channels->combined_count; 1129 1130 /* We don't support `other' channels */ 1131 if (channels->other_count) { 1132 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1133 "command parameters not supported\n"); 1134 return -EINVAL; 1135 } 1136 1137 if (!(channels->combined_count || (channels->rx_count && 1138 channels->tx_count))) { 1139 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1140 "need to request at least one transmit and one receive channel\n"); 1141 return -EINVAL; 1142 } 1143 1144 if (count > QEDE_MAX_RSS_CNT(edev)) { 1145 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1146 "requested channels = %d max supported channels = %d\n", 1147 count, QEDE_MAX_RSS_CNT(edev)); 1148 return -EINVAL; 1149 } 1150 1151 /* Check if there was a change in the active parameters */ 1152 if ((count == QEDE_QUEUE_CNT(edev)) && 1153 (channels->tx_count == edev->fp_num_tx) && 1154 (channels->rx_count == edev->fp_num_rx)) { 1155 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1156 "No change in active parameters\n"); 1157 return 0; 1158 } 1159 1160 /* We need the number of queues to be divisible between the hwfns */ 1161 if ((count % edev->dev_info.common.num_hwfns) || 1162 (channels->tx_count % edev->dev_info.common.num_hwfns) || 1163 (channels->rx_count % edev->dev_info.common.num_hwfns)) { 1164 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), 1165 "Number of channels must be divisible by %04x\n", 1166 edev->dev_info.common.num_hwfns); 1167 return -EINVAL; 1168 } 1169 1170 /* Set number of queues and reload if necessary */ 1171 edev->req_queues = count; 1172 edev->req_num_tx = channels->tx_count; 1173 edev->req_num_rx = channels->rx_count; 1174 /* Reset the indirection table if rx queue count is updated */ 1175 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) { 1176 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED; 1177 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table)); 1178 } 1179 1180 qede_reload(edev, NULL, false); 1181 1182 return 0; 1183 } 1184 1185 static int qede_get_ts_info(struct net_device *dev, 1186 struct ethtool_ts_info *info) 1187 { 1188 struct qede_dev *edev = netdev_priv(dev); 1189 1190 return qede_ptp_get_ts_info(edev, info); 1191 } 1192 1193 static int qede_set_phys_id(struct net_device *dev, 1194 enum ethtool_phys_id_state state) 1195 { 1196 struct qede_dev *edev = netdev_priv(dev); 1197 u8 led_state = 0; 1198 1199 switch (state) { 1200 case ETHTOOL_ID_ACTIVE: 1201 return 1; /* cycle on/off once per second */ 1202 1203 case ETHTOOL_ID_ON: 1204 led_state = QED_LED_MODE_ON; 1205 break; 1206 1207 case ETHTOOL_ID_OFF: 1208 led_state = QED_LED_MODE_OFF; 1209 break; 1210 1211 case ETHTOOL_ID_INACTIVE: 1212 led_state = QED_LED_MODE_RESTORE; 1213 break; 1214 } 1215 1216 edev->ops->common->set_led(edev->cdev, led_state); 1217 1218 return 0; 1219 } 1220 1221 static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1222 { 1223 info->data = RXH_IP_SRC | RXH_IP_DST; 1224 1225 switch (info->flow_type) { 1226 case TCP_V4_FLOW: 1227 case TCP_V6_FLOW: 1228 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1229 break; 1230 case UDP_V4_FLOW: 1231 if (edev->rss_caps & QED_RSS_IPV4_UDP) 1232 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1233 break; 1234 case UDP_V6_FLOW: 1235 if (edev->rss_caps & QED_RSS_IPV6_UDP) 1236 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 1237 break; 1238 case IPV4_FLOW: 1239 case IPV6_FLOW: 1240 break; 1241 default: 1242 info->data = 0; 1243 break; 1244 } 1245 1246 return 0; 1247 } 1248 1249 static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info, 1250 u32 *rule_locs) 1251 { 1252 struct qede_dev *edev = netdev_priv(dev); 1253 int rc = 0; 1254 1255 switch (info->cmd) { 1256 case ETHTOOL_GRXRINGS: 1257 info->data = QEDE_RSS_COUNT(edev); 1258 break; 1259 case ETHTOOL_GRXFH: 1260 rc = qede_get_rss_flags(edev, info); 1261 break; 1262 case ETHTOOL_GRXCLSRLCNT: 1263 info->rule_cnt = qede_get_arfs_filter_count(edev); 1264 info->data = QEDE_RFS_MAX_FLTR; 1265 break; 1266 case ETHTOOL_GRXCLSRULE: 1267 rc = qede_get_cls_rule_entry(edev, info); 1268 break; 1269 case ETHTOOL_GRXCLSRLALL: 1270 rc = qede_get_cls_rule_all(edev, info, rule_locs); 1271 break; 1272 default: 1273 DP_ERR(edev, "Command parameters not supported\n"); 1274 rc = -EOPNOTSUPP; 1275 } 1276 1277 return rc; 1278 } 1279 1280 static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info) 1281 { 1282 struct qed_update_vport_params *vport_update_params; 1283 u8 set_caps = 0, clr_caps = 0; 1284 int rc = 0; 1285 1286 DP_VERBOSE(edev, QED_MSG_DEBUG, 1287 "Set rss flags command parameters: flow type = %d, data = %llu\n", 1288 info->flow_type, info->data); 1289 1290 switch (info->flow_type) { 1291 case TCP_V4_FLOW: 1292 case TCP_V6_FLOW: 1293 /* For TCP only 4-tuple hash is supported */ 1294 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST | 1295 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1296 DP_INFO(edev, "Command parameters not supported\n"); 1297 return -EINVAL; 1298 } 1299 return 0; 1300 case UDP_V4_FLOW: 1301 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1302 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1303 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1304 set_caps = QED_RSS_IPV4_UDP; 1305 DP_VERBOSE(edev, QED_MSG_DEBUG, 1306 "UDP 4-tuple enabled\n"); 1307 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1308 clr_caps = QED_RSS_IPV4_UDP; 1309 DP_VERBOSE(edev, QED_MSG_DEBUG, 1310 "UDP 4-tuple disabled\n"); 1311 } else { 1312 return -EINVAL; 1313 } 1314 break; 1315 case UDP_V6_FLOW: 1316 /* For UDP either 2-tuple hash or 4-tuple hash is supported */ 1317 if (info->data == (RXH_IP_SRC | RXH_IP_DST | 1318 RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 1319 set_caps = QED_RSS_IPV6_UDP; 1320 DP_VERBOSE(edev, QED_MSG_DEBUG, 1321 "UDP 4-tuple enabled\n"); 1322 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) { 1323 clr_caps = QED_RSS_IPV6_UDP; 1324 DP_VERBOSE(edev, QED_MSG_DEBUG, 1325 "UDP 4-tuple disabled\n"); 1326 } else { 1327 return -EINVAL; 1328 } 1329 break; 1330 case IPV4_FLOW: 1331 case IPV6_FLOW: 1332 /* For IP only 2-tuple hash is supported */ 1333 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) { 1334 DP_INFO(edev, "Command parameters not supported\n"); 1335 return -EINVAL; 1336 } 1337 return 0; 1338 case SCTP_V4_FLOW: 1339 case AH_ESP_V4_FLOW: 1340 case AH_V4_FLOW: 1341 case ESP_V4_FLOW: 1342 case SCTP_V6_FLOW: 1343 case AH_ESP_V6_FLOW: 1344 case AH_V6_FLOW: 1345 case ESP_V6_FLOW: 1346 case IP_USER_FLOW: 1347 case ETHER_FLOW: 1348 /* RSS is not supported for these protocols */ 1349 if (info->data) { 1350 DP_INFO(edev, "Command parameters not supported\n"); 1351 return -EINVAL; 1352 } 1353 return 0; 1354 default: 1355 return -EINVAL; 1356 } 1357 1358 /* No action is needed if there is no change in the rss capability */ 1359 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps)) 1360 return 0; 1361 1362 /* Update internal configuration */ 1363 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps); 1364 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; 1365 1366 /* Re-configure if possible */ 1367 __qede_lock(edev); 1368 if (edev->state == QEDE_STATE_OPEN) { 1369 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1370 if (!vport_update_params) { 1371 __qede_unlock(edev); 1372 return -ENOMEM; 1373 } 1374 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1375 &vport_update_params->update_rss_flg); 1376 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1377 vfree(vport_update_params); 1378 } 1379 __qede_unlock(edev); 1380 1381 return rc; 1382 } 1383 1384 static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info) 1385 { 1386 struct qede_dev *edev = netdev_priv(dev); 1387 int rc; 1388 1389 switch (info->cmd) { 1390 case ETHTOOL_SRXFH: 1391 rc = qede_set_rss_flags(edev, info); 1392 break; 1393 case ETHTOOL_SRXCLSRLINS: 1394 rc = qede_add_cls_rule(edev, info); 1395 break; 1396 case ETHTOOL_SRXCLSRLDEL: 1397 rc = qede_delete_flow_filter(edev, info->fs.location); 1398 break; 1399 default: 1400 DP_INFO(edev, "Command parameters not supported\n"); 1401 rc = -EOPNOTSUPP; 1402 } 1403 1404 return rc; 1405 } 1406 1407 static u32 qede_get_rxfh_indir_size(struct net_device *dev) 1408 { 1409 return QED_RSS_IND_TABLE_SIZE; 1410 } 1411 1412 static u32 qede_get_rxfh_key_size(struct net_device *dev) 1413 { 1414 struct qede_dev *edev = netdev_priv(dev); 1415 1416 return sizeof(edev->rss_key); 1417 } 1418 1419 static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc) 1420 { 1421 struct qede_dev *edev = netdev_priv(dev); 1422 int i; 1423 1424 if (hfunc) 1425 *hfunc = ETH_RSS_HASH_TOP; 1426 1427 if (!indir) 1428 return 0; 1429 1430 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1431 indir[i] = edev->rss_ind_table[i]; 1432 1433 if (key) 1434 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev)); 1435 1436 return 0; 1437 } 1438 1439 static int qede_set_rxfh(struct net_device *dev, const u32 *indir, 1440 const u8 *key, const u8 hfunc) 1441 { 1442 struct qed_update_vport_params *vport_update_params; 1443 struct qede_dev *edev = netdev_priv(dev); 1444 int i, rc = 0; 1445 1446 if (edev->dev_info.common.num_hwfns > 1) { 1447 DP_INFO(edev, 1448 "RSS configuration is not supported for 100G devices\n"); 1449 return -EOPNOTSUPP; 1450 } 1451 1452 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) 1453 return -EOPNOTSUPP; 1454 1455 if (!indir && !key) 1456 return 0; 1457 1458 if (indir) { 1459 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) 1460 edev->rss_ind_table[i] = indir[i]; 1461 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; 1462 } 1463 1464 if (key) { 1465 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev)); 1466 edev->rss_params_inited |= QEDE_RSS_KEY_INITED; 1467 } 1468 1469 __qede_lock(edev); 1470 if (edev->state == QEDE_STATE_OPEN) { 1471 vport_update_params = vzalloc(sizeof(*vport_update_params)); 1472 if (!vport_update_params) { 1473 __qede_unlock(edev); 1474 return -ENOMEM; 1475 } 1476 qede_fill_rss_params(edev, &vport_update_params->rss_params, 1477 &vport_update_params->update_rss_flg); 1478 rc = edev->ops->vport_update(edev->cdev, vport_update_params); 1479 vfree(vport_update_params); 1480 } 1481 __qede_unlock(edev); 1482 1483 return rc; 1484 } 1485 1486 /* This function enables the interrupt generation and the NAPI on the device */ 1487 static void qede_netif_start(struct qede_dev *edev) 1488 { 1489 int i; 1490 1491 if (!netif_running(edev->ndev)) 1492 return; 1493 1494 for_each_queue(i) { 1495 /* Update and reenable interrupts */ 1496 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1); 1497 napi_enable(&edev->fp_array[i].napi); 1498 } 1499 } 1500 1501 /* This function disables the NAPI and the interrupt generation on the device */ 1502 static void qede_netif_stop(struct qede_dev *edev) 1503 { 1504 int i; 1505 1506 for_each_queue(i) { 1507 napi_disable(&edev->fp_array[i].napi); 1508 /* Disable interrupts */ 1509 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0); 1510 } 1511 } 1512 1513 static int qede_selftest_transmit_traffic(struct qede_dev *edev, 1514 struct sk_buff *skb) 1515 { 1516 struct qede_tx_queue *txq = NULL; 1517 struct eth_tx_1st_bd *first_bd; 1518 dma_addr_t mapping; 1519 int i, idx; 1520 u16 val; 1521 1522 for_each_queue(i) { 1523 struct qede_fastpath *fp = &edev->fp_array[i]; 1524 1525 if (fp->type & QEDE_FASTPATH_TX) { 1526 txq = QEDE_FP_TC0_TXQ(fp); 1527 break; 1528 } 1529 } 1530 1531 if (!txq) { 1532 DP_NOTICE(edev, "Tx path is not available\n"); 1533 return -1; 1534 } 1535 1536 /* Fill the entry in the SW ring and the BDs in the FW ring */ 1537 idx = txq->sw_tx_prod; 1538 txq->sw_tx_ring.skbs[idx].skb = skb; 1539 first_bd = qed_chain_produce(&txq->tx_pbl); 1540 memset(first_bd, 0, sizeof(*first_bd)); 1541 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; 1542 first_bd->data.bd_flags.bitfields = val; 1543 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK; 1544 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT; 1545 first_bd->data.bitfields |= cpu_to_le16(val); 1546 1547 /* Map skb linear data for DMA and set in the first BD */ 1548 mapping = dma_map_single(&edev->pdev->dev, skb->data, 1549 skb_headlen(skb), DMA_TO_DEVICE); 1550 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { 1551 DP_NOTICE(edev, "SKB mapping failed\n"); 1552 return -ENOMEM; 1553 } 1554 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); 1555 1556 /* update the first BD with the actual num BDs */ 1557 first_bd->data.nbds = 1; 1558 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers; 1559 /* 'next page' entries are counted in the producer value */ 1560 val = qed_chain_get_prod_idx(&txq->tx_pbl); 1561 txq->tx_db.data.bd_prod = cpu_to_le16(val); 1562 1563 /* wmb makes sure that the BDs data is updated before updating the 1564 * producer, otherwise FW may read old data from the BDs. 1565 */ 1566 wmb(); 1567 barrier(); 1568 writel(txq->tx_db.raw, txq->doorbell_addr); 1569 1570 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) { 1571 if (qede_txq_has_work(txq)) 1572 break; 1573 usleep_range(100, 200); 1574 } 1575 1576 if (!qede_txq_has_work(txq)) { 1577 DP_NOTICE(edev, "Tx completion didn't happen\n"); 1578 return -1; 1579 } 1580 1581 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); 1582 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), 1583 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE); 1584 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers; 1585 txq->sw_tx_ring.skbs[idx].skb = NULL; 1586 1587 return 0; 1588 } 1589 1590 static int qede_selftest_receive_traffic(struct qede_dev *edev) 1591 { 1592 u16 sw_rx_index, len; 1593 struct eth_fast_path_rx_reg_cqe *fp_cqe; 1594 struct qede_rx_queue *rxq = NULL; 1595 struct sw_rx_data *sw_rx_data; 1596 union eth_rx_cqe *cqe; 1597 int i, iter, rc = 0; 1598 u8 *data_ptr; 1599 1600 for_each_queue(i) { 1601 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) { 1602 rxq = edev->fp_array[i].rxq; 1603 break; 1604 } 1605 } 1606 1607 if (!rxq) { 1608 DP_NOTICE(edev, "Rx path is not available\n"); 1609 return -1; 1610 } 1611 1612 /* The packet is expected to receive on rx-queue 0 even though RSS is 1613 * enabled. This is because the queue 0 is configured as the default 1614 * queue and that the loopback traffic is not IP. 1615 */ 1616 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) { 1617 if (!qede_has_rx_work(rxq)) { 1618 usleep_range(100, 200); 1619 continue; 1620 } 1621 1622 /* Get the CQE from the completion ring */ 1623 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring); 1624 1625 /* Get the data from the SW ring */ 1626 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; 1627 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; 1628 fp_cqe = &cqe->fast_path_regular; 1629 len = le16_to_cpu(fp_cqe->len_on_first_bd); 1630 data_ptr = (u8 *)(page_address(sw_rx_data->data) + 1631 fp_cqe->placement_offset + 1632 sw_rx_data->page_offset + 1633 rxq->rx_headroom); 1634 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) && 1635 ether_addr_equal(data_ptr + ETH_ALEN, 1636 edev->ndev->dev_addr)) { 1637 for (i = ETH_HLEN; i < len; i++) 1638 if (data_ptr[i] != (unsigned char)(i & 0xff)) { 1639 rc = -1; 1640 break; 1641 } 1642 1643 qede_recycle_rx_bd_ring(rxq, 1); 1644 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1645 break; 1646 } 1647 1648 DP_INFO(edev, "Not the transmitted packet\n"); 1649 qede_recycle_rx_bd_ring(rxq, 1); 1650 qed_chain_recycle_consumed(&rxq->rx_comp_ring); 1651 } 1652 1653 if (iter == QEDE_SELFTEST_POLL_COUNT) { 1654 DP_NOTICE(edev, "Failed to receive the traffic\n"); 1655 return -1; 1656 } 1657 1658 qede_update_rx_prod(edev, rxq); 1659 1660 return rc; 1661 } 1662 1663 static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode) 1664 { 1665 struct qed_link_params link_params; 1666 struct sk_buff *skb = NULL; 1667 int rc = 0, i; 1668 u32 pkt_size; 1669 u8 *packet; 1670 1671 if (!netif_running(edev->ndev)) { 1672 DP_NOTICE(edev, "Interface is down\n"); 1673 return -EINVAL; 1674 } 1675 1676 qede_netif_stop(edev); 1677 1678 /* Bring up the link in Loopback mode */ 1679 memset(&link_params, 0, sizeof(link_params)); 1680 link_params.link_up = true; 1681 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1682 link_params.loopback_mode = loopback_mode; 1683 edev->ops->common->set_link(edev->cdev, &link_params); 1684 1685 /* Wait for loopback configuration to apply */ 1686 msleep_interruptible(500); 1687 1688 /* Setting max packet size to 1.5K to avoid data being split over 1689 * multiple BDs in cases where MTU > PAGE_SIZE. 1690 */ 1691 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ? 1692 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN); 1693 1694 skb = netdev_alloc_skb(edev->ndev, pkt_size); 1695 if (!skb) { 1696 DP_INFO(edev, "Can't allocate skb\n"); 1697 rc = -ENOMEM; 1698 goto test_loopback_exit; 1699 } 1700 packet = skb_put(skb, pkt_size); 1701 ether_addr_copy(packet, edev->ndev->dev_addr); 1702 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr); 1703 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN))); 1704 for (i = ETH_HLEN; i < pkt_size; i++) 1705 packet[i] = (unsigned char)(i & 0xff); 1706 1707 rc = qede_selftest_transmit_traffic(edev, skb); 1708 if (rc) 1709 goto test_loopback_exit; 1710 1711 rc = qede_selftest_receive_traffic(edev); 1712 if (rc) 1713 goto test_loopback_exit; 1714 1715 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n"); 1716 1717 test_loopback_exit: 1718 dev_kfree_skb(skb); 1719 1720 /* Bring up the link in Normal mode */ 1721 memset(&link_params, 0, sizeof(link_params)); 1722 link_params.link_up = true; 1723 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE; 1724 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE; 1725 edev->ops->common->set_link(edev->cdev, &link_params); 1726 1727 /* Wait for loopback configuration to apply */ 1728 msleep_interruptible(500); 1729 1730 qede_netif_start(edev); 1731 1732 return rc; 1733 } 1734 1735 static void qede_self_test(struct net_device *dev, 1736 struct ethtool_test *etest, u64 *buf) 1737 { 1738 struct qede_dev *edev = netdev_priv(dev); 1739 1740 DP_VERBOSE(edev, QED_MSG_DEBUG, 1741 "Self-test command parameters: offline = %d, external_lb = %d\n", 1742 (etest->flags & ETH_TEST_FL_OFFLINE), 1743 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2); 1744 1745 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX); 1746 1747 if (etest->flags & ETH_TEST_FL_OFFLINE) { 1748 if (qede_selftest_run_loopback(edev, 1749 QED_LINK_LOOPBACK_INT_PHY)) { 1750 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1; 1751 etest->flags |= ETH_TEST_FL_FAILED; 1752 } 1753 } 1754 1755 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) { 1756 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1; 1757 etest->flags |= ETH_TEST_FL_FAILED; 1758 } 1759 1760 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) { 1761 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1; 1762 etest->flags |= ETH_TEST_FL_FAILED; 1763 } 1764 1765 if (edev->ops->common->selftest->selftest_register(edev->cdev)) { 1766 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1; 1767 etest->flags |= ETH_TEST_FL_FAILED; 1768 } 1769 1770 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) { 1771 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1; 1772 etest->flags |= ETH_TEST_FL_FAILED; 1773 } 1774 1775 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) { 1776 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1; 1777 etest->flags |= ETH_TEST_FL_FAILED; 1778 } 1779 } 1780 1781 static int qede_set_tunable(struct net_device *dev, 1782 const struct ethtool_tunable *tuna, 1783 const void *data) 1784 { 1785 struct qede_dev *edev = netdev_priv(dev); 1786 u32 val; 1787 1788 switch (tuna->id) { 1789 case ETHTOOL_RX_COPYBREAK: 1790 val = *(u32 *)data; 1791 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) { 1792 DP_VERBOSE(edev, QED_MSG_DEBUG, 1793 "Invalid rx copy break value, range is [%u, %u]", 1794 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE); 1795 return -EINVAL; 1796 } 1797 1798 edev->rx_copybreak = *(u32 *)data; 1799 break; 1800 default: 1801 return -EOPNOTSUPP; 1802 } 1803 1804 return 0; 1805 } 1806 1807 static int qede_get_tunable(struct net_device *dev, 1808 const struct ethtool_tunable *tuna, void *data) 1809 { 1810 struct qede_dev *edev = netdev_priv(dev); 1811 1812 switch (tuna->id) { 1813 case ETHTOOL_RX_COPYBREAK: 1814 *(u32 *)data = edev->rx_copybreak; 1815 break; 1816 default: 1817 return -EOPNOTSUPP; 1818 } 1819 1820 return 0; 1821 } 1822 1823 static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata) 1824 { 1825 struct qede_dev *edev = netdev_priv(dev); 1826 struct qed_link_output current_link; 1827 1828 memset(¤t_link, 0, sizeof(current_link)); 1829 edev->ops->common->get_link(edev->cdev, ¤t_link); 1830 1831 if (!current_link.eee_supported) { 1832 DP_INFO(edev, "EEE is not supported\n"); 1833 return -EOPNOTSUPP; 1834 } 1835 1836 if (current_link.eee.adv_caps & QED_EEE_1G_ADV) 1837 edata->advertised = ADVERTISED_1000baseT_Full; 1838 if (current_link.eee.adv_caps & QED_EEE_10G_ADV) 1839 edata->advertised |= ADVERTISED_10000baseT_Full; 1840 if (current_link.sup_caps & QED_EEE_1G_ADV) 1841 edata->supported = ADVERTISED_1000baseT_Full; 1842 if (current_link.sup_caps & QED_EEE_10G_ADV) 1843 edata->supported |= ADVERTISED_10000baseT_Full; 1844 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV) 1845 edata->lp_advertised = ADVERTISED_1000baseT_Full; 1846 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV) 1847 edata->lp_advertised |= ADVERTISED_10000baseT_Full; 1848 1849 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer; 1850 edata->eee_enabled = current_link.eee.enable; 1851 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable; 1852 edata->eee_active = current_link.eee_active; 1853 1854 return 0; 1855 } 1856 1857 static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata) 1858 { 1859 struct qede_dev *edev = netdev_priv(dev); 1860 struct qed_link_output current_link; 1861 struct qed_link_params params; 1862 1863 if (!edev->ops->common->can_link_change(edev->cdev)) { 1864 DP_INFO(edev, "Link settings are not allowed to be changed\n"); 1865 return -EOPNOTSUPP; 1866 } 1867 1868 memset(¤t_link, 0, sizeof(current_link)); 1869 edev->ops->common->get_link(edev->cdev, ¤t_link); 1870 1871 if (!current_link.eee_supported) { 1872 DP_INFO(edev, "EEE is not supported\n"); 1873 return -EOPNOTSUPP; 1874 } 1875 1876 memset(¶ms, 0, sizeof(params)); 1877 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG; 1878 1879 if (!(edata->advertised & (ADVERTISED_1000baseT_Full | 1880 ADVERTISED_10000baseT_Full)) || 1881 ((edata->advertised & (ADVERTISED_1000baseT_Full | 1882 ADVERTISED_10000baseT_Full)) != 1883 edata->advertised)) { 1884 DP_VERBOSE(edev, QED_MSG_DEBUG, 1885 "Invalid advertised capabilities %d\n", 1886 edata->advertised); 1887 return -EINVAL; 1888 } 1889 1890 if (edata->advertised & ADVERTISED_1000baseT_Full) 1891 params.eee.adv_caps = QED_EEE_1G_ADV; 1892 if (edata->advertised & ADVERTISED_10000baseT_Full) 1893 params.eee.adv_caps |= QED_EEE_10G_ADV; 1894 params.eee.enable = edata->eee_enabled; 1895 params.eee.tx_lpi_enable = edata->tx_lpi_enabled; 1896 params.eee.tx_lpi_timer = edata->tx_lpi_timer; 1897 1898 params.link_up = true; 1899 edev->ops->common->set_link(edev->cdev, ¶ms); 1900 1901 return 0; 1902 } 1903 1904 static int qede_get_module_info(struct net_device *dev, 1905 struct ethtool_modinfo *modinfo) 1906 { 1907 struct qede_dev *edev = netdev_priv(dev); 1908 u8 buf[4]; 1909 int rc; 1910 1911 /* Read first 4 bytes to find the sfp type */ 1912 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1913 QED_I2C_DEV_ADDR_A0, 0, 4); 1914 if (rc) { 1915 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc); 1916 return rc; 1917 } 1918 1919 switch (buf[0]) { 1920 case 0x3: /* SFP, SFP+, SFP-28 */ 1921 modinfo->type = ETH_MODULE_SFF_8472; 1922 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 1923 break; 1924 case 0xc: /* QSFP */ 1925 case 0xd: /* QSFP+ */ 1926 modinfo->type = ETH_MODULE_SFF_8436; 1927 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN; 1928 break; 1929 case 0x11: /* QSFP-28 */ 1930 modinfo->type = ETH_MODULE_SFF_8636; 1931 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN; 1932 break; 1933 default: 1934 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]); 1935 return -EINVAL; 1936 } 1937 1938 return 0; 1939 } 1940 1941 static int qede_get_module_eeprom(struct net_device *dev, 1942 struct ethtool_eeprom *ee, u8 *data) 1943 { 1944 struct qede_dev *edev = netdev_priv(dev); 1945 u32 start_addr = ee->offset, size = 0; 1946 u8 *buf = data; 1947 int rc = 0; 1948 1949 /* Read A0 section */ 1950 if (ee->offset < ETH_MODULE_SFF_8079_LEN) { 1951 /* Limit transfer size to the A0 section boundary */ 1952 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN) 1953 size = ETH_MODULE_SFF_8079_LEN - ee->offset; 1954 else 1955 size = ee->len; 1956 1957 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1958 QED_I2C_DEV_ADDR_A0, 1959 start_addr, size); 1960 if (rc) { 1961 DP_ERR(edev, "Failed reading A0 section %d\n", rc); 1962 return rc; 1963 } 1964 1965 buf += size; 1966 start_addr += size; 1967 } 1968 1969 /* Read A2 section */ 1970 if (start_addr >= ETH_MODULE_SFF_8079_LEN && 1971 start_addr < ETH_MODULE_SFF_8472_LEN) { 1972 size = ee->len - size; 1973 /* Limit transfer size to the A2 section boundary */ 1974 if (start_addr + size > ETH_MODULE_SFF_8472_LEN) 1975 size = ETH_MODULE_SFF_8472_LEN - start_addr; 1976 start_addr -= ETH_MODULE_SFF_8079_LEN; 1977 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf, 1978 QED_I2C_DEV_ADDR_A2, 1979 start_addr, size); 1980 if (rc) { 1981 DP_VERBOSE(edev, QED_MSG_DEBUG, 1982 "Failed reading A2 section %d\n", rc); 1983 return 0; 1984 } 1985 } 1986 1987 return rc; 1988 } 1989 1990 static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val) 1991 { 1992 struct qede_dev *edev = netdev_priv(dev); 1993 int rc = 0; 1994 1995 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) { 1996 if (val->flag > QEDE_DUMP_CMD_MAX) { 1997 DP_ERR(edev, "Invalid command %d\n", val->flag); 1998 return -EINVAL; 1999 } 2000 edev->dump_info.cmd = val->flag; 2001 edev->dump_info.num_args = 0; 2002 return 0; 2003 } 2004 2005 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) { 2006 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args); 2007 return -EINVAL; 2008 } 2009 2010 switch (edev->dump_info.cmd) { 2011 case QEDE_DUMP_CMD_NVM_CFG: 2012 edev->dump_info.args[edev->dump_info.num_args] = val->flag; 2013 edev->dump_info.num_args++; 2014 break; 2015 case QEDE_DUMP_CMD_GRCDUMP: 2016 rc = edev->ops->common->set_grc_config(edev->cdev, 2017 val->flag, 1); 2018 break; 2019 default: 2020 break; 2021 } 2022 2023 return rc; 2024 } 2025 2026 static int qede_get_dump_flag(struct net_device *dev, 2027 struct ethtool_dump *dump) 2028 { 2029 struct qede_dev *edev = netdev_priv(dev); 2030 2031 if (!edev->ops || !edev->ops->common) { 2032 DP_ERR(edev, "Edev ops not populated\n"); 2033 return -EINVAL; 2034 } 2035 2036 dump->version = QEDE_DUMP_VERSION; 2037 switch (edev->dump_info.cmd) { 2038 case QEDE_DUMP_CMD_NVM_CFG: 2039 dump->flag = QEDE_DUMP_CMD_NVM_CFG; 2040 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev, 2041 edev->dump_info.args[0]); 2042 break; 2043 case QEDE_DUMP_CMD_GRCDUMP: 2044 dump->flag = QEDE_DUMP_CMD_GRCDUMP; 2045 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev); 2046 break; 2047 default: 2048 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2049 return -EINVAL; 2050 } 2051 2052 DP_VERBOSE(edev, QED_MSG_DEBUG, 2053 "dump->version = 0x%x dump->flag = %d dump->len = %d\n", 2054 dump->version, dump->flag, dump->len); 2055 return 0; 2056 } 2057 2058 static int qede_get_dump_data(struct net_device *dev, 2059 struct ethtool_dump *dump, void *buf) 2060 { 2061 struct qede_dev *edev = netdev_priv(dev); 2062 int rc = 0; 2063 2064 if (!edev->ops || !edev->ops->common) { 2065 DP_ERR(edev, "Edev ops not populated\n"); 2066 rc = -EINVAL; 2067 goto err; 2068 } 2069 2070 switch (edev->dump_info.cmd) { 2071 case QEDE_DUMP_CMD_NVM_CFG: 2072 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) { 2073 DP_ERR(edev, "Arg count = %d required = %d\n", 2074 edev->dump_info.num_args, 2075 QEDE_DUMP_NVM_ARG_COUNT); 2076 rc = -EINVAL; 2077 goto err; 2078 } 2079 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf, 2080 edev->dump_info.args[0], 2081 edev->dump_info.args[1]); 2082 break; 2083 case QEDE_DUMP_CMD_GRCDUMP: 2084 memset(buf, 0, dump->len); 2085 rc = edev->ops->common->dbg_all_data(edev->cdev, buf); 2086 break; 2087 default: 2088 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd); 2089 rc = -EINVAL; 2090 break; 2091 } 2092 2093 err: 2094 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE; 2095 edev->dump_info.num_args = 0; 2096 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args)); 2097 2098 return rc; 2099 } 2100 2101 static const struct ethtool_ops qede_ethtool_ops = { 2102 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 2103 .get_link_ksettings = qede_get_link_ksettings, 2104 .set_link_ksettings = qede_set_link_ksettings, 2105 .get_drvinfo = qede_get_drvinfo, 2106 .get_regs_len = qede_get_regs_len, 2107 .get_regs = qede_get_regs, 2108 .get_wol = qede_get_wol, 2109 .set_wol = qede_set_wol, 2110 .get_msglevel = qede_get_msglevel, 2111 .set_msglevel = qede_set_msglevel, 2112 .nway_reset = qede_nway_reset, 2113 .get_link = qede_get_link, 2114 .get_coalesce = qede_get_coalesce, 2115 .set_coalesce = qede_set_coalesce, 2116 .get_ringparam = qede_get_ringparam, 2117 .set_ringparam = qede_set_ringparam, 2118 .get_pauseparam = qede_get_pauseparam, 2119 .set_pauseparam = qede_set_pauseparam, 2120 .get_strings = qede_get_strings, 2121 .set_phys_id = qede_set_phys_id, 2122 .get_ethtool_stats = qede_get_ethtool_stats, 2123 .get_priv_flags = qede_get_priv_flags, 2124 .set_priv_flags = qede_set_priv_flags, 2125 .get_sset_count = qede_get_sset_count, 2126 .get_rxnfc = qede_get_rxnfc, 2127 .set_rxnfc = qede_set_rxnfc, 2128 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2129 .get_rxfh_key_size = qede_get_rxfh_key_size, 2130 .get_rxfh = qede_get_rxfh, 2131 .set_rxfh = qede_set_rxfh, 2132 .get_ts_info = qede_get_ts_info, 2133 .get_channels = qede_get_channels, 2134 .set_channels = qede_set_channels, 2135 .self_test = qede_self_test, 2136 .get_module_info = qede_get_module_info, 2137 .get_module_eeprom = qede_get_module_eeprom, 2138 .get_eee = qede_get_eee, 2139 .set_eee = qede_set_eee, 2140 2141 .get_tunable = qede_get_tunable, 2142 .set_tunable = qede_set_tunable, 2143 .flash_device = qede_flash_device, 2144 .get_dump_flag = qede_get_dump_flag, 2145 .get_dump_data = qede_get_dump_data, 2146 .set_dump = qede_set_dump, 2147 }; 2148 2149 static const struct ethtool_ops qede_vf_ethtool_ops = { 2150 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 2151 .get_link_ksettings = qede_get_link_ksettings, 2152 .get_drvinfo = qede_get_drvinfo, 2153 .get_msglevel = qede_get_msglevel, 2154 .set_msglevel = qede_set_msglevel, 2155 .get_link = qede_get_link, 2156 .get_coalesce = qede_get_coalesce, 2157 .set_coalesce = qede_set_coalesce, 2158 .get_ringparam = qede_get_ringparam, 2159 .set_ringparam = qede_set_ringparam, 2160 .get_strings = qede_get_strings, 2161 .get_ethtool_stats = qede_get_ethtool_stats, 2162 .get_priv_flags = qede_get_priv_flags, 2163 .get_sset_count = qede_get_sset_count, 2164 .get_rxnfc = qede_get_rxnfc, 2165 .set_rxnfc = qede_set_rxnfc, 2166 .get_rxfh_indir_size = qede_get_rxfh_indir_size, 2167 .get_rxfh_key_size = qede_get_rxfh_key_size, 2168 .get_rxfh = qede_get_rxfh, 2169 .set_rxfh = qede_set_rxfh, 2170 .get_channels = qede_get_channels, 2171 .set_channels = qede_set_channels, 2172 .get_tunable = qede_get_tunable, 2173 .set_tunable = qede_set_tunable, 2174 }; 2175 2176 void qede_set_ethtool_ops(struct net_device *dev) 2177 { 2178 struct qede_dev *edev = netdev_priv(dev); 2179 2180 if (IS_VF(edev)) 2181 dev->ethtool_ops = &qede_vf_ethtool_ops; 2182 else 2183 dev->ethtool_ops = &qede_ethtool_ops; 2184 } 2185