1 /* 2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 * 32 */ 33 34 #include <asm/page.h> 35 #include <linux/mlx4/cq.h> 36 #include <linux/slab.h> 37 #include <linux/mlx4/qp.h> 38 #include <linux/skbuff.h> 39 #include <linux/if_vlan.h> 40 #include <linux/vmalloc.h> 41 #include <linux/tcp.h> 42 #include <linux/moduleparam.h> 43 44 #include "mlx4_en.h" 45 46 enum { 47 MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */ 48 MAX_BF = 256, 49 }; 50 51 static int inline_thold __read_mostly = MAX_INLINE; 52 53 module_param_named(inline_thold, inline_thold, int, 0444); 54 MODULE_PARM_DESC(inline_thold, "threshold for using inline data"); 55 56 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv, 57 struct mlx4_en_tx_ring *ring, int qpn, u32 size, 58 u16 stride) 59 { 60 struct mlx4_en_dev *mdev = priv->mdev; 61 int tmp; 62 int err; 63 64 ring->size = size; 65 ring->size_mask = size - 1; 66 ring->stride = stride; 67 68 inline_thold = min(inline_thold, MAX_INLINE); 69 70 tmp = size * sizeof(struct mlx4_en_tx_info); 71 ring->tx_info = vmalloc(tmp); 72 if (!ring->tx_info) 73 return -ENOMEM; 74 75 en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n", 76 ring->tx_info, tmp); 77 78 ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL); 79 if (!ring->bounce_buf) { 80 err = -ENOMEM; 81 goto err_tx; 82 } 83 ring->buf_size = ALIGN(size * ring->stride, MLX4_EN_PAGE_SIZE); 84 85 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size, 86 2 * PAGE_SIZE); 87 if (err) { 88 en_err(priv, "Failed allocating hwq resources\n"); 89 goto err_bounce; 90 } 91 92 err = mlx4_en_map_buffer(&ring->wqres.buf); 93 if (err) { 94 en_err(priv, "Failed to map TX buffer\n"); 95 goto err_hwq_res; 96 } 97 98 ring->buf = ring->wqres.buf.direct.buf; 99 100 en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d " 101 "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size, 102 ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map); 103 104 ring->qpn = qpn; 105 err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp); 106 if (err) { 107 en_err(priv, "Failed allocating qp %d\n", ring->qpn); 108 goto err_map; 109 } 110 ring->qp.event = mlx4_en_sqp_event; 111 112 err = mlx4_bf_alloc(mdev->dev, &ring->bf); 113 if (err) { 114 en_dbg(DRV, priv, "working without blueflame (%d)", err); 115 ring->bf.uar = &mdev->priv_uar; 116 ring->bf.uar->map = mdev->uar_map; 117 ring->bf_enabled = false; 118 } else 119 ring->bf_enabled = true; 120 121 return 0; 122 123 err_map: 124 mlx4_en_unmap_buffer(&ring->wqres.buf); 125 err_hwq_res: 126 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); 127 err_bounce: 128 kfree(ring->bounce_buf); 129 ring->bounce_buf = NULL; 130 err_tx: 131 vfree(ring->tx_info); 132 ring->tx_info = NULL; 133 return err; 134 } 135 136 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv, 137 struct mlx4_en_tx_ring *ring) 138 { 139 struct mlx4_en_dev *mdev = priv->mdev; 140 en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn); 141 142 if (ring->bf_enabled) 143 mlx4_bf_free(mdev->dev, &ring->bf); 144 mlx4_qp_remove(mdev->dev, &ring->qp); 145 mlx4_qp_free(mdev->dev, &ring->qp); 146 mlx4_qp_release_range(mdev->dev, ring->qpn, 1); 147 mlx4_en_unmap_buffer(&ring->wqres.buf); 148 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size); 149 kfree(ring->bounce_buf); 150 ring->bounce_buf = NULL; 151 vfree(ring->tx_info); 152 ring->tx_info = NULL; 153 } 154 155 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv, 156 struct mlx4_en_tx_ring *ring, 157 int cq, int user_prio) 158 { 159 struct mlx4_en_dev *mdev = priv->mdev; 160 int err; 161 162 ring->cqn = cq; 163 ring->prod = 0; 164 ring->cons = 0xffffffff; 165 ring->last_nr_txbb = 1; 166 ring->poll_cnt = 0; 167 memset(ring->tx_info, 0, ring->size * sizeof(struct mlx4_en_tx_info)); 168 memset(ring->buf, 0, ring->buf_size); 169 170 ring->qp_state = MLX4_QP_STATE_RST; 171 ring->doorbell_qpn = ring->qp.qpn << 8; 172 173 mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn, 174 ring->cqn, user_prio, &ring->context); 175 if (ring->bf_enabled) 176 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index); 177 178 err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context, 179 &ring->qp, &ring->qp_state); 180 181 return err; 182 } 183 184 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv, 185 struct mlx4_en_tx_ring *ring) 186 { 187 struct mlx4_en_dev *mdev = priv->mdev; 188 189 mlx4_qp_modify(mdev->dev, NULL, ring->qp_state, 190 MLX4_QP_STATE_RST, NULL, 0, 0, &ring->qp); 191 } 192 193 194 static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv, 195 struct mlx4_en_tx_ring *ring, 196 int index, u8 owner) 197 { 198 struct mlx4_en_tx_info *tx_info = &ring->tx_info[index]; 199 struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE; 200 struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset; 201 struct sk_buff *skb = tx_info->skb; 202 struct skb_frag_struct *frag; 203 void *end = ring->buf + ring->buf_size; 204 int frags = skb_shinfo(skb)->nr_frags; 205 int i; 206 __be32 *ptr = (__be32 *)tx_desc; 207 __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT)); 208 209 /* Optimize the common case when there are no wraparounds */ 210 if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) { 211 if (!tx_info->inl) { 212 if (tx_info->linear) { 213 dma_unmap_single(priv->ddev, 214 (dma_addr_t) be64_to_cpu(data->addr), 215 be32_to_cpu(data->byte_count), 216 PCI_DMA_TODEVICE); 217 ++data; 218 } 219 220 for (i = 0; i < frags; i++) { 221 frag = &skb_shinfo(skb)->frags[i]; 222 dma_unmap_page(priv->ddev, 223 (dma_addr_t) be64_to_cpu(data[i].addr), 224 skb_frag_size(frag), PCI_DMA_TODEVICE); 225 } 226 } 227 /* Stamp the freed descriptor */ 228 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE; i += STAMP_STRIDE) { 229 *ptr = stamp; 230 ptr += STAMP_DWORDS; 231 } 232 233 } else { 234 if (!tx_info->inl) { 235 if ((void *) data >= end) { 236 data = ring->buf + ((void *)data - end); 237 } 238 239 if (tx_info->linear) { 240 dma_unmap_single(priv->ddev, 241 (dma_addr_t) be64_to_cpu(data->addr), 242 be32_to_cpu(data->byte_count), 243 PCI_DMA_TODEVICE); 244 ++data; 245 } 246 247 for (i = 0; i < frags; i++) { 248 /* Check for wraparound before unmapping */ 249 if ((void *) data >= end) 250 data = ring->buf; 251 frag = &skb_shinfo(skb)->frags[i]; 252 dma_unmap_page(priv->ddev, 253 (dma_addr_t) be64_to_cpu(data->addr), 254 skb_frag_size(frag), PCI_DMA_TODEVICE); 255 ++data; 256 } 257 } 258 /* Stamp the freed descriptor */ 259 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE; i += STAMP_STRIDE) { 260 *ptr = stamp; 261 ptr += STAMP_DWORDS; 262 if ((void *) ptr >= end) { 263 ptr = ring->buf; 264 stamp ^= cpu_to_be32(0x80000000); 265 } 266 } 267 268 } 269 dev_kfree_skb_any(skb); 270 return tx_info->nr_txbb; 271 } 272 273 274 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring) 275 { 276 struct mlx4_en_priv *priv = netdev_priv(dev); 277 int cnt = 0; 278 279 /* Skip last polled descriptor */ 280 ring->cons += ring->last_nr_txbb; 281 en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n", 282 ring->cons, ring->prod); 283 284 if ((u32) (ring->prod - ring->cons) > ring->size) { 285 if (netif_msg_tx_err(priv)) 286 en_warn(priv, "Tx consumer passed producer!\n"); 287 return 0; 288 } 289 290 while (ring->cons != ring->prod) { 291 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring, 292 ring->cons & ring->size_mask, 293 !!(ring->cons & ring->size)); 294 ring->cons += ring->last_nr_txbb; 295 cnt++; 296 } 297 298 if (cnt) 299 en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt); 300 301 return cnt; 302 } 303 304 static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq) 305 { 306 struct mlx4_en_priv *priv = netdev_priv(dev); 307 struct mlx4_cq *mcq = &cq->mcq; 308 struct mlx4_en_tx_ring *ring = &priv->tx_ring[cq->ring]; 309 struct mlx4_cqe *cqe; 310 u16 index; 311 u16 new_index, ring_index; 312 u32 txbbs_skipped = 0; 313 u32 cons_index = mcq->cons_index; 314 int size = cq->size; 315 u32 size_mask = ring->size_mask; 316 struct mlx4_cqe *buf = cq->buf; 317 u32 packets = 0; 318 u32 bytes = 0; 319 320 if (!priv->port_up) 321 return; 322 323 index = cons_index & size_mask; 324 cqe = &buf[index]; 325 ring_index = ring->cons & size_mask; 326 327 /* Process all completed CQEs */ 328 while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK, 329 cons_index & size)) { 330 /* 331 * make sure we read the CQE after we read the 332 * ownership bit 333 */ 334 rmb(); 335 336 /* Skip over last polled CQE */ 337 new_index = be16_to_cpu(cqe->wqe_index) & size_mask; 338 339 do { 340 txbbs_skipped += ring->last_nr_txbb; 341 ring_index = (ring_index + ring->last_nr_txbb) & size_mask; 342 /* free next descriptor */ 343 ring->last_nr_txbb = mlx4_en_free_tx_desc( 344 priv, ring, ring_index, 345 !!((ring->cons + txbbs_skipped) & 346 ring->size)); 347 packets++; 348 bytes += ring->tx_info[ring_index].nr_bytes; 349 } while (ring_index != new_index); 350 351 ++cons_index; 352 index = cons_index & size_mask; 353 cqe = &buf[index]; 354 } 355 356 357 /* 358 * To prevent CQ overflow we first update CQ consumer and only then 359 * the ring consumer. 360 */ 361 mcq->cons_index = cons_index; 362 mlx4_cq_set_ci(mcq); 363 wmb(); 364 ring->cons += txbbs_skipped; 365 netdev_tx_completed_queue(ring->tx_queue, packets, bytes); 366 367 /* 368 * Wakeup Tx queue if this stopped, and at least 1 packet 369 * was completed 370 */ 371 if (netif_tx_queue_stopped(ring->tx_queue) && txbbs_skipped > 0) { 372 netif_tx_wake_queue(ring->tx_queue); 373 priv->port_stats.wake_queue++; 374 } 375 } 376 377 void mlx4_en_tx_irq(struct mlx4_cq *mcq) 378 { 379 struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq); 380 struct mlx4_en_priv *priv = netdev_priv(cq->dev); 381 382 mlx4_en_process_tx_cq(cq->dev, cq); 383 mlx4_en_arm_cq(priv, cq); 384 } 385 386 387 static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv, 388 struct mlx4_en_tx_ring *ring, 389 u32 index, 390 unsigned int desc_size) 391 { 392 u32 copy = (ring->size - index) * TXBB_SIZE; 393 int i; 394 395 for (i = desc_size - copy - 4; i >= 0; i -= 4) { 396 if ((i & (TXBB_SIZE - 1)) == 0) 397 wmb(); 398 399 *((u32 *) (ring->buf + i)) = 400 *((u32 *) (ring->bounce_buf + copy + i)); 401 } 402 403 for (i = copy - 4; i >= 4 ; i -= 4) { 404 if ((i & (TXBB_SIZE - 1)) == 0) 405 wmb(); 406 407 *((u32 *) (ring->buf + index * TXBB_SIZE + i)) = 408 *((u32 *) (ring->bounce_buf + i)); 409 } 410 411 /* Return real descriptor location */ 412 return ring->buf + index * TXBB_SIZE; 413 } 414 415 static int is_inline(struct sk_buff *skb, void **pfrag) 416 { 417 void *ptr; 418 419 if (inline_thold && !skb_is_gso(skb) && skb->len <= inline_thold) { 420 if (skb_shinfo(skb)->nr_frags == 1) { 421 ptr = skb_frag_address_safe(&skb_shinfo(skb)->frags[0]); 422 if (unlikely(!ptr)) 423 return 0; 424 425 if (pfrag) 426 *pfrag = ptr; 427 428 return 1; 429 } else if (unlikely(skb_shinfo(skb)->nr_frags)) 430 return 0; 431 else 432 return 1; 433 } 434 435 return 0; 436 } 437 438 static int inline_size(struct sk_buff *skb) 439 { 440 if (skb->len + CTRL_SIZE + sizeof(struct mlx4_wqe_inline_seg) 441 <= MLX4_INLINE_ALIGN) 442 return ALIGN(skb->len + CTRL_SIZE + 443 sizeof(struct mlx4_wqe_inline_seg), 16); 444 else 445 return ALIGN(skb->len + CTRL_SIZE + 2 * 446 sizeof(struct mlx4_wqe_inline_seg), 16); 447 } 448 449 static int get_real_size(struct sk_buff *skb, struct net_device *dev, 450 int *lso_header_size) 451 { 452 struct mlx4_en_priv *priv = netdev_priv(dev); 453 int real_size; 454 455 if (skb_is_gso(skb)) { 456 *lso_header_size = skb_transport_offset(skb) + tcp_hdrlen(skb); 457 real_size = CTRL_SIZE + skb_shinfo(skb)->nr_frags * DS_SIZE + 458 ALIGN(*lso_header_size + 4, DS_SIZE); 459 if (unlikely(*lso_header_size != skb_headlen(skb))) { 460 /* We add a segment for the skb linear buffer only if 461 * it contains data */ 462 if (*lso_header_size < skb_headlen(skb)) 463 real_size += DS_SIZE; 464 else { 465 if (netif_msg_tx_err(priv)) 466 en_warn(priv, "Non-linear headers\n"); 467 return 0; 468 } 469 } 470 } else { 471 *lso_header_size = 0; 472 if (!is_inline(skb, NULL)) 473 real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE; 474 else 475 real_size = inline_size(skb); 476 } 477 478 return real_size; 479 } 480 481 static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *skb, 482 int real_size, u16 *vlan_tag, int tx_ind, void *fragptr) 483 { 484 struct mlx4_wqe_inline_seg *inl = &tx_desc->inl; 485 int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl; 486 487 if (skb->len <= spc) { 488 inl->byte_count = cpu_to_be32(1 << 31 | skb->len); 489 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb)); 490 if (skb_shinfo(skb)->nr_frags) 491 memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr, 492 skb_frag_size(&skb_shinfo(skb)->frags[0])); 493 494 } else { 495 inl->byte_count = cpu_to_be32(1 << 31 | spc); 496 if (skb_headlen(skb) <= spc) { 497 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb)); 498 if (skb_headlen(skb) < spc) { 499 memcpy(((void *)(inl + 1)) + skb_headlen(skb), 500 fragptr, spc - skb_headlen(skb)); 501 fragptr += spc - skb_headlen(skb); 502 } 503 inl = (void *) (inl + 1) + spc; 504 memcpy(((void *)(inl + 1)), fragptr, skb->len - spc); 505 } else { 506 skb_copy_from_linear_data(skb, inl + 1, spc); 507 inl = (void *) (inl + 1) + spc; 508 skb_copy_from_linear_data_offset(skb, spc, inl + 1, 509 skb_headlen(skb) - spc); 510 if (skb_shinfo(skb)->nr_frags) 511 memcpy(((void *)(inl + 1)) + skb_headlen(skb) - spc, 512 fragptr, skb_frag_size(&skb_shinfo(skb)->frags[0])); 513 } 514 515 wmb(); 516 inl->byte_count = cpu_to_be32(1 << 31 | (skb->len - spc)); 517 } 518 tx_desc->ctrl.vlan_tag = cpu_to_be16(*vlan_tag); 519 tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN * 520 (!!vlan_tx_tag_present(skb)); 521 tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f; 522 } 523 524 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb) 525 { 526 struct mlx4_en_priv *priv = netdev_priv(dev); 527 u16 rings_p_up = priv->mdev->profile.num_tx_rings_p_up; 528 u8 up = 0; 529 530 if (dev->num_tc) 531 return skb_tx_hash(dev, skb); 532 533 if (vlan_tx_tag_present(skb)) 534 up = vlan_tx_tag_get(skb) >> VLAN_PRIO_SHIFT; 535 536 return __skb_tx_hash(dev, skb, rings_p_up) + up * rings_p_up; 537 } 538 539 static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt) 540 { 541 __iowrite64_copy(dst, src, bytecnt / 8); 542 } 543 544 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev) 545 { 546 struct mlx4_en_priv *priv = netdev_priv(dev); 547 struct mlx4_en_dev *mdev = priv->mdev; 548 struct mlx4_en_tx_ring *ring; 549 struct mlx4_en_tx_desc *tx_desc; 550 struct mlx4_wqe_data_seg *data; 551 struct skb_frag_struct *frag; 552 struct mlx4_en_tx_info *tx_info; 553 struct ethhdr *ethh; 554 int tx_ind = 0; 555 int nr_txbb; 556 int desc_size; 557 int real_size; 558 dma_addr_t dma; 559 u32 index, bf_index; 560 __be32 op_own; 561 u16 vlan_tag = 0; 562 int i; 563 int lso_header_size; 564 void *fragptr; 565 bool bounce = false; 566 567 if (!priv->port_up) 568 goto tx_drop; 569 570 real_size = get_real_size(skb, dev, &lso_header_size); 571 if (unlikely(!real_size)) 572 goto tx_drop; 573 574 /* Align descriptor to TXBB size */ 575 desc_size = ALIGN(real_size, TXBB_SIZE); 576 nr_txbb = desc_size / TXBB_SIZE; 577 if (unlikely(nr_txbb > MAX_DESC_TXBBS)) { 578 if (netif_msg_tx_err(priv)) 579 en_warn(priv, "Oversized header or SG list\n"); 580 goto tx_drop; 581 } 582 583 tx_ind = skb->queue_mapping; 584 ring = &priv->tx_ring[tx_ind]; 585 if (vlan_tx_tag_present(skb)) 586 vlan_tag = vlan_tx_tag_get(skb); 587 588 /* Check available TXBBs And 2K spare for prefetch */ 589 if (unlikely(((int)(ring->prod - ring->cons)) > 590 ring->size - HEADROOM - MAX_DESC_TXBBS)) { 591 /* every full Tx ring stops queue */ 592 netif_tx_stop_queue(ring->tx_queue); 593 priv->port_stats.queue_stopped++; 594 595 return NETDEV_TX_BUSY; 596 } 597 598 /* Track current inflight packets for performance analysis */ 599 AVG_PERF_COUNTER(priv->pstats.inflight_avg, 600 (u32) (ring->prod - ring->cons - 1)); 601 602 /* Packet is good - grab an index and transmit it */ 603 index = ring->prod & ring->size_mask; 604 bf_index = ring->prod; 605 606 /* See if we have enough space for whole descriptor TXBB for setting 607 * SW ownership on next descriptor; if not, use a bounce buffer. */ 608 if (likely(index + nr_txbb <= ring->size)) 609 tx_desc = ring->buf + index * TXBB_SIZE; 610 else { 611 tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf; 612 bounce = true; 613 } 614 615 /* Save skb in tx_info ring */ 616 tx_info = &ring->tx_info[index]; 617 tx_info->skb = skb; 618 tx_info->nr_txbb = nr_txbb; 619 620 /* Prepare ctrl segement apart opcode+ownership, which depends on 621 * whether LSO is used */ 622 tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag); 623 tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN * 624 !!vlan_tx_tag_present(skb); 625 tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f; 626 tx_desc->ctrl.srcrb_flags = priv->ctrl_flags; 627 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 628 tx_desc->ctrl.srcrb_flags |= cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM | 629 MLX4_WQE_CTRL_TCP_UDP_CSUM); 630 ring->tx_csum++; 631 } 632 633 /* Copy dst mac address to wqe */ 634 ethh = (struct ethhdr *)skb->data; 635 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest); 636 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2)); 637 /* Handle LSO (TSO) packets */ 638 if (lso_header_size) { 639 /* Mark opcode as LSO */ 640 op_own = cpu_to_be32(MLX4_OPCODE_LSO | (1 << 6)) | 641 ((ring->prod & ring->size) ? 642 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0); 643 644 /* Fill in the LSO prefix */ 645 tx_desc->lso.mss_hdr_size = cpu_to_be32( 646 skb_shinfo(skb)->gso_size << 16 | lso_header_size); 647 648 /* Copy headers; 649 * note that we already verified that it is linear */ 650 memcpy(tx_desc->lso.header, skb->data, lso_header_size); 651 data = ((void *) &tx_desc->lso + 652 ALIGN(lso_header_size + 4, DS_SIZE)); 653 654 priv->port_stats.tso_packets++; 655 i = ((skb->len - lso_header_size) / skb_shinfo(skb)->gso_size) + 656 !!((skb->len - lso_header_size) % skb_shinfo(skb)->gso_size); 657 tx_info->nr_bytes = skb->len + (i - 1) * lso_header_size; 658 ring->packets += i; 659 } else { 660 /* Normal (Non LSO) packet */ 661 op_own = cpu_to_be32(MLX4_OPCODE_SEND) | 662 ((ring->prod & ring->size) ? 663 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0); 664 data = &tx_desc->data; 665 tx_info->nr_bytes = max_t(unsigned int, skb->len, ETH_ZLEN); 666 ring->packets++; 667 668 } 669 ring->bytes += tx_info->nr_bytes; 670 netdev_tx_sent_queue(ring->tx_queue, tx_info->nr_bytes); 671 AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len); 672 673 674 /* valid only for none inline segments */ 675 tx_info->data_offset = (void *) data - (void *) tx_desc; 676 677 tx_info->linear = (lso_header_size < skb_headlen(skb) && !is_inline(skb, NULL)) ? 1 : 0; 678 data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1; 679 680 if (!is_inline(skb, &fragptr)) { 681 /* Map fragments */ 682 for (i = skb_shinfo(skb)->nr_frags - 1; i >= 0; i--) { 683 frag = &skb_shinfo(skb)->frags[i]; 684 dma = skb_frag_dma_map(priv->ddev, frag, 685 0, skb_frag_size(frag), 686 DMA_TO_DEVICE); 687 data->addr = cpu_to_be64(dma); 688 data->lkey = cpu_to_be32(mdev->mr.key); 689 wmb(); 690 data->byte_count = cpu_to_be32(skb_frag_size(frag)); 691 --data; 692 } 693 694 /* Map linear part */ 695 if (tx_info->linear) { 696 dma = dma_map_single(priv->ddev, skb->data + lso_header_size, 697 skb_headlen(skb) - lso_header_size, PCI_DMA_TODEVICE); 698 data->addr = cpu_to_be64(dma); 699 data->lkey = cpu_to_be32(mdev->mr.key); 700 wmb(); 701 data->byte_count = cpu_to_be32(skb_headlen(skb) - lso_header_size); 702 } 703 tx_info->inl = 0; 704 } else { 705 build_inline_wqe(tx_desc, skb, real_size, &vlan_tag, tx_ind, fragptr); 706 tx_info->inl = 1; 707 } 708 709 ring->prod += nr_txbb; 710 711 /* If we used a bounce buffer then copy descriptor back into place */ 712 if (bounce) 713 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size); 714 715 /* Run destructor before passing skb to HW */ 716 if (likely(!skb_shared(skb))) 717 skb_orphan(skb); 718 719 if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tag) { 720 *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn); 721 op_own |= htonl((bf_index & 0xffff) << 8); 722 /* Ensure new descirptor hits memory 723 * before setting ownership of this descriptor to HW */ 724 wmb(); 725 tx_desc->ctrl.owner_opcode = op_own; 726 727 wmb(); 728 729 mlx4_bf_copy(ring->bf.reg + ring->bf.offset, (unsigned long *) &tx_desc->ctrl, 730 desc_size); 731 732 wmb(); 733 734 ring->bf.offset ^= ring->bf.buf_size; 735 } else { 736 /* Ensure new descirptor hits memory 737 * before setting ownership of this descriptor to HW */ 738 wmb(); 739 tx_desc->ctrl.owner_opcode = op_own; 740 wmb(); 741 iowrite32be(ring->doorbell_qpn, ring->bf.uar->map + MLX4_SEND_DOORBELL); 742 } 743 744 return NETDEV_TX_OK; 745 746 tx_drop: 747 dev_kfree_skb_any(skb); 748 priv->stats.tx_dropped++; 749 return NETDEV_TX_OK; 750 } 751 752