xref: /linux/drivers/net/ethernet/intel/ice/ice.h (revision ac84bac4062e7fc24f5e2c61c6a414b2a00a29ad)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3 
4 #ifndef _ICE_H_
5 #define _ICE_H_
6 
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/aer.h>
23 #include <linux/interrupt.h>
24 #include <linux/ethtool.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/bitmap.h>
28 #include <linux/log2.h>
29 #include <linux/ip.h>
30 #include <linux/sctp.h>
31 #include <linux/ipv6.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/if_bridge.h>
34 #include <linux/ctype.h>
35 #include <linux/bpf.h>
36 #include <linux/avf/virtchnl.h>
37 #include <net/devlink.h>
38 #include <net/ipv6.h>
39 #include <net/xdp_sock.h>
40 #include "ice_devids.h"
41 #include "ice_type.h"
42 #include "ice_txrx.h"
43 #include "ice_dcb.h"
44 #include "ice_switch.h"
45 #include "ice_common.h"
46 #include "ice_sched.h"
47 #include "ice_virtchnl_pf.h"
48 #include "ice_sriov.h"
49 #include "ice_xsk.h"
50 
51 extern const char ice_drv_ver[];
52 #define ICE_BAR0		0
53 #define ICE_REQ_DESC_MULTIPLE	32
54 #define ICE_MIN_NUM_DESC	64
55 #define ICE_MAX_NUM_DESC	8160
56 #define ICE_DFLT_MIN_RX_DESC	512
57 #define ICE_DFLT_NUM_TX_DESC	256
58 #define ICE_DFLT_NUM_RX_DESC	2048
59 
60 #define ICE_DFLT_TRAFFIC_CLASS	BIT(0)
61 #define ICE_INT_NAME_STR_LEN	(IFNAMSIZ + 16)
62 #define ICE_AQ_LEN		64
63 #define ICE_MBXSQ_LEN		64
64 #define ICE_MIN_MSIX		2
65 #define ICE_NO_VSI		0xffff
66 #define ICE_VSI_MAP_CONTIG	0
67 #define ICE_VSI_MAP_SCATTER	1
68 #define ICE_MAX_SCATTER_TXQS	16
69 #define ICE_MAX_SCATTER_RXQS	16
70 #define ICE_Q_WAIT_RETRY_LIMIT	10
71 #define ICE_Q_WAIT_MAX_RETRY	(5 * ICE_Q_WAIT_RETRY_LIMIT)
72 #define ICE_MAX_LG_RSS_QS	256
73 #define ICE_RES_VALID_BIT	0x8000
74 #define ICE_RES_MISC_VEC_ID	(ICE_RES_VALID_BIT - 1)
75 #define ICE_INVAL_Q_INDEX	0xffff
76 #define ICE_INVAL_VFID		256
77 
78 #define ICE_MAX_RESET_WAIT		20
79 
80 #define ICE_VSIQF_HKEY_ARRAY_SIZE	((VSIQF_HKEY_MAX_INDEX + 1) *	4)
81 
82 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
83 
84 #define ICE_MAX_MTU	(ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
85 
86 #define ICE_UP_TABLE_TRANSLATE(val, i) \
87 		(((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
88 		  ICE_AQ_VSI_UP_TABLE_UP##i##_M)
89 
90 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
91 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
92 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
93 
94 /* Macro for each VSI in a PF */
95 #define ice_for_each_vsi(pf, i) \
96 	for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
97 
98 /* Macros for each Tx/Rx ring in a VSI */
99 #define ice_for_each_txq(vsi, i) \
100 	for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
101 
102 #define ice_for_each_rxq(vsi, i) \
103 	for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
104 
105 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
106 #define ice_for_each_alloc_txq(vsi, i) \
107 	for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
108 
109 #define ice_for_each_alloc_rxq(vsi, i) \
110 	for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
111 
112 #define ice_for_each_q_vector(vsi, i) \
113 	for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
114 
115 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_MCAST_TX | \
116 				ICE_PROMISC_UCAST_RX | ICE_PROMISC_MCAST_RX)
117 
118 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
119 				     ICE_PROMISC_MCAST_TX | \
120 				     ICE_PROMISC_UCAST_RX | \
121 				     ICE_PROMISC_MCAST_RX | \
122 				     ICE_PROMISC_VLAN_TX  | \
123 				     ICE_PROMISC_VLAN_RX)
124 
125 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
126 
127 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
128 				     ICE_PROMISC_MCAST_RX | \
129 				     ICE_PROMISC_VLAN_TX  | \
130 				     ICE_PROMISC_VLAN_RX)
131 
132 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
133 
134 struct ice_txq_meta {
135 	u32 q_teid;	/* Tx-scheduler element identifier */
136 	u16 q_id;	/* Entry in VSI's txq_map bitmap */
137 	u16 q_handle;	/* Relative index of Tx queue within TC */
138 	u16 vsi_idx;	/* VSI index that Tx queue belongs to */
139 	u8 tc;		/* TC number that Tx queue belongs to */
140 };
141 
142 struct ice_tc_info {
143 	u16 qoffset;
144 	u16 qcount_tx;
145 	u16 qcount_rx;
146 	u8 netdev_tc;
147 };
148 
149 struct ice_tc_cfg {
150 	u8 numtc; /* Total number of enabled TCs */
151 	u8 ena_tc; /* Tx map */
152 	struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
153 };
154 
155 struct ice_res_tracker {
156 	u16 num_entries;
157 	u16 end;
158 	u16 list[1];
159 };
160 
161 struct ice_qs_cfg {
162 	struct mutex *qs_mutex;  /* will be assigned to &pf->avail_q_mutex */
163 	unsigned long *pf_map;
164 	unsigned long pf_map_size;
165 	unsigned int q_count;
166 	unsigned int scatter_count;
167 	u16 *vsi_map;
168 	u16 vsi_map_offset;
169 	u8 mapping_mode;
170 };
171 
172 struct ice_sw {
173 	struct ice_pf *pf;
174 	u16 sw_id;		/* switch ID for this switch */
175 	u16 bridge_mode;	/* VEB/VEPA/Port Virtualizer */
176 	struct ice_vsi *dflt_vsi;	/* default VSI for this switch */
177 	u8 dflt_vsi_ena:1;	/* true if above dflt_vsi is enabled */
178 };
179 
180 enum ice_state {
181 	__ICE_TESTING,
182 	__ICE_DOWN,
183 	__ICE_NEEDS_RESTART,
184 	__ICE_PREPARED_FOR_RESET,	/* set by driver when prepared */
185 	__ICE_RESET_OICR_RECV,		/* set by driver after rcv reset OICR */
186 	__ICE_DCBNL_DEVRESET,		/* set by dcbnl devreset */
187 	__ICE_PFR_REQ,			/* set by driver and peers */
188 	__ICE_CORER_REQ,		/* set by driver and peers */
189 	__ICE_GLOBR_REQ,		/* set by driver and peers */
190 	__ICE_CORER_RECV,		/* set by OICR handler */
191 	__ICE_GLOBR_RECV,		/* set by OICR handler */
192 	__ICE_EMPR_RECV,		/* set by OICR handler */
193 	__ICE_SUSPENDED,		/* set on module remove path */
194 	__ICE_RESET_FAILED,		/* set by reset/rebuild */
195 	/* When checking for the PF to be in a nominal operating state, the
196 	 * bits that are grouped at the beginning of the list need to be
197 	 * checked. Bits occurring before __ICE_STATE_NOMINAL_CHECK_BITS will
198 	 * be checked. If you need to add a bit into consideration for nominal
199 	 * operating state, it must be added before
200 	 * __ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
201 	 * without appropriate consideration.
202 	 */
203 	__ICE_STATE_NOMINAL_CHECK_BITS,
204 	__ICE_ADMINQ_EVENT_PENDING,
205 	__ICE_MAILBOXQ_EVENT_PENDING,
206 	__ICE_MDD_EVENT_PENDING,
207 	__ICE_VFLR_EVENT_PENDING,
208 	__ICE_FLTR_OVERFLOW_PROMISC,
209 	__ICE_VF_DIS,
210 	__ICE_CFG_BUSY,
211 	__ICE_SERVICE_SCHED,
212 	__ICE_SERVICE_DIS,
213 	__ICE_OICR_INTR_DIS,		/* Global OICR interrupt disabled */
214 	__ICE_MDD_VF_PRINT_PENDING,	/* set when MDD event handle */
215 	__ICE_VF_RESETS_DISABLED,	/* disable resets during ice_remove */
216 	__ICE_STATE_NBITS		/* must be last */
217 };
218 
219 enum ice_vsi_flags {
220 	ICE_VSI_FLAG_UMAC_FLTR_CHANGED,
221 	ICE_VSI_FLAG_MMAC_FLTR_CHANGED,
222 	ICE_VSI_FLAG_VLAN_FLTR_CHANGED,
223 	ICE_VSI_FLAG_PROMISC_CHANGED,
224 	ICE_VSI_FLAG_NBITS		/* must be last */
225 };
226 
227 /* struct that defines a VSI, associated with a dev */
228 struct ice_vsi {
229 	struct net_device *netdev;
230 	struct ice_sw *vsw;		 /* switch this VSI is on */
231 	struct ice_pf *back;		 /* back pointer to PF */
232 	struct ice_port_info *port_info; /* back pointer to port_info */
233 	struct ice_ring **rx_rings;	 /* Rx ring array */
234 	struct ice_ring **tx_rings;	 /* Tx ring array */
235 	struct ice_q_vector **q_vectors; /* q_vector array */
236 
237 	irqreturn_t (*irq_handler)(int irq, void *data);
238 
239 	u64 tx_linearize;
240 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
241 	DECLARE_BITMAP(flags, ICE_VSI_FLAG_NBITS);
242 	unsigned int current_netdev_flags;
243 	u32 tx_restart;
244 	u32 tx_busy;
245 	u32 rx_buf_failed;
246 	u32 rx_page_failed;
247 	int num_q_vectors;
248 	int base_vector;		/* IRQ base for OS reserved vectors */
249 	enum ice_vsi_type type;
250 	u16 vsi_num;			/* HW (absolute) index of this VSI */
251 	u16 idx;			/* software index in pf->vsi[] */
252 
253 	s16 vf_id;			/* VF ID for SR-IOV VSIs */
254 
255 	u16 ethtype;			/* Ethernet protocol for pause frame */
256 
257 	/* RSS config */
258 	u16 rss_table_size;	/* HW RSS table size */
259 	u16 rss_size;		/* Allocated RSS queues */
260 	u8 *rss_hkey_user;	/* User configured hash keys */
261 	u8 *rss_lut_user;	/* User configured lookup table entries */
262 	u8 rss_lut_type;	/* used to configure Get/Set RSS LUT AQ call */
263 
264 	u16 max_frame;
265 	u16 rx_buf_len;
266 
267 	struct ice_aqc_vsi_props info;	 /* VSI properties */
268 
269 	/* VSI stats */
270 	struct rtnl_link_stats64 net_stats;
271 	struct ice_eth_stats eth_stats;
272 	struct ice_eth_stats eth_stats_prev;
273 
274 	struct list_head tmp_sync_list;		/* MAC filters to be synced */
275 	struct list_head tmp_unsync_list;	/* MAC filters to be unsynced */
276 
277 	u8 irqs_ready:1;
278 	u8 current_isup:1;		 /* Sync 'link up' logging */
279 	u8 stat_offsets_loaded:1;
280 	u8 vlan_ena:1;
281 	u16 num_vlan;
282 
283 	/* queue information */
284 	u8 tx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
285 	u8 rx_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
286 	u16 *txq_map;			 /* index in pf->avail_txqs */
287 	u16 *rxq_map;			 /* index in pf->avail_rxqs */
288 	u16 alloc_txq;			 /* Allocated Tx queues */
289 	u16 num_txq;			 /* Used Tx queues */
290 	u16 alloc_rxq;			 /* Allocated Rx queues */
291 	u16 num_rxq;			 /* Used Rx queues */
292 	u16 req_txq;			 /* User requested Tx queues */
293 	u16 req_rxq;			 /* User requested Rx queues */
294 	u16 num_rx_desc;
295 	u16 num_tx_desc;
296 	struct ice_tc_cfg tc_cfg;
297 	struct bpf_prog *xdp_prog;
298 	struct ice_ring **xdp_rings;	 /* XDP ring array */
299 	u16 num_xdp_txq;		 /* Used XDP queues */
300 	u8 xdp_mapping_mode;		 /* ICE_MAP_MODE_[CONTIG|SCATTER] */
301 	struct xdp_umem **xsk_umems;
302 	u16 num_xsk_umems_used;
303 	u16 num_xsk_umems;
304 } ____cacheline_internodealigned_in_smp;
305 
306 /* struct that defines an interrupt vector */
307 struct ice_q_vector {
308 	struct ice_vsi *vsi;
309 
310 	u16 v_idx;			/* index in the vsi->q_vector array. */
311 	u16 reg_idx;
312 	u8 num_ring_rx;			/* total number of Rx rings in vector */
313 	u8 num_ring_tx;			/* total number of Tx rings in vector */
314 	u8 itr_countdown;		/* when 0 should adjust adaptive ITR */
315 	/* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
316 	 * value to the device
317 	 */
318 	u8 intrl;
319 
320 	struct napi_struct napi;
321 
322 	struct ice_ring_container rx;
323 	struct ice_ring_container tx;
324 
325 	cpumask_t affinity_mask;
326 	struct irq_affinity_notify affinity_notify;
327 
328 	char name[ICE_INT_NAME_STR_LEN];
329 } ____cacheline_internodealigned_in_smp;
330 
331 enum ice_pf_flags {
332 	ICE_FLAG_FLTR_SYNC,
333 	ICE_FLAG_RSS_ENA,
334 	ICE_FLAG_SRIOV_ENA,
335 	ICE_FLAG_SRIOV_CAPABLE,
336 	ICE_FLAG_DCB_CAPABLE,
337 	ICE_FLAG_DCB_ENA,
338 	ICE_FLAG_ADV_FEATURES,
339 	ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
340 	ICE_FLAG_NO_MEDIA,
341 	ICE_FLAG_FW_LLDP_AGENT,
342 	ICE_FLAG_ETHTOOL_CTXT,		/* set when ethtool holds RTNL lock */
343 	ICE_FLAG_LEGACY_RX,
344 	ICE_FLAG_MDD_AUTO_RESET_VF,
345 	ICE_PF_FLAGS_NBITS		/* must be last */
346 };
347 
348 struct ice_pf {
349 	struct pci_dev *pdev;
350 
351 	/* devlink port data */
352 	struct devlink_port devlink_port;
353 
354 	struct devlink_region *nvm_region;
355 
356 	/* OS reserved IRQ details */
357 	struct msix_entry *msix_entries;
358 	struct ice_res_tracker *irq_tracker;
359 	/* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
360 	 * number of MSIX vectors needed for all SR-IOV VFs from the number of
361 	 * MSIX vectors allowed on this PF.
362 	 */
363 	u16 sriov_base_vector;
364 
365 	struct ice_vsi **vsi;		/* VSIs created by the driver */
366 	struct ice_sw *first_sw;	/* first switch created by firmware */
367 	/* Virtchnl/SR-IOV config info */
368 	struct ice_vf *vf;
369 	int num_alloc_vfs;		/* actual number of VFs allocated */
370 	u16 num_vfs_supported;		/* num VFs supported for this PF */
371 	u16 num_qps_per_vf;
372 	u16 num_msix_per_vf;
373 	/* used to ratelimit the MDD event logging */
374 	unsigned long last_printed_mdd_jiffies;
375 	DECLARE_BITMAP(state, __ICE_STATE_NBITS);
376 	DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
377 	unsigned long *avail_txqs;	/* bitmap to track PF Tx queue usage */
378 	unsigned long *avail_rxqs;	/* bitmap to track PF Rx queue usage */
379 	unsigned long serv_tmr_period;
380 	unsigned long serv_tmr_prev;
381 	struct timer_list serv_tmr;
382 	struct work_struct serv_task;
383 	struct mutex avail_q_mutex;	/* protects access to avail_[rx|tx]qs */
384 	struct mutex sw_mutex;		/* lock for protecting VSI alloc flow */
385 	struct mutex tc_mutex;		/* lock to protect TC changes */
386 	u32 msg_enable;
387 	u32 hw_csum_rx_error;
388 	u32 oicr_idx;		/* Other interrupt cause MSIX vector index */
389 	u32 num_avail_sw_msix;	/* remaining MSIX SW vectors left unclaimed */
390 	u16 max_pf_txqs;	/* Total Tx queues PF wide */
391 	u16 max_pf_rxqs;	/* Total Rx queues PF wide */
392 	u32 num_lan_msix;	/* Total MSIX vectors for base driver */
393 	u16 num_lan_tx;		/* num LAN Tx queues setup */
394 	u16 num_lan_rx;		/* num LAN Rx queues setup */
395 	u16 next_vsi;		/* Next free slot in pf->vsi[] - 0-based! */
396 	u16 num_alloc_vsi;
397 	u16 corer_count;	/* Core reset count */
398 	u16 globr_count;	/* Global reset count */
399 	u16 empr_count;		/* EMP reset count */
400 	u16 pfr_count;		/* PF reset count */
401 
402 	struct ice_hw_port_stats stats;
403 	struct ice_hw_port_stats stats_prev;
404 	struct ice_hw hw;
405 	u8 stat_prev_loaded:1; /* has previous stats been loaded */
406 #ifdef CONFIG_DCB
407 	u16 dcbx_cap;
408 #endif /* CONFIG_DCB */
409 	u32 tx_timeout_count;
410 	unsigned long tx_timeout_last_recovery;
411 	u32 tx_timeout_recovery_level;
412 	char int_name[ICE_INT_NAME_STR_LEN];
413 	u32 sw_int_count;
414 };
415 
416 struct ice_netdev_priv {
417 	struct ice_vsi *vsi;
418 };
419 
420 /**
421  * ice_irq_dynamic_ena - Enable default interrupt generation settings
422  * @hw: pointer to HW struct
423  * @vsi: pointer to VSI struct, can be NULL
424  * @q_vector: pointer to q_vector, can be NULL
425  */
426 static inline void
427 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
428 		    struct ice_q_vector *q_vector)
429 {
430 	u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
431 				((struct ice_pf *)hw->back)->oicr_idx;
432 	int itr = ICE_ITR_NONE;
433 	u32 val;
434 
435 	/* clear the PBA here, as this function is meant to clean out all
436 	 * previous interrupts and enable the interrupt
437 	 */
438 	val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
439 	      (itr << GLINT_DYN_CTL_ITR_INDX_S);
440 	if (vsi)
441 		if (test_bit(__ICE_DOWN, vsi->state))
442 			return;
443 	wr32(hw, GLINT_DYN_CTL(vector), val);
444 }
445 
446 /**
447  * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
448  * @netdev: pointer to the netdev struct
449  */
450 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
451 {
452 	struct ice_netdev_priv *np = netdev_priv(netdev);
453 
454 	return np->vsi->back;
455 }
456 
457 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
458 {
459 	return !!vsi->xdp_prog;
460 }
461 
462 static inline void ice_set_ring_xdp(struct ice_ring *ring)
463 {
464 	ring->flags |= ICE_TX_FLAGS_RING_XDP;
465 }
466 
467 /**
468  * ice_xsk_umem - get XDP UMEM bound to a ring
469  * @ring - ring to use
470  *
471  * Returns a pointer to xdp_umem structure if there is an UMEM present,
472  * NULL otherwise.
473  */
474 static inline struct xdp_umem *ice_xsk_umem(struct ice_ring *ring)
475 {
476 	struct xdp_umem **umems = ring->vsi->xsk_umems;
477 	u16 qid = ring->q_index;
478 
479 	if (ice_ring_is_xdp(ring))
480 		qid -= ring->vsi->num_xdp_txq;
481 
482 	if (qid >= ring->vsi->num_xsk_umems || !umems || !umems[qid] ||
483 	    !ice_is_xdp_ena_vsi(ring->vsi))
484 		return NULL;
485 
486 	return umems[qid];
487 }
488 
489 /**
490  * ice_get_main_vsi - Get the PF VSI
491  * @pf: PF instance
492  *
493  * returns pf->vsi[0], which by definition is the PF VSI
494  */
495 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
496 {
497 	if (pf->vsi)
498 		return pf->vsi[0];
499 
500 	return NULL;
501 }
502 
503 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
504 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
505 void ice_set_ethtool_ops(struct net_device *netdev);
506 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
507 u16 ice_get_avail_txq_count(struct ice_pf *pf);
508 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
509 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
510 void ice_update_vsi_stats(struct ice_vsi *vsi);
511 void ice_update_pf_stats(struct ice_pf *pf);
512 int ice_up(struct ice_vsi *vsi);
513 int ice_down(struct ice_vsi *vsi);
514 int ice_vsi_cfg(struct ice_vsi *vsi);
515 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
516 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
517 int ice_destroy_xdp_rings(struct ice_vsi *vsi);
518 int
519 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
520 	     u32 flags);
521 int ice_set_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
522 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
523 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
524 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
525 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
526 int ice_open(struct net_device *netdev);
527 int ice_stop(struct net_device *netdev);
528 
529 #endif /* _ICE_H_ */
530