1 /* 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/kernel.h> 22 #include <linux/string.h> 23 #include <linux/errno.h> 24 #include <linux/types.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/workqueue.h> 28 #include <linux/pci.h> 29 #include <linux/netdevice.h> 30 #include <linux/etherdevice.h> 31 #include <linux/if.h> 32 #include <linux/if_ether.h> 33 #include <linux/if_vlan.h> 34 #include <linux/in.h> 35 #include <linux/ip.h> 36 #include <linux/ipv6.h> 37 #include <linux/tcp.h> 38 #include <linux/rtnetlink.h> 39 #include <linux/prefetch.h> 40 #include <net/ip6_checksum.h> 41 #include <linux/ktime.h> 42 #ifdef CONFIG_RFS_ACCEL 43 #include <linux/cpu_rmap.h> 44 #endif 45 #ifdef CONFIG_NET_RX_BUSY_POLL 46 #include <net/busy_poll.h> 47 #endif 48 #include <linux/crash_dump.h> 49 50 #include "cq_enet_desc.h" 51 #include "vnic_dev.h" 52 #include "vnic_intr.h" 53 #include "vnic_stats.h" 54 #include "vnic_vic.h" 55 #include "enic_res.h" 56 #include "enic.h" 57 #include "enic_dev.h" 58 #include "enic_pp.h" 59 #include "enic_clsf.h" 60 61 #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ) 62 #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS) 63 #define MAX_TSO (1 << 16) 64 #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1) 65 66 #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */ 67 #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */ 68 #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */ 69 70 #define RX_COPYBREAK_DEFAULT 256 71 72 /* Supported devices */ 73 static const struct pci_device_id enic_id_table[] = { 74 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) }, 75 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) }, 76 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) }, 77 { 0, } /* end of table */ 78 }; 79 80 MODULE_DESCRIPTION(DRV_DESCRIPTION); 81 MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>"); 82 MODULE_LICENSE("GPL"); 83 MODULE_VERSION(DRV_VERSION); 84 MODULE_DEVICE_TABLE(pci, enic_id_table); 85 86 #define ENIC_LARGE_PKT_THRESHOLD 1000 87 #define ENIC_MAX_COALESCE_TIMERS 10 88 /* Interrupt moderation table, which will be used to decide the 89 * coalescing timer values 90 * {rx_rate in Mbps, mapping percentage of the range} 91 */ 92 static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = { 93 {4000, 0}, 94 {4400, 10}, 95 {5060, 20}, 96 {5230, 30}, 97 {5540, 40}, 98 {5820, 50}, 99 {6120, 60}, 100 {6435, 70}, 101 {6745, 80}, 102 {7000, 90}, 103 {0xFFFFFFFF, 100} 104 }; 105 106 /* This table helps the driver to pick different ranges for rx coalescing 107 * timer depending on the link speed. 108 */ 109 static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = { 110 {0, 0}, /* 0 - 4 Gbps */ 111 {0, 3}, /* 4 - 10 Gbps */ 112 {3, 6}, /* 10 - 40 Gbps */ 113 }; 114 115 int enic_is_dynamic(struct enic *enic) 116 { 117 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN; 118 } 119 120 int enic_sriov_enabled(struct enic *enic) 121 { 122 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0; 123 } 124 125 static int enic_is_sriov_vf(struct enic *enic) 126 { 127 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF; 128 } 129 130 int enic_is_valid_vf(struct enic *enic, int vf) 131 { 132 #ifdef CONFIG_PCI_IOV 133 return vf >= 0 && vf < enic->num_vfs; 134 #else 135 return 0; 136 #endif 137 } 138 139 static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf) 140 { 141 struct enic *enic = vnic_dev_priv(wq->vdev); 142 143 if (buf->sop) 144 pci_unmap_single(enic->pdev, buf->dma_addr, 145 buf->len, PCI_DMA_TODEVICE); 146 else 147 pci_unmap_page(enic->pdev, buf->dma_addr, 148 buf->len, PCI_DMA_TODEVICE); 149 150 if (buf->os_buf) 151 dev_kfree_skb_any(buf->os_buf); 152 } 153 154 static void enic_wq_free_buf(struct vnic_wq *wq, 155 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque) 156 { 157 enic_free_wq_buf(wq, buf); 158 } 159 160 static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 161 u8 type, u16 q_number, u16 completed_index, void *opaque) 162 { 163 struct enic *enic = vnic_dev_priv(vdev); 164 165 spin_lock(&enic->wq_lock[q_number]); 166 167 vnic_wq_service(&enic->wq[q_number], cq_desc, 168 completed_index, enic_wq_free_buf, 169 opaque); 170 171 if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) && 172 vnic_wq_desc_avail(&enic->wq[q_number]) >= 173 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)) 174 netif_wake_subqueue(enic->netdev, q_number); 175 176 spin_unlock(&enic->wq_lock[q_number]); 177 178 return 0; 179 } 180 181 static void enic_log_q_error(struct enic *enic) 182 { 183 unsigned int i; 184 u32 error_status; 185 186 for (i = 0; i < enic->wq_count; i++) { 187 error_status = vnic_wq_error_status(&enic->wq[i]); 188 if (error_status) 189 netdev_err(enic->netdev, "WQ[%d] error_status %d\n", 190 i, error_status); 191 } 192 193 for (i = 0; i < enic->rq_count; i++) { 194 error_status = vnic_rq_error_status(&enic->rq[i]); 195 if (error_status) 196 netdev_err(enic->netdev, "RQ[%d] error_status %d\n", 197 i, error_status); 198 } 199 } 200 201 static void enic_msglvl_check(struct enic *enic) 202 { 203 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev); 204 205 if (msg_enable != enic->msg_enable) { 206 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n", 207 enic->msg_enable, msg_enable); 208 enic->msg_enable = msg_enable; 209 } 210 } 211 212 static void enic_mtu_check(struct enic *enic) 213 { 214 u32 mtu = vnic_dev_mtu(enic->vdev); 215 struct net_device *netdev = enic->netdev; 216 217 if (mtu && mtu != enic->port_mtu) { 218 enic->port_mtu = mtu; 219 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 220 mtu = max_t(int, ENIC_MIN_MTU, 221 min_t(int, ENIC_MAX_MTU, mtu)); 222 if (mtu != netdev->mtu) 223 schedule_work(&enic->change_mtu_work); 224 } else { 225 if (mtu < netdev->mtu) 226 netdev_warn(netdev, 227 "interface MTU (%d) set higher " 228 "than switch port MTU (%d)\n", 229 netdev->mtu, mtu); 230 } 231 } 232 } 233 234 static void enic_link_check(struct enic *enic) 235 { 236 int link_status = vnic_dev_link_status(enic->vdev); 237 int carrier_ok = netif_carrier_ok(enic->netdev); 238 239 if (link_status && !carrier_ok) { 240 netdev_info(enic->netdev, "Link UP\n"); 241 netif_carrier_on(enic->netdev); 242 } else if (!link_status && carrier_ok) { 243 netdev_info(enic->netdev, "Link DOWN\n"); 244 netif_carrier_off(enic->netdev); 245 } 246 } 247 248 static void enic_notify_check(struct enic *enic) 249 { 250 enic_msglvl_check(enic); 251 enic_mtu_check(enic); 252 enic_link_check(enic); 253 } 254 255 #define ENIC_TEST_INTR(pba, i) (pba & (1 << i)) 256 257 static irqreturn_t enic_isr_legacy(int irq, void *data) 258 { 259 struct net_device *netdev = data; 260 struct enic *enic = netdev_priv(netdev); 261 unsigned int io_intr = enic_legacy_io_intr(); 262 unsigned int err_intr = enic_legacy_err_intr(); 263 unsigned int notify_intr = enic_legacy_notify_intr(); 264 u32 pba; 265 266 vnic_intr_mask(&enic->intr[io_intr]); 267 268 pba = vnic_intr_legacy_pba(enic->legacy_pba); 269 if (!pba) { 270 vnic_intr_unmask(&enic->intr[io_intr]); 271 return IRQ_NONE; /* not our interrupt */ 272 } 273 274 if (ENIC_TEST_INTR(pba, notify_intr)) { 275 enic_notify_check(enic); 276 vnic_intr_return_all_credits(&enic->intr[notify_intr]); 277 } 278 279 if (ENIC_TEST_INTR(pba, err_intr)) { 280 vnic_intr_return_all_credits(&enic->intr[err_intr]); 281 enic_log_q_error(enic); 282 /* schedule recovery from WQ/RQ error */ 283 schedule_work(&enic->reset); 284 return IRQ_HANDLED; 285 } 286 287 if (ENIC_TEST_INTR(pba, io_intr)) 288 napi_schedule_irqoff(&enic->napi[0]); 289 else 290 vnic_intr_unmask(&enic->intr[io_intr]); 291 292 return IRQ_HANDLED; 293 } 294 295 static irqreturn_t enic_isr_msi(int irq, void *data) 296 { 297 struct enic *enic = data; 298 299 /* With MSI, there is no sharing of interrupts, so this is 300 * our interrupt and there is no need to ack it. The device 301 * is not providing per-vector masking, so the OS will not 302 * write to PCI config space to mask/unmask the interrupt. 303 * We're using mask_on_assertion for MSI, so the device 304 * automatically masks the interrupt when the interrupt is 305 * generated. Later, when exiting polling, the interrupt 306 * will be unmasked (see enic_poll). 307 * 308 * Also, the device uses the same PCIe Traffic Class (TC) 309 * for Memory Write data and MSI, so there are no ordering 310 * issues; the MSI will always arrive at the Root Complex 311 * _after_ corresponding Memory Writes (i.e. descriptor 312 * writes). 313 */ 314 315 napi_schedule_irqoff(&enic->napi[0]); 316 317 return IRQ_HANDLED; 318 } 319 320 static irqreturn_t enic_isr_msix(int irq, void *data) 321 { 322 struct napi_struct *napi = data; 323 324 napi_schedule_irqoff(napi); 325 326 return IRQ_HANDLED; 327 } 328 329 static irqreturn_t enic_isr_msix_err(int irq, void *data) 330 { 331 struct enic *enic = data; 332 unsigned int intr = enic_msix_err_intr(enic); 333 334 vnic_intr_return_all_credits(&enic->intr[intr]); 335 336 enic_log_q_error(enic); 337 338 /* schedule recovery from WQ/RQ error */ 339 schedule_work(&enic->reset); 340 341 return IRQ_HANDLED; 342 } 343 344 static irqreturn_t enic_isr_msix_notify(int irq, void *data) 345 { 346 struct enic *enic = data; 347 unsigned int intr = enic_msix_notify_intr(enic); 348 349 enic_notify_check(enic); 350 vnic_intr_return_all_credits(&enic->intr[intr]); 351 352 return IRQ_HANDLED; 353 } 354 355 static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq, 356 struct sk_buff *skb, unsigned int len_left, 357 int loopback) 358 { 359 const skb_frag_t *frag; 360 dma_addr_t dma_addr; 361 362 /* Queue additional data fragments */ 363 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 364 len_left -= skb_frag_size(frag); 365 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0, 366 skb_frag_size(frag), 367 DMA_TO_DEVICE); 368 if (unlikely(enic_dma_map_check(enic, dma_addr))) 369 return -ENOMEM; 370 enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag), 371 (len_left == 0), /* EOP? */ 372 loopback); 373 } 374 375 return 0; 376 } 377 378 static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq, 379 struct sk_buff *skb, int vlan_tag_insert, 380 unsigned int vlan_tag, int loopback) 381 { 382 unsigned int head_len = skb_headlen(skb); 383 unsigned int len_left = skb->len - head_len; 384 int eop = (len_left == 0); 385 dma_addr_t dma_addr; 386 int err = 0; 387 388 dma_addr = pci_map_single(enic->pdev, skb->data, head_len, 389 PCI_DMA_TODEVICE); 390 if (unlikely(enic_dma_map_check(enic, dma_addr))) 391 return -ENOMEM; 392 393 /* Queue the main skb fragment. The fragments are no larger 394 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 395 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 396 * per fragment is queued. 397 */ 398 enic_queue_wq_desc(wq, skb, dma_addr, head_len, vlan_tag_insert, 399 vlan_tag, eop, loopback); 400 401 if (!eop) 402 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 403 404 return err; 405 } 406 407 static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq, 408 struct sk_buff *skb, int vlan_tag_insert, 409 unsigned int vlan_tag, int loopback) 410 { 411 unsigned int head_len = skb_headlen(skb); 412 unsigned int len_left = skb->len - head_len; 413 unsigned int hdr_len = skb_checksum_start_offset(skb); 414 unsigned int csum_offset = hdr_len + skb->csum_offset; 415 int eop = (len_left == 0); 416 dma_addr_t dma_addr; 417 int err = 0; 418 419 dma_addr = pci_map_single(enic->pdev, skb->data, head_len, 420 PCI_DMA_TODEVICE); 421 if (unlikely(enic_dma_map_check(enic, dma_addr))) 422 return -ENOMEM; 423 424 /* Queue the main skb fragment. The fragments are no larger 425 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less 426 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor 427 * per fragment is queued. 428 */ 429 enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len, csum_offset, 430 hdr_len, vlan_tag_insert, vlan_tag, eop, 431 loopback); 432 433 if (!eop) 434 err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback); 435 436 return err; 437 } 438 439 static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq, 440 struct sk_buff *skb, unsigned int mss, 441 int vlan_tag_insert, unsigned int vlan_tag, 442 int loopback) 443 { 444 unsigned int frag_len_left = skb_headlen(skb); 445 unsigned int len_left = skb->len - frag_len_left; 446 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 447 int eop = (len_left == 0); 448 unsigned int len; 449 dma_addr_t dma_addr; 450 unsigned int offset = 0; 451 skb_frag_t *frag; 452 453 /* Preload TCP csum field with IP pseudo hdr calculated 454 * with IP length set to zero. HW will later add in length 455 * to each TCP segment resulting from the TSO. 456 */ 457 458 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { 459 ip_hdr(skb)->check = 0; 460 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, 461 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 462 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) { 463 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 464 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); 465 } 466 467 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 468 * for the main skb fragment 469 */ 470 while (frag_len_left) { 471 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN); 472 dma_addr = pci_map_single(enic->pdev, skb->data + offset, len, 473 PCI_DMA_TODEVICE); 474 if (unlikely(enic_dma_map_check(enic, dma_addr))) 475 return -ENOMEM; 476 enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len, 477 vlan_tag_insert, vlan_tag, 478 eop && (len == frag_len_left), loopback); 479 frag_len_left -= len; 480 offset += len; 481 } 482 483 if (eop) 484 return 0; 485 486 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors 487 * for additional data fragments 488 */ 489 for (frag = skb_shinfo(skb)->frags; len_left; frag++) { 490 len_left -= skb_frag_size(frag); 491 frag_len_left = skb_frag_size(frag); 492 offset = 0; 493 494 while (frag_len_left) { 495 len = min(frag_len_left, 496 (unsigned int)WQ_ENET_MAX_DESC_LEN); 497 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 498 offset, len, 499 DMA_TO_DEVICE); 500 if (unlikely(enic_dma_map_check(enic, dma_addr))) 501 return -ENOMEM; 502 enic_queue_wq_desc_cont(wq, skb, dma_addr, len, 503 (len_left == 0) && 504 (len == frag_len_left),/*EOP*/ 505 loopback); 506 frag_len_left -= len; 507 offset += len; 508 } 509 } 510 511 return 0; 512 } 513 514 static inline void enic_queue_wq_skb(struct enic *enic, 515 struct vnic_wq *wq, struct sk_buff *skb) 516 { 517 unsigned int mss = skb_shinfo(skb)->gso_size; 518 unsigned int vlan_tag = 0; 519 int vlan_tag_insert = 0; 520 int loopback = 0; 521 int err; 522 523 if (skb_vlan_tag_present(skb)) { 524 /* VLAN tag from trunking driver */ 525 vlan_tag_insert = 1; 526 vlan_tag = skb_vlan_tag_get(skb); 527 } else if (enic->loop_enable) { 528 vlan_tag = enic->loop_tag; 529 loopback = 1; 530 } 531 532 if (mss) 533 err = enic_queue_wq_skb_tso(enic, wq, skb, mss, 534 vlan_tag_insert, vlan_tag, 535 loopback); 536 else if (skb->ip_summed == CHECKSUM_PARTIAL) 537 err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert, 538 vlan_tag, loopback); 539 else 540 err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert, 541 vlan_tag, loopback); 542 if (unlikely(err)) { 543 struct vnic_wq_buf *buf; 544 545 buf = wq->to_use->prev; 546 /* while not EOP of previous pkt && queue not empty. 547 * For all non EOP bufs, os_buf is NULL. 548 */ 549 while (!buf->os_buf && (buf->next != wq->to_clean)) { 550 enic_free_wq_buf(wq, buf); 551 wq->ring.desc_avail++; 552 buf = buf->prev; 553 } 554 wq->to_use = buf->next; 555 dev_kfree_skb(skb); 556 } 557 } 558 559 /* netif_tx_lock held, process context with BHs disabled, or BH */ 560 static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb, 561 struct net_device *netdev) 562 { 563 struct enic *enic = netdev_priv(netdev); 564 struct vnic_wq *wq; 565 unsigned int txq_map; 566 struct netdev_queue *txq; 567 568 if (skb->len <= 0) { 569 dev_kfree_skb_any(skb); 570 return NETDEV_TX_OK; 571 } 572 573 txq_map = skb_get_queue_mapping(skb) % enic->wq_count; 574 wq = &enic->wq[txq_map]; 575 txq = netdev_get_tx_queue(netdev, txq_map); 576 577 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs, 578 * which is very likely. In the off chance it's going to take 579 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb. 580 */ 581 582 if (skb_shinfo(skb)->gso_size == 0 && 583 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC && 584 skb_linearize(skb)) { 585 dev_kfree_skb_any(skb); 586 return NETDEV_TX_OK; 587 } 588 589 spin_lock(&enic->wq_lock[txq_map]); 590 591 if (vnic_wq_desc_avail(wq) < 592 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) { 593 netif_tx_stop_queue(txq); 594 /* This is a hard error, log it */ 595 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n"); 596 spin_unlock(&enic->wq_lock[txq_map]); 597 return NETDEV_TX_BUSY; 598 } 599 600 enic_queue_wq_skb(enic, wq, skb); 601 602 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS) 603 netif_tx_stop_queue(txq); 604 if (!skb->xmit_more || netif_xmit_stopped(txq)) 605 vnic_wq_doorbell(wq); 606 607 spin_unlock(&enic->wq_lock[txq_map]); 608 609 return NETDEV_TX_OK; 610 } 611 612 /* dev_base_lock rwlock held, nominally process context */ 613 static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev, 614 struct rtnl_link_stats64 *net_stats) 615 { 616 struct enic *enic = netdev_priv(netdev); 617 struct vnic_stats *stats; 618 int err; 619 620 err = enic_dev_stats_dump(enic, &stats); 621 /* return only when pci_zalloc_consistent fails in vnic_dev_stats_dump 622 * For other failures, like devcmd failure, we return previously 623 * recorded stats. 624 */ 625 if (err == -ENOMEM) 626 return net_stats; 627 628 net_stats->tx_packets = stats->tx.tx_frames_ok; 629 net_stats->tx_bytes = stats->tx.tx_bytes_ok; 630 net_stats->tx_errors = stats->tx.tx_errors; 631 net_stats->tx_dropped = stats->tx.tx_drops; 632 633 net_stats->rx_packets = stats->rx.rx_frames_ok; 634 net_stats->rx_bytes = stats->rx.rx_bytes_ok; 635 net_stats->rx_errors = stats->rx.rx_errors; 636 net_stats->multicast = stats->rx.rx_multicast_frames_ok; 637 net_stats->rx_over_errors = enic->rq_truncated_pkts; 638 net_stats->rx_crc_errors = enic->rq_bad_fcs; 639 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop; 640 641 return net_stats; 642 } 643 644 static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr) 645 { 646 struct enic *enic = netdev_priv(netdev); 647 648 if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) { 649 unsigned int mc_count = netdev_mc_count(netdev); 650 651 netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n", 652 ENIC_MULTICAST_PERFECT_FILTERS, mc_count); 653 654 return -ENOSPC; 655 } 656 657 enic_dev_add_addr(enic, mc_addr); 658 enic->mc_count++; 659 660 return 0; 661 } 662 663 static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr) 664 { 665 struct enic *enic = netdev_priv(netdev); 666 667 enic_dev_del_addr(enic, mc_addr); 668 enic->mc_count--; 669 670 return 0; 671 } 672 673 static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr) 674 { 675 struct enic *enic = netdev_priv(netdev); 676 677 if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) { 678 unsigned int uc_count = netdev_uc_count(netdev); 679 680 netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n", 681 ENIC_UNICAST_PERFECT_FILTERS, uc_count); 682 683 return -ENOSPC; 684 } 685 686 enic_dev_add_addr(enic, uc_addr); 687 enic->uc_count++; 688 689 return 0; 690 } 691 692 static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr) 693 { 694 struct enic *enic = netdev_priv(netdev); 695 696 enic_dev_del_addr(enic, uc_addr); 697 enic->uc_count--; 698 699 return 0; 700 } 701 702 void enic_reset_addr_lists(struct enic *enic) 703 { 704 struct net_device *netdev = enic->netdev; 705 706 __dev_uc_unsync(netdev, NULL); 707 __dev_mc_unsync(netdev, NULL); 708 709 enic->mc_count = 0; 710 enic->uc_count = 0; 711 enic->flags = 0; 712 } 713 714 static int enic_set_mac_addr(struct net_device *netdev, char *addr) 715 { 716 struct enic *enic = netdev_priv(netdev); 717 718 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) { 719 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr)) 720 return -EADDRNOTAVAIL; 721 } else { 722 if (!is_valid_ether_addr(addr)) 723 return -EADDRNOTAVAIL; 724 } 725 726 memcpy(netdev->dev_addr, addr, netdev->addr_len); 727 728 return 0; 729 } 730 731 static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p) 732 { 733 struct enic *enic = netdev_priv(netdev); 734 struct sockaddr *saddr = p; 735 char *addr = saddr->sa_data; 736 int err; 737 738 if (netif_running(enic->netdev)) { 739 err = enic_dev_del_station_addr(enic); 740 if (err) 741 return err; 742 } 743 744 err = enic_set_mac_addr(netdev, addr); 745 if (err) 746 return err; 747 748 if (netif_running(enic->netdev)) { 749 err = enic_dev_add_station_addr(enic); 750 if (err) 751 return err; 752 } 753 754 return err; 755 } 756 757 static int enic_set_mac_address(struct net_device *netdev, void *p) 758 { 759 struct sockaddr *saddr = p; 760 char *addr = saddr->sa_data; 761 struct enic *enic = netdev_priv(netdev); 762 int err; 763 764 err = enic_dev_del_station_addr(enic); 765 if (err) 766 return err; 767 768 err = enic_set_mac_addr(netdev, addr); 769 if (err) 770 return err; 771 772 return enic_dev_add_station_addr(enic); 773 } 774 775 /* netif_tx_lock held, BHs disabled */ 776 static void enic_set_rx_mode(struct net_device *netdev) 777 { 778 struct enic *enic = netdev_priv(netdev); 779 int directed = 1; 780 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0; 781 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0; 782 int promisc = (netdev->flags & IFF_PROMISC) || 783 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS; 784 int allmulti = (netdev->flags & IFF_ALLMULTI) || 785 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS; 786 unsigned int flags = netdev->flags | 787 (allmulti ? IFF_ALLMULTI : 0) | 788 (promisc ? IFF_PROMISC : 0); 789 790 if (enic->flags != flags) { 791 enic->flags = flags; 792 enic_dev_packet_filter(enic, directed, 793 multicast, broadcast, promisc, allmulti); 794 } 795 796 if (!promisc) { 797 __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync); 798 if (!allmulti) 799 __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync); 800 } 801 } 802 803 /* netif_tx_lock held, BHs disabled */ 804 static void enic_tx_timeout(struct net_device *netdev) 805 { 806 struct enic *enic = netdev_priv(netdev); 807 schedule_work(&enic->reset); 808 } 809 810 static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac) 811 { 812 struct enic *enic = netdev_priv(netdev); 813 struct enic_port_profile *pp; 814 int err; 815 816 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 817 if (err) 818 return err; 819 820 if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) { 821 if (vf == PORT_SELF_VF) { 822 memcpy(pp->vf_mac, mac, ETH_ALEN); 823 return 0; 824 } else { 825 /* 826 * For sriov vf's set the mac in hw 827 */ 828 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 829 vnic_dev_set_mac_addr, mac); 830 return enic_dev_status_to_errno(err); 831 } 832 } else 833 return -EINVAL; 834 } 835 836 static int enic_set_vf_port(struct net_device *netdev, int vf, 837 struct nlattr *port[]) 838 { 839 struct enic *enic = netdev_priv(netdev); 840 struct enic_port_profile prev_pp; 841 struct enic_port_profile *pp; 842 int err = 0, restore_pp = 1; 843 844 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 845 if (err) 846 return err; 847 848 if (!port[IFLA_PORT_REQUEST]) 849 return -EOPNOTSUPP; 850 851 memcpy(&prev_pp, pp, sizeof(*enic->pp)); 852 memset(pp, 0, sizeof(*enic->pp)); 853 854 pp->set |= ENIC_SET_REQUEST; 855 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]); 856 857 if (port[IFLA_PORT_PROFILE]) { 858 pp->set |= ENIC_SET_NAME; 859 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]), 860 PORT_PROFILE_MAX); 861 } 862 863 if (port[IFLA_PORT_INSTANCE_UUID]) { 864 pp->set |= ENIC_SET_INSTANCE; 865 memcpy(pp->instance_uuid, 866 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX); 867 } 868 869 if (port[IFLA_PORT_HOST_UUID]) { 870 pp->set |= ENIC_SET_HOST; 871 memcpy(pp->host_uuid, 872 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX); 873 } 874 875 if (vf == PORT_SELF_VF) { 876 /* Special case handling: mac came from IFLA_VF_MAC */ 877 if (!is_zero_ether_addr(prev_pp.vf_mac)) 878 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN); 879 880 if (is_zero_ether_addr(netdev->dev_addr)) 881 eth_hw_addr_random(netdev); 882 } else { 883 /* SR-IOV VF: get mac from adapter */ 884 ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic, 885 vnic_dev_get_mac_addr, pp->mac_addr); 886 if (err) { 887 netdev_err(netdev, "Error getting mac for vf %d\n", vf); 888 memcpy(pp, &prev_pp, sizeof(*pp)); 889 return enic_dev_status_to_errno(err); 890 } 891 } 892 893 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp); 894 if (err) { 895 if (restore_pp) { 896 /* Things are still the way they were: Implicit 897 * DISASSOCIATE failed 898 */ 899 memcpy(pp, &prev_pp, sizeof(*pp)); 900 } else { 901 memset(pp, 0, sizeof(*pp)); 902 if (vf == PORT_SELF_VF) 903 eth_zero_addr(netdev->dev_addr); 904 } 905 } else { 906 /* Set flag to indicate that the port assoc/disassoc 907 * request has been sent out to fw 908 */ 909 pp->set |= ENIC_PORT_REQUEST_APPLIED; 910 911 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */ 912 if (pp->request == PORT_REQUEST_DISASSOCIATE) { 913 eth_zero_addr(pp->mac_addr); 914 if (vf == PORT_SELF_VF) 915 eth_zero_addr(netdev->dev_addr); 916 } 917 } 918 919 if (vf == PORT_SELF_VF) 920 eth_zero_addr(pp->vf_mac); 921 922 return err; 923 } 924 925 static int enic_get_vf_port(struct net_device *netdev, int vf, 926 struct sk_buff *skb) 927 { 928 struct enic *enic = netdev_priv(netdev); 929 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 930 struct enic_port_profile *pp; 931 int err; 932 933 ENIC_PP_BY_INDEX(enic, vf, pp, &err); 934 if (err) 935 return err; 936 937 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED)) 938 return -ENODATA; 939 940 err = enic_process_get_pp_request(enic, vf, pp->request, &response); 941 if (err) 942 return err; 943 944 if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) || 945 nla_put_u16(skb, IFLA_PORT_RESPONSE, response) || 946 ((pp->set & ENIC_SET_NAME) && 947 nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) || 948 ((pp->set & ENIC_SET_INSTANCE) && 949 nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX, 950 pp->instance_uuid)) || 951 ((pp->set & ENIC_SET_HOST) && 952 nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid))) 953 goto nla_put_failure; 954 return 0; 955 956 nla_put_failure: 957 return -EMSGSIZE; 958 } 959 960 static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf) 961 { 962 struct enic *enic = vnic_dev_priv(rq->vdev); 963 964 if (!buf->os_buf) 965 return; 966 967 pci_unmap_single(enic->pdev, buf->dma_addr, 968 buf->len, PCI_DMA_FROMDEVICE); 969 dev_kfree_skb_any(buf->os_buf); 970 buf->os_buf = NULL; 971 } 972 973 static int enic_rq_alloc_buf(struct vnic_rq *rq) 974 { 975 struct enic *enic = vnic_dev_priv(rq->vdev); 976 struct net_device *netdev = enic->netdev; 977 struct sk_buff *skb; 978 unsigned int len = netdev->mtu + VLAN_ETH_HLEN; 979 unsigned int os_buf_index = 0; 980 dma_addr_t dma_addr; 981 struct vnic_rq_buf *buf = rq->to_use; 982 983 if (buf->os_buf) { 984 enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr, 985 buf->len); 986 987 return 0; 988 } 989 skb = netdev_alloc_skb_ip_align(netdev, len); 990 if (!skb) 991 return -ENOMEM; 992 993 dma_addr = pci_map_single(enic->pdev, skb->data, len, 994 PCI_DMA_FROMDEVICE); 995 if (unlikely(enic_dma_map_check(enic, dma_addr))) { 996 dev_kfree_skb(skb); 997 return -ENOMEM; 998 } 999 1000 enic_queue_rq_desc(rq, skb, os_buf_index, 1001 dma_addr, len); 1002 1003 return 0; 1004 } 1005 1006 static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size, 1007 u32 pkt_len) 1008 { 1009 if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len) 1010 pkt_size->large_pkt_bytes_cnt += pkt_len; 1011 else 1012 pkt_size->small_pkt_bytes_cnt += pkt_len; 1013 } 1014 1015 static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb, 1016 struct vnic_rq_buf *buf, u16 len) 1017 { 1018 struct enic *enic = netdev_priv(netdev); 1019 struct sk_buff *new_skb; 1020 1021 if (len > enic->rx_copybreak) 1022 return false; 1023 new_skb = netdev_alloc_skb_ip_align(netdev, len); 1024 if (!new_skb) 1025 return false; 1026 pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len, 1027 DMA_FROM_DEVICE); 1028 memcpy(new_skb->data, (*skb)->data, len); 1029 *skb = new_skb; 1030 1031 return true; 1032 } 1033 1034 static void enic_rq_indicate_buf(struct vnic_rq *rq, 1035 struct cq_desc *cq_desc, struct vnic_rq_buf *buf, 1036 int skipped, void *opaque) 1037 { 1038 struct enic *enic = vnic_dev_priv(rq->vdev); 1039 struct net_device *netdev = enic->netdev; 1040 struct sk_buff *skb; 1041 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1042 1043 u8 type, color, eop, sop, ingress_port, vlan_stripped; 1044 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof; 1045 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok; 1046 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc; 1047 u8 packet_error; 1048 u16 q_number, completed_index, bytes_written, vlan_tci, checksum; 1049 u32 rss_hash; 1050 1051 if (skipped) 1052 return; 1053 1054 skb = buf->os_buf; 1055 1056 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc, 1057 &type, &color, &q_number, &completed_index, 1058 &ingress_port, &fcoe, &eop, &sop, &rss_type, 1059 &csum_not_calc, &rss_hash, &bytes_written, 1060 &packet_error, &vlan_stripped, &vlan_tci, &checksum, 1061 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error, 1062 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp, 1063 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment, 1064 &fcs_ok); 1065 1066 if (packet_error) { 1067 1068 if (!fcs_ok) { 1069 if (bytes_written > 0) 1070 enic->rq_bad_fcs++; 1071 else if (bytes_written == 0) 1072 enic->rq_truncated_pkts++; 1073 } 1074 1075 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1076 PCI_DMA_FROMDEVICE); 1077 dev_kfree_skb_any(skb); 1078 buf->os_buf = NULL; 1079 1080 return; 1081 } 1082 1083 if (eop && bytes_written > 0) { 1084 1085 /* Good receive 1086 */ 1087 1088 if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) { 1089 buf->os_buf = NULL; 1090 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1091 PCI_DMA_FROMDEVICE); 1092 } 1093 prefetch(skb->data - NET_IP_ALIGN); 1094 1095 skb_put(skb, bytes_written); 1096 skb->protocol = eth_type_trans(skb, netdev); 1097 skb_record_rx_queue(skb, q_number); 1098 if (netdev->features & NETIF_F_RXHASH) { 1099 skb_set_hash(skb, rss_hash, 1100 (rss_type & 1101 (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX | 1102 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 | 1103 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ? 1104 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); 1105 } 1106 1107 /* Hardware does not provide whole packet checksum. It only 1108 * provides pseudo checksum. Since hw validates the packet 1109 * checksum but not provide us the checksum value. use 1110 * CHECSUM_UNNECESSARY. 1111 */ 1112 if ((netdev->features & NETIF_F_RXCSUM) && tcp_udp_csum_ok && 1113 ipv4_csum_ok) 1114 skb->ip_summed = CHECKSUM_UNNECESSARY; 1115 1116 if (vlan_stripped) 1117 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci); 1118 1119 skb_mark_napi_id(skb, &enic->napi[rq->index]); 1120 if (enic_poll_busy_polling(rq) || 1121 !(netdev->features & NETIF_F_GRO)) 1122 netif_receive_skb(skb); 1123 else 1124 napi_gro_receive(&enic->napi[q_number], skb); 1125 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1126 enic_intr_update_pkt_size(&cq->pkt_size_counter, 1127 bytes_written); 1128 } else { 1129 1130 /* Buffer overflow 1131 */ 1132 1133 pci_unmap_single(enic->pdev, buf->dma_addr, buf->len, 1134 PCI_DMA_FROMDEVICE); 1135 dev_kfree_skb_any(skb); 1136 buf->os_buf = NULL; 1137 } 1138 } 1139 1140 static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc, 1141 u8 type, u16 q_number, u16 completed_index, void *opaque) 1142 { 1143 struct enic *enic = vnic_dev_priv(vdev); 1144 1145 vnic_rq_service(&enic->rq[q_number], cq_desc, 1146 completed_index, VNIC_RQ_RETURN_DESC, 1147 enic_rq_indicate_buf, opaque); 1148 1149 return 0; 1150 } 1151 1152 static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq) 1153 { 1154 unsigned int intr = enic_msix_rq_intr(enic, rq->index); 1155 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1156 u32 timer = cq->tobe_rx_coal_timeval; 1157 1158 if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) { 1159 vnic_intr_coalescing_timer_set(&enic->intr[intr], timer); 1160 cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval; 1161 } 1162 } 1163 1164 static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq) 1165 { 1166 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1167 struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)]; 1168 struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter; 1169 int index; 1170 u32 timer; 1171 u32 range_start; 1172 u32 traffic; 1173 u64 delta; 1174 ktime_t now = ktime_get(); 1175 1176 delta = ktime_us_delta(now, cq->prev_ts); 1177 if (delta < ENIC_AIC_TS_BREAK) 1178 return; 1179 cq->prev_ts = now; 1180 1181 traffic = pkt_size_counter->large_pkt_bytes_cnt + 1182 pkt_size_counter->small_pkt_bytes_cnt; 1183 /* The table takes Mbps 1184 * traffic *= 8 => bits 1185 * traffic *= (10^6 / delta) => bps 1186 * traffic /= 10^6 => Mbps 1187 * 1188 * Combining, traffic *= (8 / delta) 1189 */ 1190 1191 traffic <<= 3; 1192 traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta; 1193 1194 for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++) 1195 if (traffic < mod_table[index].rx_rate) 1196 break; 1197 range_start = (pkt_size_counter->small_pkt_bytes_cnt > 1198 pkt_size_counter->large_pkt_bytes_cnt << 1) ? 1199 rx_coal->small_pkt_range_start : 1200 rx_coal->large_pkt_range_start; 1201 timer = range_start + ((rx_coal->range_end - range_start) * 1202 mod_table[index].range_percent / 100); 1203 /* Damping */ 1204 cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1; 1205 1206 pkt_size_counter->large_pkt_bytes_cnt = 0; 1207 pkt_size_counter->small_pkt_bytes_cnt = 0; 1208 } 1209 1210 static int enic_poll(struct napi_struct *napi, int budget) 1211 { 1212 struct net_device *netdev = napi->dev; 1213 struct enic *enic = netdev_priv(netdev); 1214 unsigned int cq_rq = enic_cq_rq(enic, 0); 1215 unsigned int cq_wq = enic_cq_wq(enic, 0); 1216 unsigned int intr = enic_legacy_io_intr(); 1217 unsigned int rq_work_to_do = budget; 1218 unsigned int wq_work_to_do = -1; /* no limit */ 1219 unsigned int work_done, rq_work_done = 0, wq_work_done; 1220 int err; 1221 1222 wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do, 1223 enic_wq_service, NULL); 1224 1225 if (!enic_poll_lock_napi(&enic->rq[cq_rq])) { 1226 if (wq_work_done > 0) 1227 vnic_intr_return_credits(&enic->intr[intr], 1228 wq_work_done, 1229 0 /* dont unmask intr */, 1230 0 /* dont reset intr timer */); 1231 return budget; 1232 } 1233 1234 if (budget > 0) 1235 rq_work_done = vnic_cq_service(&enic->cq[cq_rq], 1236 rq_work_to_do, enic_rq_service, NULL); 1237 1238 /* Accumulate intr event credits for this polling 1239 * cycle. An intr event is the completion of a 1240 * a WQ or RQ packet. 1241 */ 1242 1243 work_done = rq_work_done + wq_work_done; 1244 1245 if (work_done > 0) 1246 vnic_intr_return_credits(&enic->intr[intr], 1247 work_done, 1248 0 /* don't unmask intr */, 1249 0 /* don't reset intr timer */); 1250 1251 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1252 enic_poll_unlock_napi(&enic->rq[cq_rq], napi); 1253 1254 /* Buffer allocation failed. Stay in polling 1255 * mode so we can try to fill the ring again. 1256 */ 1257 1258 if (err) 1259 rq_work_done = rq_work_to_do; 1260 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1261 /* Call the function which refreshes the intr coalescing timer 1262 * value based on the traffic. 1263 */ 1264 enic_calc_int_moderation(enic, &enic->rq[0]); 1265 1266 if (rq_work_done < rq_work_to_do) { 1267 1268 /* Some work done, but not enough to stay in polling, 1269 * exit polling 1270 */ 1271 1272 napi_complete(napi); 1273 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1274 enic_set_int_moderation(enic, &enic->rq[0]); 1275 vnic_intr_unmask(&enic->intr[intr]); 1276 } 1277 1278 return rq_work_done; 1279 } 1280 1281 #ifdef CONFIG_RFS_ACCEL 1282 static void enic_free_rx_cpu_rmap(struct enic *enic) 1283 { 1284 free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap); 1285 enic->netdev->rx_cpu_rmap = NULL; 1286 } 1287 1288 static void enic_set_rx_cpu_rmap(struct enic *enic) 1289 { 1290 int i, res; 1291 1292 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) { 1293 enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count); 1294 if (unlikely(!enic->netdev->rx_cpu_rmap)) 1295 return; 1296 for (i = 0; i < enic->rq_count; i++) { 1297 res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap, 1298 enic->msix_entry[i].vector); 1299 if (unlikely(res)) { 1300 enic_free_rx_cpu_rmap(enic); 1301 return; 1302 } 1303 } 1304 } 1305 } 1306 1307 #else 1308 1309 static void enic_free_rx_cpu_rmap(struct enic *enic) 1310 { 1311 } 1312 1313 static void enic_set_rx_cpu_rmap(struct enic *enic) 1314 { 1315 } 1316 1317 #endif /* CONFIG_RFS_ACCEL */ 1318 1319 #ifdef CONFIG_NET_RX_BUSY_POLL 1320 static int enic_busy_poll(struct napi_struct *napi) 1321 { 1322 struct net_device *netdev = napi->dev; 1323 struct enic *enic = netdev_priv(netdev); 1324 unsigned int rq = (napi - &enic->napi[0]); 1325 unsigned int cq = enic_cq_rq(enic, rq); 1326 unsigned int intr = enic_msix_rq_intr(enic, rq); 1327 unsigned int work_to_do = -1; /* clean all pkts possible */ 1328 unsigned int work_done; 1329 1330 if (!enic_poll_lock_poll(&enic->rq[rq])) 1331 return LL_FLUSH_BUSY; 1332 work_done = vnic_cq_service(&enic->cq[cq], work_to_do, 1333 enic_rq_service, NULL); 1334 1335 if (work_done > 0) 1336 vnic_intr_return_credits(&enic->intr[intr], 1337 work_done, 0, 0); 1338 vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1339 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1340 enic_calc_int_moderation(enic, &enic->rq[rq]); 1341 enic_poll_unlock_poll(&enic->rq[rq]); 1342 1343 return work_done; 1344 } 1345 #endif /* CONFIG_NET_RX_BUSY_POLL */ 1346 1347 static int enic_poll_msix_wq(struct napi_struct *napi, int budget) 1348 { 1349 struct net_device *netdev = napi->dev; 1350 struct enic *enic = netdev_priv(netdev); 1351 unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count; 1352 struct vnic_wq *wq = &enic->wq[wq_index]; 1353 unsigned int cq; 1354 unsigned int intr; 1355 unsigned int wq_work_to_do = -1; /* clean all desc possible */ 1356 unsigned int wq_work_done; 1357 unsigned int wq_irq; 1358 1359 wq_irq = wq->index; 1360 cq = enic_cq_wq(enic, wq_irq); 1361 intr = enic_msix_wq_intr(enic, wq_irq); 1362 wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do, 1363 enic_wq_service, NULL); 1364 1365 vnic_intr_return_credits(&enic->intr[intr], wq_work_done, 1366 0 /* don't unmask intr */, 1367 1 /* reset intr timer */); 1368 if (!wq_work_done) { 1369 napi_complete(napi); 1370 vnic_intr_unmask(&enic->intr[intr]); 1371 return 0; 1372 } 1373 1374 return budget; 1375 } 1376 1377 static int enic_poll_msix_rq(struct napi_struct *napi, int budget) 1378 { 1379 struct net_device *netdev = napi->dev; 1380 struct enic *enic = netdev_priv(netdev); 1381 unsigned int rq = (napi - &enic->napi[0]); 1382 unsigned int cq = enic_cq_rq(enic, rq); 1383 unsigned int intr = enic_msix_rq_intr(enic, rq); 1384 unsigned int work_to_do = budget; 1385 unsigned int work_done = 0; 1386 int err; 1387 1388 if (!enic_poll_lock_napi(&enic->rq[rq])) 1389 return budget; 1390 /* Service RQ 1391 */ 1392 1393 if (budget > 0) 1394 work_done = vnic_cq_service(&enic->cq[cq], 1395 work_to_do, enic_rq_service, NULL); 1396 1397 /* Return intr event credits for this polling 1398 * cycle. An intr event is the completion of a 1399 * RQ packet. 1400 */ 1401 1402 if (work_done > 0) 1403 vnic_intr_return_credits(&enic->intr[intr], 1404 work_done, 1405 0 /* don't unmask intr */, 1406 0 /* don't reset intr timer */); 1407 1408 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf); 1409 1410 /* Buffer allocation failed. Stay in polling mode 1411 * so we can try to fill the ring again. 1412 */ 1413 1414 if (err) 1415 work_done = work_to_do; 1416 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1417 /* Call the function which refreshes the intr coalescing timer 1418 * value based on the traffic. 1419 */ 1420 enic_calc_int_moderation(enic, &enic->rq[rq]); 1421 1422 enic_poll_unlock_napi(&enic->rq[rq], napi); 1423 if (work_done < work_to_do) { 1424 1425 /* Some work done, but not enough to stay in polling, 1426 * exit polling 1427 */ 1428 1429 napi_complete(napi); 1430 if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce) 1431 enic_set_int_moderation(enic, &enic->rq[rq]); 1432 vnic_intr_unmask(&enic->intr[intr]); 1433 } 1434 1435 return work_done; 1436 } 1437 1438 static void enic_notify_timer(unsigned long data) 1439 { 1440 struct enic *enic = (struct enic *)data; 1441 1442 enic_notify_check(enic); 1443 1444 mod_timer(&enic->notify_timer, 1445 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD)); 1446 } 1447 1448 static void enic_free_intr(struct enic *enic) 1449 { 1450 struct net_device *netdev = enic->netdev; 1451 unsigned int i; 1452 1453 enic_free_rx_cpu_rmap(enic); 1454 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1455 case VNIC_DEV_INTR_MODE_INTX: 1456 free_irq(enic->pdev->irq, netdev); 1457 break; 1458 case VNIC_DEV_INTR_MODE_MSI: 1459 free_irq(enic->pdev->irq, enic); 1460 break; 1461 case VNIC_DEV_INTR_MODE_MSIX: 1462 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1463 if (enic->msix[i].requested) 1464 free_irq(enic->msix_entry[i].vector, 1465 enic->msix[i].devid); 1466 break; 1467 default: 1468 break; 1469 } 1470 } 1471 1472 static int enic_request_intr(struct enic *enic) 1473 { 1474 struct net_device *netdev = enic->netdev; 1475 unsigned int i, intr; 1476 int err = 0; 1477 1478 enic_set_rx_cpu_rmap(enic); 1479 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1480 1481 case VNIC_DEV_INTR_MODE_INTX: 1482 1483 err = request_irq(enic->pdev->irq, enic_isr_legacy, 1484 IRQF_SHARED, netdev->name, netdev); 1485 break; 1486 1487 case VNIC_DEV_INTR_MODE_MSI: 1488 1489 err = request_irq(enic->pdev->irq, enic_isr_msi, 1490 0, netdev->name, enic); 1491 break; 1492 1493 case VNIC_DEV_INTR_MODE_MSIX: 1494 1495 for (i = 0; i < enic->rq_count; i++) { 1496 intr = enic_msix_rq_intr(enic, i); 1497 snprintf(enic->msix[intr].devname, 1498 sizeof(enic->msix[intr].devname), 1499 "%.11s-rx-%d", netdev->name, i); 1500 enic->msix[intr].isr = enic_isr_msix; 1501 enic->msix[intr].devid = &enic->napi[i]; 1502 } 1503 1504 for (i = 0; i < enic->wq_count; i++) { 1505 int wq = enic_cq_wq(enic, i); 1506 1507 intr = enic_msix_wq_intr(enic, i); 1508 snprintf(enic->msix[intr].devname, 1509 sizeof(enic->msix[intr].devname), 1510 "%.11s-tx-%d", netdev->name, i); 1511 enic->msix[intr].isr = enic_isr_msix; 1512 enic->msix[intr].devid = &enic->napi[wq]; 1513 } 1514 1515 intr = enic_msix_err_intr(enic); 1516 snprintf(enic->msix[intr].devname, 1517 sizeof(enic->msix[intr].devname), 1518 "%.11s-err", netdev->name); 1519 enic->msix[intr].isr = enic_isr_msix_err; 1520 enic->msix[intr].devid = enic; 1521 1522 intr = enic_msix_notify_intr(enic); 1523 snprintf(enic->msix[intr].devname, 1524 sizeof(enic->msix[intr].devname), 1525 "%.11s-notify", netdev->name); 1526 enic->msix[intr].isr = enic_isr_msix_notify; 1527 enic->msix[intr].devid = enic; 1528 1529 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) 1530 enic->msix[i].requested = 0; 1531 1532 for (i = 0; i < enic->intr_count; i++) { 1533 err = request_irq(enic->msix_entry[i].vector, 1534 enic->msix[i].isr, 0, 1535 enic->msix[i].devname, 1536 enic->msix[i].devid); 1537 if (err) { 1538 enic_free_intr(enic); 1539 break; 1540 } 1541 enic->msix[i].requested = 1; 1542 } 1543 1544 break; 1545 1546 default: 1547 break; 1548 } 1549 1550 return err; 1551 } 1552 1553 static void enic_synchronize_irqs(struct enic *enic) 1554 { 1555 unsigned int i; 1556 1557 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1558 case VNIC_DEV_INTR_MODE_INTX: 1559 case VNIC_DEV_INTR_MODE_MSI: 1560 synchronize_irq(enic->pdev->irq); 1561 break; 1562 case VNIC_DEV_INTR_MODE_MSIX: 1563 for (i = 0; i < enic->intr_count; i++) 1564 synchronize_irq(enic->msix_entry[i].vector); 1565 break; 1566 default: 1567 break; 1568 } 1569 } 1570 1571 static void enic_set_rx_coal_setting(struct enic *enic) 1572 { 1573 unsigned int speed; 1574 int index = -1; 1575 struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting; 1576 1577 /* 1. Read the link speed from fw 1578 * 2. Pick the default range for the speed 1579 * 3. Update it in enic->rx_coalesce_setting 1580 */ 1581 speed = vnic_dev_port_speed(enic->vdev); 1582 if (ENIC_LINK_SPEED_10G < speed) 1583 index = ENIC_LINK_40G_INDEX; 1584 else if (ENIC_LINK_SPEED_4G < speed) 1585 index = ENIC_LINK_10G_INDEX; 1586 else 1587 index = ENIC_LINK_4G_INDEX; 1588 1589 rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start; 1590 rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start; 1591 rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END; 1592 1593 /* Start with the value provided by UCSM */ 1594 for (index = 0; index < enic->rq_count; index++) 1595 enic->cq[index].cur_rx_coal_timeval = 1596 enic->config.intr_timer_usec; 1597 1598 rx_coal->use_adaptive_rx_coalesce = 1; 1599 } 1600 1601 static int enic_dev_notify_set(struct enic *enic) 1602 { 1603 int err; 1604 1605 spin_lock_bh(&enic->devcmd_lock); 1606 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1607 case VNIC_DEV_INTR_MODE_INTX: 1608 err = vnic_dev_notify_set(enic->vdev, 1609 enic_legacy_notify_intr()); 1610 break; 1611 case VNIC_DEV_INTR_MODE_MSIX: 1612 err = vnic_dev_notify_set(enic->vdev, 1613 enic_msix_notify_intr(enic)); 1614 break; 1615 default: 1616 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */); 1617 break; 1618 } 1619 spin_unlock_bh(&enic->devcmd_lock); 1620 1621 return err; 1622 } 1623 1624 static void enic_notify_timer_start(struct enic *enic) 1625 { 1626 switch (vnic_dev_get_intr_mode(enic->vdev)) { 1627 case VNIC_DEV_INTR_MODE_MSI: 1628 mod_timer(&enic->notify_timer, jiffies); 1629 break; 1630 default: 1631 /* Using intr for notification for INTx/MSI-X */ 1632 break; 1633 } 1634 } 1635 1636 /* rtnl lock is held, process context */ 1637 static int enic_open(struct net_device *netdev) 1638 { 1639 struct enic *enic = netdev_priv(netdev); 1640 unsigned int i; 1641 int err; 1642 1643 err = enic_request_intr(enic); 1644 if (err) { 1645 netdev_err(netdev, "Unable to request irq.\n"); 1646 return err; 1647 } 1648 1649 err = enic_dev_notify_set(enic); 1650 if (err) { 1651 netdev_err(netdev, 1652 "Failed to alloc notify buffer, aborting.\n"); 1653 goto err_out_free_intr; 1654 } 1655 1656 for (i = 0; i < enic->rq_count; i++) { 1657 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf); 1658 /* Need at least one buffer on ring to get going */ 1659 if (vnic_rq_desc_used(&enic->rq[i]) == 0) { 1660 netdev_err(netdev, "Unable to alloc receive buffers\n"); 1661 err = -ENOMEM; 1662 goto err_out_free_rq; 1663 } 1664 } 1665 1666 for (i = 0; i < enic->wq_count; i++) 1667 vnic_wq_enable(&enic->wq[i]); 1668 for (i = 0; i < enic->rq_count; i++) 1669 vnic_rq_enable(&enic->rq[i]); 1670 1671 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1672 enic_dev_add_station_addr(enic); 1673 1674 enic_set_rx_mode(netdev); 1675 1676 netif_tx_wake_all_queues(netdev); 1677 1678 for (i = 0; i < enic->rq_count; i++) { 1679 enic_busy_poll_init_lock(&enic->rq[i]); 1680 napi_enable(&enic->napi[i]); 1681 } 1682 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1683 for (i = 0; i < enic->wq_count; i++) 1684 napi_enable(&enic->napi[enic_cq_wq(enic, i)]); 1685 enic_dev_enable(enic); 1686 1687 for (i = 0; i < enic->intr_count; i++) 1688 vnic_intr_unmask(&enic->intr[i]); 1689 1690 enic_notify_timer_start(enic); 1691 enic_rfs_flw_tbl_init(enic); 1692 1693 return 0; 1694 1695 err_out_free_rq: 1696 for (i = 0; i < enic->rq_count; i++) 1697 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1698 enic_dev_notify_unset(enic); 1699 err_out_free_intr: 1700 enic_free_intr(enic); 1701 1702 return err; 1703 } 1704 1705 /* rtnl lock is held, process context */ 1706 static int enic_stop(struct net_device *netdev) 1707 { 1708 struct enic *enic = netdev_priv(netdev); 1709 unsigned int i; 1710 int err; 1711 1712 for (i = 0; i < enic->intr_count; i++) { 1713 vnic_intr_mask(&enic->intr[i]); 1714 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */ 1715 } 1716 1717 enic_synchronize_irqs(enic); 1718 1719 del_timer_sync(&enic->notify_timer); 1720 enic_rfs_flw_tbl_free(enic); 1721 1722 enic_dev_disable(enic); 1723 1724 for (i = 0; i < enic->rq_count; i++) { 1725 napi_disable(&enic->napi[i]); 1726 local_bh_disable(); 1727 while (!enic_poll_lock_napi(&enic->rq[i])) 1728 mdelay(1); 1729 local_bh_enable(); 1730 } 1731 1732 netif_carrier_off(netdev); 1733 netif_tx_disable(netdev); 1734 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 1735 for (i = 0; i < enic->wq_count; i++) 1736 napi_disable(&enic->napi[enic_cq_wq(enic, i)]); 1737 1738 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) 1739 enic_dev_del_station_addr(enic); 1740 1741 for (i = 0; i < enic->wq_count; i++) { 1742 err = vnic_wq_disable(&enic->wq[i]); 1743 if (err) 1744 return err; 1745 } 1746 for (i = 0; i < enic->rq_count; i++) { 1747 err = vnic_rq_disable(&enic->rq[i]); 1748 if (err) 1749 return err; 1750 } 1751 1752 enic_dev_notify_unset(enic); 1753 enic_free_intr(enic); 1754 1755 for (i = 0; i < enic->wq_count; i++) 1756 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf); 1757 for (i = 0; i < enic->rq_count; i++) 1758 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf); 1759 for (i = 0; i < enic->cq_count; i++) 1760 vnic_cq_clean(&enic->cq[i]); 1761 for (i = 0; i < enic->intr_count; i++) 1762 vnic_intr_clean(&enic->intr[i]); 1763 1764 return 0; 1765 } 1766 1767 static int enic_change_mtu(struct net_device *netdev, int new_mtu) 1768 { 1769 struct enic *enic = netdev_priv(netdev); 1770 int running = netif_running(netdev); 1771 1772 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU) 1773 return -EINVAL; 1774 1775 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 1776 return -EOPNOTSUPP; 1777 1778 if (running) 1779 enic_stop(netdev); 1780 1781 netdev->mtu = new_mtu; 1782 1783 if (netdev->mtu > enic->port_mtu) 1784 netdev_warn(netdev, 1785 "interface MTU (%d) set higher than port MTU (%d)\n", 1786 netdev->mtu, enic->port_mtu); 1787 1788 if (running) 1789 enic_open(netdev); 1790 1791 return 0; 1792 } 1793 1794 static void enic_change_mtu_work(struct work_struct *work) 1795 { 1796 struct enic *enic = container_of(work, struct enic, change_mtu_work); 1797 struct net_device *netdev = enic->netdev; 1798 int new_mtu = vnic_dev_mtu(enic->vdev); 1799 int err; 1800 unsigned int i; 1801 1802 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu)); 1803 1804 rtnl_lock(); 1805 1806 /* Stop RQ */ 1807 del_timer_sync(&enic->notify_timer); 1808 1809 for (i = 0; i < enic->rq_count; i++) 1810 napi_disable(&enic->napi[i]); 1811 1812 vnic_intr_mask(&enic->intr[0]); 1813 enic_synchronize_irqs(enic); 1814 err = vnic_rq_disable(&enic->rq[0]); 1815 if (err) { 1816 rtnl_unlock(); 1817 netdev_err(netdev, "Unable to disable RQ.\n"); 1818 return; 1819 } 1820 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf); 1821 vnic_cq_clean(&enic->cq[0]); 1822 vnic_intr_clean(&enic->intr[0]); 1823 1824 /* Fill RQ with new_mtu-sized buffers */ 1825 netdev->mtu = new_mtu; 1826 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf); 1827 /* Need at least one buffer on ring to get going */ 1828 if (vnic_rq_desc_used(&enic->rq[0]) == 0) { 1829 rtnl_unlock(); 1830 netdev_err(netdev, "Unable to alloc receive buffers.\n"); 1831 return; 1832 } 1833 1834 /* Start RQ */ 1835 vnic_rq_enable(&enic->rq[0]); 1836 napi_enable(&enic->napi[0]); 1837 vnic_intr_unmask(&enic->intr[0]); 1838 enic_notify_timer_start(enic); 1839 1840 rtnl_unlock(); 1841 1842 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu); 1843 } 1844 1845 #ifdef CONFIG_NET_POLL_CONTROLLER 1846 static void enic_poll_controller(struct net_device *netdev) 1847 { 1848 struct enic *enic = netdev_priv(netdev); 1849 struct vnic_dev *vdev = enic->vdev; 1850 unsigned int i, intr; 1851 1852 switch (vnic_dev_get_intr_mode(vdev)) { 1853 case VNIC_DEV_INTR_MODE_MSIX: 1854 for (i = 0; i < enic->rq_count; i++) { 1855 intr = enic_msix_rq_intr(enic, i); 1856 enic_isr_msix(enic->msix_entry[intr].vector, 1857 &enic->napi[i]); 1858 } 1859 1860 for (i = 0; i < enic->wq_count; i++) { 1861 intr = enic_msix_wq_intr(enic, i); 1862 enic_isr_msix(enic->msix_entry[intr].vector, 1863 &enic->napi[enic_cq_wq(enic, i)]); 1864 } 1865 1866 break; 1867 case VNIC_DEV_INTR_MODE_MSI: 1868 enic_isr_msi(enic->pdev->irq, enic); 1869 break; 1870 case VNIC_DEV_INTR_MODE_INTX: 1871 enic_isr_legacy(enic->pdev->irq, netdev); 1872 break; 1873 default: 1874 break; 1875 } 1876 } 1877 #endif 1878 1879 static int enic_dev_wait(struct vnic_dev *vdev, 1880 int (*start)(struct vnic_dev *, int), 1881 int (*finished)(struct vnic_dev *, int *), 1882 int arg) 1883 { 1884 unsigned long time; 1885 int done; 1886 int err; 1887 1888 BUG_ON(in_interrupt()); 1889 1890 err = start(vdev, arg); 1891 if (err) 1892 return err; 1893 1894 /* Wait for func to complete...2 seconds max 1895 */ 1896 1897 time = jiffies + (HZ * 2); 1898 do { 1899 1900 err = finished(vdev, &done); 1901 if (err) 1902 return err; 1903 1904 if (done) 1905 return 0; 1906 1907 schedule_timeout_uninterruptible(HZ / 10); 1908 1909 } while (time_after(time, jiffies)); 1910 1911 return -ETIMEDOUT; 1912 } 1913 1914 static int enic_dev_open(struct enic *enic) 1915 { 1916 int err; 1917 1918 err = enic_dev_wait(enic->vdev, vnic_dev_open, 1919 vnic_dev_open_done, 0); 1920 if (err) 1921 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n", 1922 err); 1923 1924 return err; 1925 } 1926 1927 static int enic_dev_hang_reset(struct enic *enic) 1928 { 1929 int err; 1930 1931 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset, 1932 vnic_dev_hang_reset_done, 0); 1933 if (err) 1934 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n", 1935 err); 1936 1937 return err; 1938 } 1939 1940 int __enic_set_rsskey(struct enic *enic) 1941 { 1942 union vnic_rss_key *rss_key_buf_va; 1943 dma_addr_t rss_key_buf_pa; 1944 int i, kidx, bidx, err; 1945 1946 rss_key_buf_va = pci_zalloc_consistent(enic->pdev, 1947 sizeof(union vnic_rss_key), 1948 &rss_key_buf_pa); 1949 if (!rss_key_buf_va) 1950 return -ENOMEM; 1951 1952 for (i = 0; i < ENIC_RSS_LEN; i++) { 1953 kidx = i / ENIC_RSS_BYTES_PER_KEY; 1954 bidx = i % ENIC_RSS_BYTES_PER_KEY; 1955 rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i]; 1956 } 1957 spin_lock_bh(&enic->devcmd_lock); 1958 err = enic_set_rss_key(enic, 1959 rss_key_buf_pa, 1960 sizeof(union vnic_rss_key)); 1961 spin_unlock_bh(&enic->devcmd_lock); 1962 1963 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key), 1964 rss_key_buf_va, rss_key_buf_pa); 1965 1966 return err; 1967 } 1968 1969 static int enic_set_rsskey(struct enic *enic) 1970 { 1971 netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN); 1972 1973 return __enic_set_rsskey(enic); 1974 } 1975 1976 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits) 1977 { 1978 dma_addr_t rss_cpu_buf_pa; 1979 union vnic_rss_cpu *rss_cpu_buf_va = NULL; 1980 unsigned int i; 1981 int err; 1982 1983 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev, 1984 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa); 1985 if (!rss_cpu_buf_va) 1986 return -ENOMEM; 1987 1988 for (i = 0; i < (1 << rss_hash_bits); i++) 1989 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count; 1990 1991 spin_lock_bh(&enic->devcmd_lock); 1992 err = enic_set_rss_cpu(enic, 1993 rss_cpu_buf_pa, 1994 sizeof(union vnic_rss_cpu)); 1995 spin_unlock_bh(&enic->devcmd_lock); 1996 1997 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu), 1998 rss_cpu_buf_va, rss_cpu_buf_pa); 1999 2000 return err; 2001 } 2002 2003 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu, 2004 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable) 2005 { 2006 const u8 tso_ipid_split_en = 0; 2007 const u8 ig_vlan_strip_en = 1; 2008 int err; 2009 2010 /* Enable VLAN tag stripping. 2011 */ 2012 2013 spin_lock_bh(&enic->devcmd_lock); 2014 err = enic_set_nic_cfg(enic, 2015 rss_default_cpu, rss_hash_type, 2016 rss_hash_bits, rss_base_cpu, 2017 rss_enable, tso_ipid_split_en, 2018 ig_vlan_strip_en); 2019 spin_unlock_bh(&enic->devcmd_lock); 2020 2021 return err; 2022 } 2023 2024 static int enic_set_rss_nic_cfg(struct enic *enic) 2025 { 2026 struct device *dev = enic_get_dev(enic); 2027 const u8 rss_default_cpu = 0; 2028 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 | 2029 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 | 2030 NIC_CFG_RSS_HASH_TYPE_IPV6 | 2031 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6; 2032 const u8 rss_hash_bits = 7; 2033 const u8 rss_base_cpu = 0; 2034 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1); 2035 2036 if (rss_enable) { 2037 if (!enic_set_rsskey(enic)) { 2038 if (enic_set_rsscpu(enic, rss_hash_bits)) { 2039 rss_enable = 0; 2040 dev_warn(dev, "RSS disabled, " 2041 "Failed to set RSS cpu indirection table."); 2042 } 2043 } else { 2044 rss_enable = 0; 2045 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n"); 2046 } 2047 } 2048 2049 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type, 2050 rss_hash_bits, rss_base_cpu, rss_enable); 2051 } 2052 2053 static void enic_reset(struct work_struct *work) 2054 { 2055 struct enic *enic = container_of(work, struct enic, reset); 2056 2057 if (!netif_running(enic->netdev)) 2058 return; 2059 2060 rtnl_lock(); 2061 2062 spin_lock(&enic->enic_api_lock); 2063 enic_dev_hang_notify(enic); 2064 enic_stop(enic->netdev); 2065 enic_dev_hang_reset(enic); 2066 enic_reset_addr_lists(enic); 2067 enic_init_vnic_resources(enic); 2068 enic_set_rss_nic_cfg(enic); 2069 enic_dev_set_ig_vlan_rewrite_mode(enic); 2070 enic_open(enic->netdev); 2071 spin_unlock(&enic->enic_api_lock); 2072 call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev); 2073 2074 rtnl_unlock(); 2075 } 2076 2077 static int enic_set_intr_mode(struct enic *enic) 2078 { 2079 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX); 2080 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX); 2081 unsigned int i; 2082 2083 /* Set interrupt mode (INTx, MSI, MSI-X) depending 2084 * on system capabilities. 2085 * 2086 * Try MSI-X first 2087 * 2088 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs 2089 * (the second to last INTR is used for WQ/RQ errors) 2090 * (the last INTR is used for notifications) 2091 */ 2092 2093 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2); 2094 for (i = 0; i < n + m + 2; i++) 2095 enic->msix_entry[i].entry = i; 2096 2097 /* Use multiple RQs if RSS is enabled 2098 */ 2099 2100 if (ENIC_SETTING(enic, RSS) && 2101 enic->config.intr_mode < 1 && 2102 enic->rq_count >= n && 2103 enic->wq_count >= m && 2104 enic->cq_count >= n + m && 2105 enic->intr_count >= n + m + 2) { 2106 2107 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2108 n + m + 2, n + m + 2) > 0) { 2109 2110 enic->rq_count = n; 2111 enic->wq_count = m; 2112 enic->cq_count = n + m; 2113 enic->intr_count = n + m + 2; 2114 2115 vnic_dev_set_intr_mode(enic->vdev, 2116 VNIC_DEV_INTR_MODE_MSIX); 2117 2118 return 0; 2119 } 2120 } 2121 2122 if (enic->config.intr_mode < 1 && 2123 enic->rq_count >= 1 && 2124 enic->wq_count >= m && 2125 enic->cq_count >= 1 + m && 2126 enic->intr_count >= 1 + m + 2) { 2127 if (pci_enable_msix_range(enic->pdev, enic->msix_entry, 2128 1 + m + 2, 1 + m + 2) > 0) { 2129 2130 enic->rq_count = 1; 2131 enic->wq_count = m; 2132 enic->cq_count = 1 + m; 2133 enic->intr_count = 1 + m + 2; 2134 2135 vnic_dev_set_intr_mode(enic->vdev, 2136 VNIC_DEV_INTR_MODE_MSIX); 2137 2138 return 0; 2139 } 2140 } 2141 2142 /* Next try MSI 2143 * 2144 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR 2145 */ 2146 2147 if (enic->config.intr_mode < 2 && 2148 enic->rq_count >= 1 && 2149 enic->wq_count >= 1 && 2150 enic->cq_count >= 2 && 2151 enic->intr_count >= 1 && 2152 !pci_enable_msi(enic->pdev)) { 2153 2154 enic->rq_count = 1; 2155 enic->wq_count = 1; 2156 enic->cq_count = 2; 2157 enic->intr_count = 1; 2158 2159 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI); 2160 2161 return 0; 2162 } 2163 2164 /* Next try INTx 2165 * 2166 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs 2167 * (the first INTR is used for WQ/RQ) 2168 * (the second INTR is used for WQ/RQ errors) 2169 * (the last INTR is used for notifications) 2170 */ 2171 2172 if (enic->config.intr_mode < 3 && 2173 enic->rq_count >= 1 && 2174 enic->wq_count >= 1 && 2175 enic->cq_count >= 2 && 2176 enic->intr_count >= 3) { 2177 2178 enic->rq_count = 1; 2179 enic->wq_count = 1; 2180 enic->cq_count = 2; 2181 enic->intr_count = 3; 2182 2183 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX); 2184 2185 return 0; 2186 } 2187 2188 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2189 2190 return -EINVAL; 2191 } 2192 2193 static void enic_clear_intr_mode(struct enic *enic) 2194 { 2195 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2196 case VNIC_DEV_INTR_MODE_MSIX: 2197 pci_disable_msix(enic->pdev); 2198 break; 2199 case VNIC_DEV_INTR_MODE_MSI: 2200 pci_disable_msi(enic->pdev); 2201 break; 2202 default: 2203 break; 2204 } 2205 2206 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN); 2207 } 2208 2209 static const struct net_device_ops enic_netdev_dynamic_ops = { 2210 .ndo_open = enic_open, 2211 .ndo_stop = enic_stop, 2212 .ndo_start_xmit = enic_hard_start_xmit, 2213 .ndo_get_stats64 = enic_get_stats, 2214 .ndo_validate_addr = eth_validate_addr, 2215 .ndo_set_rx_mode = enic_set_rx_mode, 2216 .ndo_set_mac_address = enic_set_mac_address_dynamic, 2217 .ndo_change_mtu = enic_change_mtu, 2218 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2219 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2220 .ndo_tx_timeout = enic_tx_timeout, 2221 .ndo_set_vf_port = enic_set_vf_port, 2222 .ndo_get_vf_port = enic_get_vf_port, 2223 .ndo_set_vf_mac = enic_set_vf_mac, 2224 #ifdef CONFIG_NET_POLL_CONTROLLER 2225 .ndo_poll_controller = enic_poll_controller, 2226 #endif 2227 #ifdef CONFIG_RFS_ACCEL 2228 .ndo_rx_flow_steer = enic_rx_flow_steer, 2229 #endif 2230 #ifdef CONFIG_NET_RX_BUSY_POLL 2231 .ndo_busy_poll = enic_busy_poll, 2232 #endif 2233 }; 2234 2235 static const struct net_device_ops enic_netdev_ops = { 2236 .ndo_open = enic_open, 2237 .ndo_stop = enic_stop, 2238 .ndo_start_xmit = enic_hard_start_xmit, 2239 .ndo_get_stats64 = enic_get_stats, 2240 .ndo_validate_addr = eth_validate_addr, 2241 .ndo_set_mac_address = enic_set_mac_address, 2242 .ndo_set_rx_mode = enic_set_rx_mode, 2243 .ndo_change_mtu = enic_change_mtu, 2244 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid, 2245 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid, 2246 .ndo_tx_timeout = enic_tx_timeout, 2247 .ndo_set_vf_port = enic_set_vf_port, 2248 .ndo_get_vf_port = enic_get_vf_port, 2249 .ndo_set_vf_mac = enic_set_vf_mac, 2250 #ifdef CONFIG_NET_POLL_CONTROLLER 2251 .ndo_poll_controller = enic_poll_controller, 2252 #endif 2253 #ifdef CONFIG_RFS_ACCEL 2254 .ndo_rx_flow_steer = enic_rx_flow_steer, 2255 #endif 2256 #ifdef CONFIG_NET_RX_BUSY_POLL 2257 .ndo_busy_poll = enic_busy_poll, 2258 #endif 2259 }; 2260 2261 static void enic_dev_deinit(struct enic *enic) 2262 { 2263 unsigned int i; 2264 2265 for (i = 0; i < enic->rq_count; i++) { 2266 napi_hash_del(&enic->napi[i]); 2267 netif_napi_del(&enic->napi[i]); 2268 } 2269 if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) 2270 for (i = 0; i < enic->wq_count; i++) 2271 netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]); 2272 2273 enic_free_vnic_resources(enic); 2274 enic_clear_intr_mode(enic); 2275 } 2276 2277 static void enic_kdump_kernel_config(struct enic *enic) 2278 { 2279 if (is_kdump_kernel()) { 2280 dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n"); 2281 enic->rq_count = 1; 2282 enic->wq_count = 1; 2283 enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS; 2284 enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS; 2285 enic->config.mtu = min_t(u16, 1500, enic->config.mtu); 2286 } 2287 } 2288 2289 static int enic_dev_init(struct enic *enic) 2290 { 2291 struct device *dev = enic_get_dev(enic); 2292 struct net_device *netdev = enic->netdev; 2293 unsigned int i; 2294 int err; 2295 2296 /* Get interrupt coalesce timer info */ 2297 err = enic_dev_intr_coal_timer_info(enic); 2298 if (err) { 2299 dev_warn(dev, "Using default conversion factor for " 2300 "interrupt coalesce timer\n"); 2301 vnic_dev_intr_coal_timer_info_default(enic->vdev); 2302 } 2303 2304 /* Get vNIC configuration 2305 */ 2306 2307 err = enic_get_vnic_config(enic); 2308 if (err) { 2309 dev_err(dev, "Get vNIC configuration failed, aborting\n"); 2310 return err; 2311 } 2312 2313 /* Get available resource counts 2314 */ 2315 2316 enic_get_res_counts(enic); 2317 2318 /* modify resource count if we are in kdump_kernel 2319 */ 2320 enic_kdump_kernel_config(enic); 2321 2322 /* Set interrupt mode based on resource counts and system 2323 * capabilities 2324 */ 2325 2326 err = enic_set_intr_mode(enic); 2327 if (err) { 2328 dev_err(dev, "Failed to set intr mode based on resource " 2329 "counts and system capabilities, aborting\n"); 2330 return err; 2331 } 2332 2333 /* Allocate and configure vNIC resources 2334 */ 2335 2336 err = enic_alloc_vnic_resources(enic); 2337 if (err) { 2338 dev_err(dev, "Failed to alloc vNIC resources, aborting\n"); 2339 goto err_out_free_vnic_resources; 2340 } 2341 2342 enic_init_vnic_resources(enic); 2343 2344 err = enic_set_rss_nic_cfg(enic); 2345 if (err) { 2346 dev_err(dev, "Failed to config nic, aborting\n"); 2347 goto err_out_free_vnic_resources; 2348 } 2349 2350 switch (vnic_dev_get_intr_mode(enic->vdev)) { 2351 default: 2352 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64); 2353 napi_hash_add(&enic->napi[0]); 2354 break; 2355 case VNIC_DEV_INTR_MODE_MSIX: 2356 for (i = 0; i < enic->rq_count; i++) { 2357 netif_napi_add(netdev, &enic->napi[i], 2358 enic_poll_msix_rq, NAPI_POLL_WEIGHT); 2359 napi_hash_add(&enic->napi[i]); 2360 } 2361 for (i = 0; i < enic->wq_count; i++) 2362 netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)], 2363 enic_poll_msix_wq, NAPI_POLL_WEIGHT); 2364 break; 2365 } 2366 2367 return 0; 2368 2369 err_out_free_vnic_resources: 2370 enic_clear_intr_mode(enic); 2371 enic_free_vnic_resources(enic); 2372 2373 return err; 2374 } 2375 2376 static void enic_iounmap(struct enic *enic) 2377 { 2378 unsigned int i; 2379 2380 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) 2381 if (enic->bar[i].vaddr) 2382 iounmap(enic->bar[i].vaddr); 2383 } 2384 2385 static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2386 { 2387 struct device *dev = &pdev->dev; 2388 struct net_device *netdev; 2389 struct enic *enic; 2390 int using_dac = 0; 2391 unsigned int i; 2392 int err; 2393 #ifdef CONFIG_PCI_IOV 2394 int pos = 0; 2395 #endif 2396 int num_pps = 1; 2397 2398 /* Allocate net device structure and initialize. Private 2399 * instance data is initialized to zero. 2400 */ 2401 2402 netdev = alloc_etherdev_mqs(sizeof(struct enic), 2403 ENIC_RQ_MAX, ENIC_WQ_MAX); 2404 if (!netdev) 2405 return -ENOMEM; 2406 2407 pci_set_drvdata(pdev, netdev); 2408 2409 SET_NETDEV_DEV(netdev, &pdev->dev); 2410 2411 enic = netdev_priv(netdev); 2412 enic->netdev = netdev; 2413 enic->pdev = pdev; 2414 2415 /* Setup PCI resources 2416 */ 2417 2418 err = pci_enable_device_mem(pdev); 2419 if (err) { 2420 dev_err(dev, "Cannot enable PCI device, aborting\n"); 2421 goto err_out_free_netdev; 2422 } 2423 2424 err = pci_request_regions(pdev, DRV_NAME); 2425 if (err) { 2426 dev_err(dev, "Cannot request PCI regions, aborting\n"); 2427 goto err_out_disable_device; 2428 } 2429 2430 pci_set_master(pdev); 2431 2432 /* Query PCI controller on system for DMA addressing 2433 * limitation for the device. Try 64-bit first, and 2434 * fail to 32-bit. 2435 */ 2436 2437 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2438 if (err) { 2439 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2440 if (err) { 2441 dev_err(dev, "No usable DMA configuration, aborting\n"); 2442 goto err_out_release_regions; 2443 } 2444 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2445 if (err) { 2446 dev_err(dev, "Unable to obtain %u-bit DMA " 2447 "for consistent allocations, aborting\n", 32); 2448 goto err_out_release_regions; 2449 } 2450 } else { 2451 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 2452 if (err) { 2453 dev_err(dev, "Unable to obtain %u-bit DMA " 2454 "for consistent allocations, aborting\n", 64); 2455 goto err_out_release_regions; 2456 } 2457 using_dac = 1; 2458 } 2459 2460 /* Map vNIC resources from BAR0-5 2461 */ 2462 2463 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) { 2464 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM)) 2465 continue; 2466 enic->bar[i].len = pci_resource_len(pdev, i); 2467 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len); 2468 if (!enic->bar[i].vaddr) { 2469 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i); 2470 err = -ENODEV; 2471 goto err_out_iounmap; 2472 } 2473 enic->bar[i].bus_addr = pci_resource_start(pdev, i); 2474 } 2475 2476 /* Register vNIC device 2477 */ 2478 2479 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar, 2480 ARRAY_SIZE(enic->bar)); 2481 if (!enic->vdev) { 2482 dev_err(dev, "vNIC registration failed, aborting\n"); 2483 err = -ENODEV; 2484 goto err_out_iounmap; 2485 } 2486 2487 err = vnic_devcmd_init(enic->vdev); 2488 2489 if (err) 2490 goto err_out_vnic_unregister; 2491 2492 #ifdef CONFIG_PCI_IOV 2493 /* Get number of subvnics */ 2494 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 2495 if (pos) { 2496 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, 2497 &enic->num_vfs); 2498 if (enic->num_vfs) { 2499 err = pci_enable_sriov(pdev, enic->num_vfs); 2500 if (err) { 2501 dev_err(dev, "SRIOV enable failed, aborting." 2502 " pci_enable_sriov() returned %d\n", 2503 err); 2504 goto err_out_vnic_unregister; 2505 } 2506 enic->priv_flags |= ENIC_SRIOV_ENABLED; 2507 num_pps = enic->num_vfs; 2508 } 2509 } 2510 #endif 2511 2512 /* Allocate structure for port profiles */ 2513 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL); 2514 if (!enic->pp) { 2515 err = -ENOMEM; 2516 goto err_out_disable_sriov_pp; 2517 } 2518 2519 /* Issue device open to get device in known state 2520 */ 2521 2522 err = enic_dev_open(enic); 2523 if (err) { 2524 dev_err(dev, "vNIC dev open failed, aborting\n"); 2525 goto err_out_disable_sriov; 2526 } 2527 2528 /* Setup devcmd lock 2529 */ 2530 2531 spin_lock_init(&enic->devcmd_lock); 2532 spin_lock_init(&enic->enic_api_lock); 2533 2534 /* 2535 * Set ingress vlan rewrite mode before vnic initialization 2536 */ 2537 2538 err = enic_dev_set_ig_vlan_rewrite_mode(enic); 2539 if (err) { 2540 dev_err(dev, 2541 "Failed to set ingress vlan rewrite mode, aborting.\n"); 2542 goto err_out_dev_close; 2543 } 2544 2545 /* Issue device init to initialize the vnic-to-switch link. 2546 * We'll start with carrier off and wait for link UP 2547 * notification later to turn on carrier. We don't need 2548 * to wait here for the vnic-to-switch link initialization 2549 * to complete; link UP notification is the indication that 2550 * the process is complete. 2551 */ 2552 2553 netif_carrier_off(netdev); 2554 2555 /* Do not call dev_init for a dynamic vnic. 2556 * For a dynamic vnic, init_prov_info will be 2557 * called later by an upper layer. 2558 */ 2559 2560 if (!enic_is_dynamic(enic)) { 2561 err = vnic_dev_init(enic->vdev, 0); 2562 if (err) { 2563 dev_err(dev, "vNIC dev init failed, aborting\n"); 2564 goto err_out_dev_close; 2565 } 2566 } 2567 2568 err = enic_dev_init(enic); 2569 if (err) { 2570 dev_err(dev, "Device initialization failed, aborting\n"); 2571 goto err_out_dev_close; 2572 } 2573 2574 netif_set_real_num_tx_queues(netdev, enic->wq_count); 2575 netif_set_real_num_rx_queues(netdev, enic->rq_count); 2576 2577 /* Setup notification timer, HW reset task, and wq locks 2578 */ 2579 2580 init_timer(&enic->notify_timer); 2581 enic->notify_timer.function = enic_notify_timer; 2582 enic->notify_timer.data = (unsigned long)enic; 2583 2584 enic_set_rx_coal_setting(enic); 2585 INIT_WORK(&enic->reset, enic_reset); 2586 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work); 2587 2588 for (i = 0; i < enic->wq_count; i++) 2589 spin_lock_init(&enic->wq_lock[i]); 2590 2591 /* Register net device 2592 */ 2593 2594 enic->port_mtu = enic->config.mtu; 2595 (void)enic_change_mtu(netdev, enic->port_mtu); 2596 2597 err = enic_set_mac_addr(netdev, enic->mac_addr); 2598 if (err) { 2599 dev_err(dev, "Invalid MAC address, aborting\n"); 2600 goto err_out_dev_deinit; 2601 } 2602 2603 enic->tx_coalesce_usecs = enic->config.intr_timer_usec; 2604 /* rx coalesce time already got initialized. This gets used 2605 * if adaptive coal is turned off 2606 */ 2607 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs; 2608 2609 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) 2610 netdev->netdev_ops = &enic_netdev_dynamic_ops; 2611 else 2612 netdev->netdev_ops = &enic_netdev_ops; 2613 2614 netdev->watchdog_timeo = 2 * HZ; 2615 enic_set_ethtool_ops(netdev); 2616 2617 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX; 2618 if (ENIC_SETTING(enic, LOOP)) { 2619 netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX; 2620 enic->loop_enable = 1; 2621 enic->loop_tag = enic->config.loop_tag; 2622 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag); 2623 } 2624 if (ENIC_SETTING(enic, TXCSUM)) 2625 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM; 2626 if (ENIC_SETTING(enic, TSO)) 2627 netdev->hw_features |= NETIF_F_TSO | 2628 NETIF_F_TSO6 | NETIF_F_TSO_ECN; 2629 if (ENIC_SETTING(enic, RSS)) 2630 netdev->hw_features |= NETIF_F_RXHASH; 2631 if (ENIC_SETTING(enic, RXCSUM)) 2632 netdev->hw_features |= NETIF_F_RXCSUM; 2633 2634 netdev->features |= netdev->hw_features; 2635 2636 #ifdef CONFIG_RFS_ACCEL 2637 netdev->hw_features |= NETIF_F_NTUPLE; 2638 #endif 2639 2640 if (using_dac) 2641 netdev->features |= NETIF_F_HIGHDMA; 2642 2643 netdev->priv_flags |= IFF_UNICAST_FLT; 2644 2645 err = register_netdev(netdev); 2646 if (err) { 2647 dev_err(dev, "Cannot register net device, aborting\n"); 2648 goto err_out_dev_deinit; 2649 } 2650 enic->rx_copybreak = RX_COPYBREAK_DEFAULT; 2651 2652 return 0; 2653 2654 err_out_dev_deinit: 2655 enic_dev_deinit(enic); 2656 err_out_dev_close: 2657 vnic_dev_close(enic->vdev); 2658 err_out_disable_sriov: 2659 kfree(enic->pp); 2660 err_out_disable_sriov_pp: 2661 #ifdef CONFIG_PCI_IOV 2662 if (enic_sriov_enabled(enic)) { 2663 pci_disable_sriov(pdev); 2664 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2665 } 2666 #endif 2667 err_out_vnic_unregister: 2668 vnic_dev_unregister(enic->vdev); 2669 err_out_iounmap: 2670 enic_iounmap(enic); 2671 err_out_release_regions: 2672 pci_release_regions(pdev); 2673 err_out_disable_device: 2674 pci_disable_device(pdev); 2675 err_out_free_netdev: 2676 free_netdev(netdev); 2677 2678 return err; 2679 } 2680 2681 static void enic_remove(struct pci_dev *pdev) 2682 { 2683 struct net_device *netdev = pci_get_drvdata(pdev); 2684 2685 if (netdev) { 2686 struct enic *enic = netdev_priv(netdev); 2687 2688 cancel_work_sync(&enic->reset); 2689 cancel_work_sync(&enic->change_mtu_work); 2690 unregister_netdev(netdev); 2691 enic_dev_deinit(enic); 2692 vnic_dev_close(enic->vdev); 2693 #ifdef CONFIG_PCI_IOV 2694 if (enic_sriov_enabled(enic)) { 2695 pci_disable_sriov(pdev); 2696 enic->priv_flags &= ~ENIC_SRIOV_ENABLED; 2697 } 2698 #endif 2699 kfree(enic->pp); 2700 vnic_dev_unregister(enic->vdev); 2701 enic_iounmap(enic); 2702 pci_release_regions(pdev); 2703 pci_disable_device(pdev); 2704 free_netdev(netdev); 2705 } 2706 } 2707 2708 static struct pci_driver enic_driver = { 2709 .name = DRV_NAME, 2710 .id_table = enic_id_table, 2711 .probe = enic_probe, 2712 .remove = enic_remove, 2713 }; 2714 2715 static int __init enic_init_module(void) 2716 { 2717 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION); 2718 2719 return pci_register_driver(&enic_driver); 2720 } 2721 2722 static void __exit enic_cleanup_module(void) 2723 { 2724 pci_unregister_driver(&enic_driver); 2725 } 2726 2727 module_init(enic_init_module); 2728 module_exit(enic_cleanup_module); 2729