1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices 4 // 5 // Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> 6 // Markus Rechberger <mrechberger@gmail.com> 7 // Mauro Carvalho Chehab <mchehab@kernel.org> 8 // Sascha Sommer <saschasommer@freenet.de> 9 // Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> 10 // 11 // This program is free software; you can redistribute it and/or modify 12 // it under the terms of the GNU General Public License as published by 13 // the Free Software Foundation; either version 2 of the License, or 14 // (at your option) any later version. 15 // 16 // This program is distributed in the hope that it will be useful, 17 // but WITHOUT ANY WARRANTY; without even the implied warranty of 18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 // GNU General Public License for more details. 20 21 #include "em28xx.h" 22 23 #include <linux/init.h> 24 #include <linux/jiffies.h> 25 #include <linux/list.h> 26 #include <linux/module.h> 27 #include <linux/slab.h> 28 #include <linux/usb.h> 29 #include <linux/vmalloc.h> 30 #include <sound/ac97_codec.h> 31 #include <media/v4l2-common.h> 32 33 #define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \ 34 "Markus Rechberger <mrechberger@gmail.com>, " \ 35 "Mauro Carvalho Chehab <mchehab@kernel.org>, " \ 36 "Sascha Sommer <saschasommer@freenet.de>" 37 38 MODULE_AUTHOR(DRIVER_AUTHOR); 39 MODULE_DESCRIPTION(DRIVER_DESC); 40 MODULE_LICENSE("GPL v2"); 41 MODULE_VERSION(EM28XX_VERSION); 42 43 /* #define ENABLE_DEBUG_ISOC_FRAMES */ 44 45 static unsigned int core_debug; 46 module_param(core_debug, int, 0644); 47 MODULE_PARM_DESC(core_debug, "enable debug messages [core and isoc]"); 48 49 #define em28xx_coredbg(fmt, arg...) do { \ 50 if (core_debug) \ 51 dev_printk(KERN_DEBUG, &dev->intf->dev, \ 52 "core: %s: " fmt, __func__, ## arg); \ 53 } while (0) 54 55 static unsigned int reg_debug; 56 module_param(reg_debug, int, 0644); 57 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); 58 59 #define em28xx_regdbg(fmt, arg...) do { \ 60 if (reg_debug) \ 61 dev_printk(KERN_DEBUG, &dev->intf->dev, \ 62 "reg: %s: " fmt, __func__, ## arg); \ 63 } while (0) 64 65 /* FIXME: don't abuse core_debug */ 66 #define em28xx_isocdbg(fmt, arg...) do { \ 67 if (core_debug) \ 68 dev_printk(KERN_DEBUG, &dev->intf->dev, \ 69 "core: %s: " fmt, __func__, ## arg); \ 70 } while (0) 71 72 /* 73 * em28xx_read_reg_req() 74 * reads data from the usb device specifying bRequest 75 */ 76 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, 77 char *buf, int len) 78 { 79 int ret; 80 struct usb_device *udev = interface_to_usbdev(dev->intf); 81 int pipe = usb_rcvctrlpipe(udev, 0); 82 83 if (dev->disconnected) 84 return -ENODEV; 85 86 if (len > URB_MAX_CTRL_SIZE) 87 return -EINVAL; 88 89 mutex_lock(&dev->ctrl_urb_lock); 90 ret = usb_control_msg(udev, pipe, req, 91 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 92 0x0000, reg, dev->urb_buf, len, HZ); 93 if (ret < 0) { 94 em28xx_regdbg("(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x failed with error %i\n", 95 pipe, 96 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 97 req, 0, 0, 98 reg & 0xff, reg >> 8, 99 len & 0xff, len >> 8, ret); 100 mutex_unlock(&dev->ctrl_urb_lock); 101 return usb_translate_errors(ret); 102 } 103 104 if (len) 105 memcpy(buf, dev->urb_buf, len); 106 107 mutex_unlock(&dev->ctrl_urb_lock); 108 109 em28xx_regdbg("(pipe 0x%08x): IN: %02x %02x %02x %02x %02x %02x %02x %02x <<< %*ph\n", 110 pipe, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 111 req, 0, 0, 112 reg & 0xff, reg >> 8, 113 len & 0xff, len >> 8, len, buf); 114 115 return ret; 116 } 117 118 /* 119 * em28xx_read_reg_req() 120 * reads data from the usb device specifying bRequest 121 */ 122 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg) 123 { 124 int ret; 125 u8 val; 126 127 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1); 128 if (ret < 0) 129 return ret; 130 131 return val; 132 } 133 134 int em28xx_read_reg(struct em28xx *dev, u16 reg) 135 { 136 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg); 137 } 138 EXPORT_SYMBOL_GPL(em28xx_read_reg); 139 140 /* 141 * em28xx_write_regs_req() 142 * sends data to the usb device, specifying bRequest 143 */ 144 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, 145 int len) 146 { 147 int ret; 148 struct usb_device *udev = interface_to_usbdev(dev->intf); 149 int pipe = usb_sndctrlpipe(udev, 0); 150 151 if (dev->disconnected) 152 return -ENODEV; 153 154 if (len < 1 || len > URB_MAX_CTRL_SIZE) 155 return -EINVAL; 156 157 mutex_lock(&dev->ctrl_urb_lock); 158 memcpy(dev->urb_buf, buf, len); 159 ret = usb_control_msg(udev, pipe, req, 160 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 161 0x0000, reg, dev->urb_buf, len, HZ); 162 mutex_unlock(&dev->ctrl_urb_lock); 163 164 if (ret < 0) { 165 em28xx_regdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>> %*ph failed with error %i\n", 166 pipe, 167 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 168 req, 0, 0, 169 reg & 0xff, reg >> 8, 170 len & 0xff, len >> 8, len, buf, ret); 171 return usb_translate_errors(ret); 172 } 173 174 em28xx_regdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>> %*ph\n", 175 pipe, 176 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 177 req, 0, 0, 178 reg & 0xff, reg >> 8, 179 len & 0xff, len >> 8, len, buf); 180 181 if (dev->wait_after_write) 182 msleep(dev->wait_after_write); 183 184 return ret; 185 } 186 187 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len) 188 { 189 return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len); 190 } 191 EXPORT_SYMBOL_GPL(em28xx_write_regs); 192 193 /* Write a single register */ 194 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val) 195 { 196 return em28xx_write_regs(dev, reg, &val, 1); 197 } 198 EXPORT_SYMBOL_GPL(em28xx_write_reg); 199 200 /* 201 * em28xx_write_reg_bits() 202 * sets only some bits (specified by bitmask) of a register, by first reading 203 * the actual value 204 */ 205 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, 206 u8 bitmask) 207 { 208 int oldval; 209 u8 newval; 210 211 oldval = em28xx_read_reg(dev, reg); 212 if (oldval < 0) 213 return oldval; 214 215 newval = (((u8)oldval) & ~bitmask) | (val & bitmask); 216 217 return em28xx_write_regs(dev, reg, &newval, 1); 218 } 219 EXPORT_SYMBOL_GPL(em28xx_write_reg_bits); 220 221 /* 222 * em28xx_toggle_reg_bits() 223 * toggles/inverts the bits (specified by bitmask) of a register 224 */ 225 int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask) 226 { 227 int oldval; 228 u8 newval; 229 230 oldval = em28xx_read_reg(dev, reg); 231 if (oldval < 0) 232 return oldval; 233 234 newval = (~oldval & bitmask) | (oldval & ~bitmask); 235 236 return em28xx_write_reg(dev, reg, newval); 237 } 238 EXPORT_SYMBOL_GPL(em28xx_toggle_reg_bits); 239 240 /* 241 * em28xx_is_ac97_ready() 242 * Checks if ac97 is ready 243 */ 244 static int em28xx_is_ac97_ready(struct em28xx *dev) 245 { 246 unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_AC97_XFER_TIMEOUT); 247 int ret; 248 249 /* Wait up to 50 ms for AC97 command to complete */ 250 while (time_is_after_jiffies(timeout)) { 251 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY); 252 if (ret < 0) 253 return ret; 254 255 if (!(ret & 0x01)) 256 return 0; 257 msleep(5); 258 } 259 260 dev_warn(&dev->intf->dev, 261 "AC97 command still being executed: not handled properly!\n"); 262 return -EBUSY; 263 } 264 265 /* 266 * em28xx_read_ac97() 267 * write a 16 bit value to the specified AC97 address (LSB first!) 268 */ 269 int em28xx_read_ac97(struct em28xx *dev, u8 reg) 270 { 271 int ret; 272 u8 addr = (reg & 0x7f) | 0x80; 273 __le16 val; 274 275 ret = em28xx_is_ac97_ready(dev); 276 if (ret < 0) 277 return ret; 278 279 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 280 if (ret < 0) 281 return ret; 282 283 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB, 284 (u8 *)&val, sizeof(val)); 285 286 if (ret < 0) 287 return ret; 288 return le16_to_cpu(val); 289 } 290 EXPORT_SYMBOL_GPL(em28xx_read_ac97); 291 292 /* 293 * em28xx_write_ac97() 294 * write a 16 bit value to the specified AC97 address (LSB first!) 295 */ 296 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val) 297 { 298 int ret; 299 u8 addr = reg & 0x7f; 300 __le16 value; 301 302 value = cpu_to_le16(val); 303 304 ret = em28xx_is_ac97_ready(dev); 305 if (ret < 0) 306 return ret; 307 308 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *)&value, 2); 309 if (ret < 0) 310 return ret; 311 312 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1); 313 if (ret < 0) 314 return ret; 315 316 return 0; 317 } 318 EXPORT_SYMBOL_GPL(em28xx_write_ac97); 319 320 struct em28xx_vol_itable { 321 enum em28xx_amux mux; 322 u8 reg; 323 }; 324 325 static struct em28xx_vol_itable inputs[] = { 326 { EM28XX_AMUX_VIDEO, AC97_VIDEO }, 327 { EM28XX_AMUX_LINE_IN, AC97_LINE }, 328 { EM28XX_AMUX_PHONE, AC97_PHONE }, 329 { EM28XX_AMUX_MIC, AC97_MIC }, 330 { EM28XX_AMUX_CD, AC97_CD }, 331 { EM28XX_AMUX_AUX, AC97_AUX }, 332 { EM28XX_AMUX_PCM_OUT, AC97_PCM }, 333 }; 334 335 static int set_ac97_input(struct em28xx *dev) 336 { 337 int ret, i; 338 enum em28xx_amux amux = dev->ctl_ainput; 339 340 /* 341 * EM28XX_AMUX_VIDEO2 is a special case used to indicate that 342 * em28xx should point to LINE IN, while AC97 should use VIDEO 343 */ 344 if (amux == EM28XX_AMUX_VIDEO2) 345 amux = EM28XX_AMUX_VIDEO; 346 347 /* Mute all entres but the one that were selected */ 348 for (i = 0; i < ARRAY_SIZE(inputs); i++) { 349 if (amux == inputs[i].mux) 350 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808); 351 else 352 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000); 353 354 if (ret < 0) 355 dev_warn(&dev->intf->dev, 356 "couldn't setup AC97 register %d\n", 357 inputs[i].reg); 358 } 359 return 0; 360 } 361 362 static int em28xx_set_audio_source(struct em28xx *dev) 363 { 364 int ret; 365 u8 input; 366 367 if (dev->board.is_em2800) { 368 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO) 369 input = EM2800_AUDIO_SRC_TUNER; 370 else 371 input = EM2800_AUDIO_SRC_LINE; 372 373 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1); 374 if (ret < 0) 375 return ret; 376 } 377 378 if (dev->has_msp34xx) { 379 input = EM28XX_AUDIO_SRC_TUNER; 380 } else { 381 switch (dev->ctl_ainput) { 382 case EM28XX_AMUX_VIDEO: 383 input = EM28XX_AUDIO_SRC_TUNER; 384 break; 385 default: 386 input = EM28XX_AUDIO_SRC_LINE; 387 break; 388 } 389 } 390 391 if (dev->board.mute_gpio && dev->mute) 392 em28xx_gpio_set(dev, dev->board.mute_gpio); 393 else 394 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 395 396 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0); 397 if (ret < 0) 398 return ret; 399 usleep_range(10000, 11000); 400 401 switch (dev->audio_mode.ac97) { 402 case EM28XX_NO_AC97: 403 break; 404 default: 405 ret = set_ac97_input(dev); 406 } 407 408 return ret; 409 } 410 411 struct em28xx_vol_otable { 412 enum em28xx_aout mux; 413 u8 reg; 414 }; 415 416 static const struct em28xx_vol_otable outputs[] = { 417 { EM28XX_AOUT_MASTER, AC97_MASTER }, 418 { EM28XX_AOUT_LINE, AC97_HEADPHONE }, 419 { EM28XX_AOUT_MONO, AC97_MASTER_MONO }, 420 { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER }, 421 { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER }, 422 }; 423 424 int em28xx_audio_analog_set(struct em28xx *dev) 425 { 426 int ret, i; 427 u8 xclk; 428 429 if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE) 430 return 0; 431 432 /* 433 * It is assumed that all devices use master volume for output. 434 * It would be possible to use also line output. 435 */ 436 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 437 /* Mute all outputs */ 438 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 439 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000); 440 if (ret < 0) 441 dev_warn(&dev->intf->dev, 442 "couldn't setup AC97 register %d\n", 443 outputs[i].reg); 444 } 445 } 446 447 xclk = dev->board.xclk & 0x7f; 448 if (!dev->mute) 449 xclk |= EM28XX_XCLK_AUDIO_UNMUTE; 450 451 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk); 452 if (ret < 0) 453 return ret; 454 usleep_range(10000, 11000); 455 456 /* Selects the proper audio input */ 457 ret = em28xx_set_audio_source(dev); 458 459 /* Sets volume */ 460 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) { 461 int vol; 462 463 em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200); 464 em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031); 465 em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80); 466 467 /* LSB: left channel - both channels with the same level */ 468 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8); 469 470 /* Mute device, if needed */ 471 if (dev->mute) 472 vol |= 0x8000; 473 474 /* Sets volume */ 475 for (i = 0; i < ARRAY_SIZE(outputs); i++) { 476 if (dev->ctl_aoutput & outputs[i].mux) 477 ret = em28xx_write_ac97(dev, outputs[i].reg, 478 vol); 479 if (ret < 0) 480 dev_warn(&dev->intf->dev, 481 "couldn't setup AC97 register %d\n", 482 outputs[i].reg); 483 } 484 485 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) { 486 int sel = ac97_return_record_select(dev->ctl_aoutput); 487 488 /* 489 * Use the same input for both left and right 490 * channels 491 */ 492 sel |= (sel << 8); 493 494 em28xx_write_ac97(dev, AC97_REC_SEL, sel); 495 } 496 } 497 498 return ret; 499 } 500 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set); 501 502 int em28xx_audio_setup(struct em28xx *dev) 503 { 504 int vid1, vid2, feat, cfg; 505 u32 vid = 0; 506 u8 i2s_samplerates; 507 508 if (dev->chip_id == CHIP_ID_EM2870 || 509 dev->chip_id == CHIP_ID_EM2874 || 510 dev->chip_id == CHIP_ID_EM28174 || 511 dev->chip_id == CHIP_ID_EM28178) { 512 /* Digital only device - don't load any alsa module */ 513 dev->int_audio_type = EM28XX_INT_AUDIO_NONE; 514 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE; 515 return 0; 516 } 517 518 /* See how this device is configured */ 519 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG); 520 dev_info(&dev->intf->dev, "Config register raw data: 0x%02x\n", cfg); 521 if (cfg < 0) { /* Register read error */ 522 /* Be conservative */ 523 dev->int_audio_type = EM28XX_INT_AUDIO_AC97; 524 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) { 525 /* The device doesn't have vendor audio at all */ 526 dev->int_audio_type = EM28XX_INT_AUDIO_NONE; 527 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE; 528 return 0; 529 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) { 530 dev->int_audio_type = EM28XX_INT_AUDIO_I2S; 531 if (dev->chip_id < CHIP_ID_EM2860 && 532 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 533 EM2820_CHIPCFG_I2S_1_SAMPRATE) 534 i2s_samplerates = 1; 535 else if (dev->chip_id >= CHIP_ID_EM2860 && 536 (cfg & EM28XX_CHIPCFG_AUDIOMASK) == 537 EM2860_CHIPCFG_I2S_5_SAMPRATES) 538 i2s_samplerates = 5; 539 else 540 i2s_samplerates = 3; 541 dev_info(&dev->intf->dev, "I2S Audio (%d sample rate(s))\n", 542 i2s_samplerates); 543 /* Skip the code that does AC97 vendor detection */ 544 dev->audio_mode.ac97 = EM28XX_NO_AC97; 545 goto init_audio; 546 } else { 547 dev->int_audio_type = EM28XX_INT_AUDIO_AC97; 548 } 549 550 dev->audio_mode.ac97 = EM28XX_AC97_OTHER; 551 552 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1); 553 if (vid1 < 0) { 554 /* 555 * Device likely doesn't support AC97 556 * Note: (some) em2800 devices without eeprom reports 0x91 on 557 * CHIPCFG register, even not having an AC97 chip 558 */ 559 dev_warn(&dev->intf->dev, 560 "AC97 chip type couldn't be determined\n"); 561 dev->audio_mode.ac97 = EM28XX_NO_AC97; 562 if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR) 563 dev->usb_audio_type = EM28XX_USB_AUDIO_NONE; 564 dev->int_audio_type = EM28XX_INT_AUDIO_NONE; 565 goto init_audio; 566 } 567 568 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2); 569 if (vid2 < 0) 570 goto init_audio; 571 572 vid = vid1 << 16 | vid2; 573 dev_warn(&dev->intf->dev, "AC97 vendor ID = 0x%08x\n", vid); 574 575 feat = em28xx_read_ac97(dev, AC97_RESET); 576 if (feat < 0) 577 goto init_audio; 578 579 dev_warn(&dev->intf->dev, "AC97 features = 0x%04x\n", feat); 580 581 /* Try to identify what audio processor we have */ 582 if ((vid == 0xffffffff || vid == 0x83847650) && feat == 0x6a90) 583 dev->audio_mode.ac97 = EM28XX_AC97_EM202; 584 else if ((vid >> 8) == 0x838476) 585 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL; 586 587 init_audio: 588 /* Reports detected AC97 processor */ 589 switch (dev->audio_mode.ac97) { 590 case EM28XX_NO_AC97: 591 dev_info(&dev->intf->dev, "No AC97 audio processor\n"); 592 break; 593 case EM28XX_AC97_EM202: 594 dev_info(&dev->intf->dev, 595 "Empia 202 AC97 audio processor detected\n"); 596 break; 597 case EM28XX_AC97_SIGMATEL: 598 dev_info(&dev->intf->dev, 599 "Sigmatel audio processor detected (stac 97%02x)\n", 600 vid & 0xff); 601 break; 602 case EM28XX_AC97_OTHER: 603 dev_warn(&dev->intf->dev, 604 "Unknown AC97 audio processor detected!\n"); 605 break; 606 default: 607 break; 608 } 609 610 return em28xx_audio_analog_set(dev); 611 } 612 EXPORT_SYMBOL_GPL(em28xx_audio_setup); 613 614 const struct em28xx_led *em28xx_find_led(struct em28xx *dev, 615 enum em28xx_led_role role) 616 { 617 if (dev->board.leds) { 618 u8 k = 0; 619 620 while (dev->board.leds[k].role >= 0 && 621 dev->board.leds[k].role < EM28XX_NUM_LED_ROLES) { 622 if (dev->board.leds[k].role == role) 623 return &dev->board.leds[k]; 624 k++; 625 } 626 } 627 return NULL; 628 } 629 EXPORT_SYMBOL_GPL(em28xx_find_led); 630 631 int em28xx_capture_start(struct em28xx *dev, int start) 632 { 633 int rc; 634 const struct em28xx_led *led = NULL; 635 636 if (dev->chip_id == CHIP_ID_EM2874 || 637 dev->chip_id == CHIP_ID_EM2884 || 638 dev->chip_id == CHIP_ID_EM28174 || 639 dev->chip_id == CHIP_ID_EM28178) { 640 /* The Transport Stream Enable Register moved in em2874 */ 641 if (dev->dvb_xfer_bulk) { 642 /* Max Tx Size = 188 * 256 = 48128 - LCM(188,512) * 2 */ 643 em28xx_write_reg(dev, (dev->ts == PRIMARY_TS) ? 644 EM2874_R5D_TS1_PKT_SIZE : 645 EM2874_R5E_TS2_PKT_SIZE, 646 0xff); 647 } else { 648 /* ISOC Maximum Transfer Size = 188 * 5 */ 649 em28xx_write_reg(dev, (dev->ts == PRIMARY_TS) ? 650 EM2874_R5D_TS1_PKT_SIZE : 651 EM2874_R5E_TS2_PKT_SIZE, 652 dev->dvb_max_pkt_size_isoc / 188); 653 } 654 if (dev->ts == PRIMARY_TS) 655 rc = em28xx_write_reg_bits(dev, 656 EM2874_R5F_TS_ENABLE, 657 start ? EM2874_TS1_CAPTURE_ENABLE : 0x00, 658 EM2874_TS1_CAPTURE_ENABLE | EM2874_TS1_FILTER_ENABLE | EM2874_TS1_NULL_DISCARD); 659 else 660 rc = em28xx_write_reg_bits(dev, 661 EM2874_R5F_TS_ENABLE, 662 start ? EM2874_TS2_CAPTURE_ENABLE : 0x00, 663 EM2874_TS2_CAPTURE_ENABLE | EM2874_TS2_FILTER_ENABLE | EM2874_TS2_NULL_DISCARD); 664 } else { 665 /* FIXME: which is the best order? */ 666 /* video registers are sampled by VREF */ 667 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP, 668 start ? 0x10 : 0x00, 0x10); 669 if (rc < 0) 670 return rc; 671 672 if (start) { 673 if (dev->is_webcam) 674 rc = em28xx_write_reg(dev, 0x13, 0x0c); 675 676 /* Enable video capture */ 677 rc = em28xx_write_reg(dev, 0x48, 0x00); 678 if (rc < 0) 679 return rc; 680 681 if (dev->mode == EM28XX_ANALOG_MODE) 682 rc = em28xx_write_reg(dev, 683 EM28XX_R12_VINENABLE, 684 0x67); 685 else 686 rc = em28xx_write_reg(dev, 687 EM28XX_R12_VINENABLE, 688 0x37); 689 if (rc < 0) 690 return rc; 691 692 usleep_range(10000, 11000); 693 } else { 694 /* disable video capture */ 695 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27); 696 } 697 } 698 699 if (dev->mode == EM28XX_ANALOG_MODE) 700 led = em28xx_find_led(dev, EM28XX_LED_ANALOG_CAPTURING); 701 else 702 led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING); 703 704 if (led) 705 em28xx_write_reg_bits(dev, led->gpio_reg, 706 (!start ^ led->inverted) ? 707 ~led->gpio_mask : led->gpio_mask, 708 led->gpio_mask); 709 710 return rc; 711 } 712 713 int em28xx_gpio_set(struct em28xx *dev, const struct em28xx_reg_seq *gpio) 714 { 715 int rc = 0; 716 717 if (!gpio) 718 return rc; 719 720 if (dev->mode != EM28XX_SUSPEND) { 721 em28xx_write_reg(dev, 0x48, 0x00); 722 if (dev->mode == EM28XX_ANALOG_MODE) 723 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67); 724 else 725 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37); 726 usleep_range(10000, 11000); 727 } 728 729 /* Send GPIO reset sequences specified at board entry */ 730 while (gpio->sleep >= 0) { 731 if (gpio->reg >= 0) { 732 rc = em28xx_write_reg_bits(dev, 733 gpio->reg, 734 gpio->val, 735 gpio->mask); 736 if (rc < 0) 737 return rc; 738 } 739 if (gpio->sleep > 0) 740 msleep(gpio->sleep); 741 742 gpio++; 743 } 744 return rc; 745 } 746 EXPORT_SYMBOL_GPL(em28xx_gpio_set); 747 748 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode) 749 { 750 if (dev->mode == set_mode) 751 return 0; 752 753 if (set_mode == EM28XX_SUSPEND) { 754 dev->mode = set_mode; 755 756 /* FIXME: add suspend support for ac97 */ 757 758 return em28xx_gpio_set(dev, dev->board.suspend_gpio); 759 } 760 761 dev->mode = set_mode; 762 763 if (dev->mode == EM28XX_DIGITAL_MODE) 764 return em28xx_gpio_set(dev, dev->board.dvb_gpio); 765 else 766 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio); 767 } 768 EXPORT_SYMBOL_GPL(em28xx_set_mode); 769 770 /* 771 *URB control 772 */ 773 774 /* 775 * URB completion handler for isoc/bulk transfers 776 */ 777 static void em28xx_irq_callback(struct urb *urb) 778 { 779 struct em28xx *dev = urb->context; 780 int i; 781 782 switch (urb->status) { 783 case 0: /* success */ 784 case -ETIMEDOUT: /* NAK */ 785 break; 786 case -ECONNRESET: /* kill */ 787 case -ENOENT: 788 case -ESHUTDOWN: 789 return; 790 default: /* error */ 791 em28xx_isocdbg("urb completion error %d.\n", urb->status); 792 break; 793 } 794 795 /* Copy data from URB */ 796 spin_lock(&dev->slock); 797 dev->usb_ctl.urb_data_copy(dev, urb); 798 spin_unlock(&dev->slock); 799 800 /* Reset urb buffers */ 801 for (i = 0; i < urb->number_of_packets; i++) { 802 /* isoc only (bulk: number_of_packets = 0) */ 803 urb->iso_frame_desc[i].status = 0; 804 urb->iso_frame_desc[i].actual_length = 0; 805 } 806 urb->status = 0; 807 808 urb->status = usb_submit_urb(urb, GFP_ATOMIC); 809 if (urb->status) { 810 em28xx_isocdbg("urb resubmit failed (error=%i)\n", 811 urb->status); 812 } 813 } 814 815 /* 816 * Stop and Deallocate URBs 817 */ 818 void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode) 819 { 820 struct urb *urb; 821 struct em28xx_usb_bufs *usb_bufs; 822 int i; 823 824 em28xx_isocdbg("called %s in mode %d\n", __func__, mode); 825 826 if (mode == EM28XX_DIGITAL_MODE) 827 usb_bufs = &dev->usb_ctl.digital_bufs; 828 else 829 usb_bufs = &dev->usb_ctl.analog_bufs; 830 831 for (i = 0; i < usb_bufs->num_bufs; i++) { 832 urb = usb_bufs->urb[i]; 833 if (urb) { 834 if (!irqs_disabled()) 835 usb_kill_urb(urb); 836 else 837 usb_unlink_urb(urb); 838 839 usb_free_urb(urb); 840 usb_bufs->urb[i] = NULL; 841 } 842 } 843 844 kfree(usb_bufs->urb); 845 kfree(usb_bufs->buf); 846 847 usb_bufs->urb = NULL; 848 usb_bufs->buf = NULL; 849 usb_bufs->num_bufs = 0; 850 851 em28xx_capture_start(dev, 0); 852 } 853 EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer); 854 855 /* 856 * Stop URBs 857 */ 858 void em28xx_stop_urbs(struct em28xx *dev) 859 { 860 int i; 861 struct urb *urb; 862 struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs; 863 864 em28xx_isocdbg("called %s\n", __func__); 865 866 for (i = 0; i < isoc_bufs->num_bufs; i++) { 867 urb = isoc_bufs->urb[i]; 868 if (urb) { 869 if (!irqs_disabled()) 870 usb_kill_urb(urb); 871 else 872 usb_unlink_urb(urb); 873 } 874 } 875 876 em28xx_capture_start(dev, 0); 877 } 878 EXPORT_SYMBOL_GPL(em28xx_stop_urbs); 879 880 /* 881 * Allocate URBs 882 */ 883 int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, 884 int num_bufs, int max_pkt_size, int packet_multiplier) 885 { 886 struct em28xx_usb_bufs *usb_bufs; 887 struct urb *urb; 888 struct usb_device *udev = interface_to_usbdev(dev->intf); 889 int i; 890 int sb_size, pipe; 891 int j, k; 892 893 em28xx_isocdbg("em28xx: called %s in mode %d\n", __func__, mode); 894 895 /* 896 * Check mode and if we have an endpoint for the selected 897 * transfer type, select buffer 898 */ 899 if (mode == EM28XX_DIGITAL_MODE) { 900 if ((xfer_bulk && !dev->dvb_ep_bulk) || 901 (!xfer_bulk && !dev->dvb_ep_isoc)) { 902 dev_err(&dev->intf->dev, 903 "no endpoint for DVB mode and transfer type %d\n", 904 xfer_bulk > 0); 905 return -EINVAL; 906 } 907 usb_bufs = &dev->usb_ctl.digital_bufs; 908 } else if (mode == EM28XX_ANALOG_MODE) { 909 if ((xfer_bulk && !dev->analog_ep_bulk) || 910 (!xfer_bulk && !dev->analog_ep_isoc)) { 911 dev_err(&dev->intf->dev, 912 "no endpoint for analog mode and transfer type %d\n", 913 xfer_bulk > 0); 914 return -EINVAL; 915 } 916 usb_bufs = &dev->usb_ctl.analog_bufs; 917 } else { 918 dev_err(&dev->intf->dev, "invalid mode selected\n"); 919 return -EINVAL; 920 } 921 922 /* De-allocates all pending stuff */ 923 em28xx_uninit_usb_xfer(dev, mode); 924 925 usb_bufs->num_bufs = num_bufs; 926 927 usb_bufs->urb = kcalloc(num_bufs, sizeof(void *), GFP_KERNEL); 928 if (!usb_bufs->urb) 929 return -ENOMEM; 930 931 usb_bufs->buf = kcalloc(num_bufs, sizeof(void *), GFP_KERNEL); 932 if (!usb_bufs->buf) { 933 kfree(usb_bufs->buf); 934 return -ENOMEM; 935 } 936 937 usb_bufs->max_pkt_size = max_pkt_size; 938 if (xfer_bulk) 939 usb_bufs->num_packets = 0; 940 else 941 usb_bufs->num_packets = packet_multiplier; 942 dev->usb_ctl.vid_buf = NULL; 943 dev->usb_ctl.vbi_buf = NULL; 944 945 sb_size = packet_multiplier * usb_bufs->max_pkt_size; 946 947 /* allocate urbs and transfer buffers */ 948 for (i = 0; i < usb_bufs->num_bufs; i++) { 949 urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL); 950 if (!urb) { 951 em28xx_uninit_usb_xfer(dev, mode); 952 return -ENOMEM; 953 } 954 usb_bufs->urb[i] = urb; 955 956 usb_bufs->buf[i] = kzalloc(sb_size, GFP_KERNEL); 957 if (!usb_bufs->buf[i]) { 958 em28xx_uninit_usb_xfer(dev, mode); 959 960 for (i--; i >= 0; i--) 961 kfree(usb_bufs->buf[i]); 962 963 kfree(usb_bufs->buf); 964 usb_bufs->buf = NULL; 965 966 return -ENOMEM; 967 } 968 969 urb->transfer_flags = URB_FREE_BUFFER; 970 971 if (xfer_bulk) { /* bulk */ 972 pipe = usb_rcvbulkpipe(udev, 973 mode == EM28XX_ANALOG_MODE ? 974 dev->analog_ep_bulk : 975 dev->dvb_ep_bulk); 976 usb_fill_bulk_urb(urb, udev, pipe, usb_bufs->buf[i], 977 sb_size, em28xx_irq_callback, dev); 978 } else { /* isoc */ 979 pipe = usb_rcvisocpipe(udev, 980 mode == EM28XX_ANALOG_MODE ? 981 dev->analog_ep_isoc : 982 dev->dvb_ep_isoc); 983 usb_fill_int_urb(urb, udev, pipe, usb_bufs->buf[i], 984 sb_size, em28xx_irq_callback, dev, 1); 985 urb->transfer_flags |= URB_ISO_ASAP; 986 k = 0; 987 for (j = 0; j < usb_bufs->num_packets; j++) { 988 urb->iso_frame_desc[j].offset = k; 989 urb->iso_frame_desc[j].length = 990 usb_bufs->max_pkt_size; 991 k += usb_bufs->max_pkt_size; 992 } 993 } 994 995 urb->number_of_packets = usb_bufs->num_packets; 996 } 997 998 return 0; 999 } 1000 EXPORT_SYMBOL_GPL(em28xx_alloc_urbs); 1001 1002 /* 1003 * Allocate URBs and start IRQ 1004 */ 1005 int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode, 1006 int xfer_bulk, int num_bufs, int max_pkt_size, 1007 int packet_multiplier, 1008 int (*urb_data_copy)(struct em28xx *dev, struct urb *urb)) 1009 { 1010 struct em28xx_dmaqueue *dma_q = &dev->vidq; 1011 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq; 1012 struct em28xx_usb_bufs *usb_bufs; 1013 struct usb_device *udev = interface_to_usbdev(dev->intf); 1014 int i; 1015 int rc; 1016 int alloc; 1017 1018 em28xx_isocdbg("em28xx: called %s in mode %d\n", __func__, mode); 1019 1020 dev->usb_ctl.urb_data_copy = urb_data_copy; 1021 1022 if (mode == EM28XX_DIGITAL_MODE) { 1023 usb_bufs = &dev->usb_ctl.digital_bufs; 1024 /* no need to free/alloc usb buffers in digital mode */ 1025 alloc = 0; 1026 } else { 1027 usb_bufs = &dev->usb_ctl.analog_bufs; 1028 alloc = 1; 1029 } 1030 1031 if (alloc) { 1032 rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs, 1033 max_pkt_size, packet_multiplier); 1034 if (rc) 1035 return rc; 1036 } 1037 1038 if (xfer_bulk) { 1039 rc = usb_clear_halt(udev, usb_bufs->urb[0]->pipe); 1040 if (rc < 0) { 1041 dev_err(&dev->intf->dev, 1042 "failed to clear USB bulk endpoint stall/halt condition (error=%i)\n", 1043 rc); 1044 em28xx_uninit_usb_xfer(dev, mode); 1045 return rc; 1046 } 1047 } 1048 1049 init_waitqueue_head(&dma_q->wq); 1050 init_waitqueue_head(&vbi_dma_q->wq); 1051 1052 em28xx_capture_start(dev, 1); 1053 1054 /* submit urbs and enables IRQ */ 1055 for (i = 0; i < usb_bufs->num_bufs; i++) { 1056 rc = usb_submit_urb(usb_bufs->urb[i], GFP_KERNEL); 1057 if (rc) { 1058 dev_err(&dev->intf->dev, 1059 "submit of urb %i failed (error=%i)\n", i, rc); 1060 em28xx_uninit_usb_xfer(dev, mode); 1061 return rc; 1062 } 1063 } 1064 1065 return 0; 1066 } 1067 EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer); 1068 1069 /* 1070 * Device control list 1071 */ 1072 1073 static LIST_HEAD(em28xx_devlist); 1074 static DEFINE_MUTEX(em28xx_devlist_mutex); 1075 1076 /* 1077 * Extension interface 1078 */ 1079 1080 static LIST_HEAD(em28xx_extension_devlist); 1081 1082 int em28xx_register_extension(struct em28xx_ops *ops) 1083 { 1084 struct em28xx *dev = NULL; 1085 1086 mutex_lock(&em28xx_devlist_mutex); 1087 list_add_tail(&ops->next, &em28xx_extension_devlist); 1088 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1089 if (ops->init) { 1090 ops->init(dev); 1091 if (dev->dev_next) 1092 ops->init(dev->dev_next); 1093 } 1094 } 1095 mutex_unlock(&em28xx_devlist_mutex); 1096 pr_info("em28xx: Registered (%s) extension\n", ops->name); 1097 return 0; 1098 } 1099 EXPORT_SYMBOL(em28xx_register_extension); 1100 1101 void em28xx_unregister_extension(struct em28xx_ops *ops) 1102 { 1103 struct em28xx *dev = NULL; 1104 1105 mutex_lock(&em28xx_devlist_mutex); 1106 list_for_each_entry(dev, &em28xx_devlist, devlist) { 1107 if (ops->fini) { 1108 if (dev->dev_next) 1109 ops->fini(dev->dev_next); 1110 ops->fini(dev); 1111 } 1112 } 1113 list_del(&ops->next); 1114 mutex_unlock(&em28xx_devlist_mutex); 1115 pr_info("em28xx: Removed (%s) extension\n", ops->name); 1116 } 1117 EXPORT_SYMBOL(em28xx_unregister_extension); 1118 1119 void em28xx_init_extension(struct em28xx *dev) 1120 { 1121 const struct em28xx_ops *ops = NULL; 1122 1123 mutex_lock(&em28xx_devlist_mutex); 1124 list_add_tail(&dev->devlist, &em28xx_devlist); 1125 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1126 if (ops->init) { 1127 ops->init(dev); 1128 if (dev->dev_next) 1129 ops->init(dev->dev_next); 1130 } 1131 } 1132 mutex_unlock(&em28xx_devlist_mutex); 1133 } 1134 1135 void em28xx_close_extension(struct em28xx *dev) 1136 { 1137 const struct em28xx_ops *ops = NULL; 1138 1139 mutex_lock(&em28xx_devlist_mutex); 1140 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1141 if (ops->fini) { 1142 if (dev->dev_next) 1143 ops->fini(dev->dev_next); 1144 ops->fini(dev); 1145 } 1146 } 1147 list_del(&dev->devlist); 1148 mutex_unlock(&em28xx_devlist_mutex); 1149 } 1150 1151 int em28xx_suspend_extension(struct em28xx *dev) 1152 { 1153 const struct em28xx_ops *ops = NULL; 1154 1155 dev_info(&dev->intf->dev, "Suspending extensions\n"); 1156 mutex_lock(&em28xx_devlist_mutex); 1157 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1158 if (ops->suspend) 1159 ops->suspend(dev); 1160 if (dev->dev_next) 1161 ops->suspend(dev->dev_next); 1162 } 1163 mutex_unlock(&em28xx_devlist_mutex); 1164 return 0; 1165 } 1166 1167 int em28xx_resume_extension(struct em28xx *dev) 1168 { 1169 const struct em28xx_ops *ops = NULL; 1170 1171 dev_info(&dev->intf->dev, "Resuming extensions\n"); 1172 mutex_lock(&em28xx_devlist_mutex); 1173 list_for_each_entry(ops, &em28xx_extension_devlist, next) { 1174 if (!ops->resume) 1175 continue; 1176 ops->resume(dev); 1177 if (dev->dev_next) 1178 ops->resume(dev->dev_next); 1179 } 1180 mutex_unlock(&em28xx_devlist_mutex); 1181 return 0; 1182 } 1183