xref: /linux/drivers/media/platform/ti/omap/omap_voutdef.h (revision cbdb1f163af2bb90d01be1f0263df1d8d5c9d9d3)
1 /*
2  * omap_voutdef.h
3  *
4  * Copyright (C) 2010 Texas Instruments.
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2. This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10 
11 #ifndef OMAP_VOUTDEF_H
12 #define OMAP_VOUTDEF_H
13 
14 #include <media/videobuf2-dma-contig.h>
15 #include <media/v4l2-ctrls.h>
16 #include <video/omapfb_dss.h>
17 #include <video/omapvrfb.h>
18 #include <linux/dmaengine.h>
19 
20 #define YUYV_BPP        2
21 #define RGB565_BPP      2
22 #define RGB24_BPP       3
23 #define RGB32_BPP       4
24 #define TILE_SIZE       32
25 #define YUYV_VRFB_BPP   2
26 #define RGB_VRFB_BPP    1
27 #define MAX_CID		3
28 #define MAC_VRFB_CTXS	4
29 #define MAX_VOUT_DEV	2
30 #define MAX_OVLS	3
31 #define MAX_DISPLAYS	10
32 #define MAX_MANAGERS	3
33 
34 #define QQVGA_WIDTH		160
35 #define QQVGA_HEIGHT		120
36 
37 /* Max Resolution supported by the driver */
38 #define VID_MAX_WIDTH		1280	/* Largest width */
39 #define VID_MAX_HEIGHT		720	/* Largest height */
40 
41 /* Minimum requirement is 2x2 for DSS */
42 #define VID_MIN_WIDTH		2
43 #define VID_MIN_HEIGHT		2
44 
45 /* 2048 x 2048 is max res supported by OMAP display controller */
46 #define MAX_PIXELS_PER_LINE     2048
47 
48 #define VRFB_TX_TIMEOUT         1000
49 #define VRFB_NUM_BUFS		4
50 
51 /* Max buffer size tobe allocated during init */
52 #define OMAP_VOUT_MAX_BUF_SIZE (VID_MAX_WIDTH*VID_MAX_HEIGHT*4)
53 
54 enum dma_channel_state {
55 	DMA_CHAN_NOT_ALLOTED,
56 	DMA_CHAN_ALLOTED,
57 };
58 
59 /* Enum for Rotation
60  * DSS understands rotation in 0, 1, 2, 3 context
61  * while V4L2 driver understands it as 0, 90, 180, 270
62  */
63 enum dss_rotation {
64 	dss_rotation_0_degree	= 0,
65 	dss_rotation_90_degree	= 1,
66 	dss_rotation_180_degree	= 2,
67 	dss_rotation_270_degree = 3,
68 };
69 
70 /* Enum for choosing rotation type for vout
71  * DSS2 doesn't understand no rotation as an
72  * option while V4L2 driver doesn't support
73  * rotation in the case where VRFB is not built in
74  * the kernel
75  */
76 enum vout_rotaion_type {
77 	VOUT_ROT_NONE	= 0,
78 	VOUT_ROT_VRFB	= 1,
79 };
80 
81 /*
82  * This structure is used to store the DMA transfer parameters
83  * for VRFB hidden buffer
84  */
85 struct vid_vrfb_dma {
86 	struct dma_chan *chan;
87 	struct dma_interleaved_template *xt;
88 
89 	int req_status;
90 	int tx_status;
91 	wait_queue_head_t wait;
92 };
93 
94 struct omapvideo_info {
95 	int id;
96 	int num_overlays;
97 	struct omap_overlay *overlays[MAX_OVLS];
98 	enum vout_rotaion_type rotation_type;
99 };
100 
101 struct omap2video_device {
102 	struct mutex  mtx;
103 
104 	int state;
105 
106 	struct v4l2_device v4l2_dev;
107 	struct omap_vout_device *vouts[MAX_VOUT_DEV];
108 
109 	int num_displays;
110 	struct omap_dss_device *displays[MAX_DISPLAYS];
111 	int num_overlays;
112 	struct omap_overlay *overlays[MAX_OVLS];
113 	int num_managers;
114 	struct omap_overlay_manager *managers[MAX_MANAGERS];
115 };
116 
117 /* buffer for one video frame */
118 struct omap_vout_buffer {
119 	/* common v4l buffer stuff -- must be first */
120 	struct vb2_v4l2_buffer		vbuf;
121 	struct list_head		queue;
122 };
123 
124 static inline struct omap_vout_buffer *vb2_to_omap_vout_buffer(struct vb2_buffer *vb)
125 {
126 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
127 
128 	return container_of(vbuf, struct omap_vout_buffer, vbuf);
129 }
130 
131 /* per-device data structure */
132 struct omap_vout_device {
133 
134 	struct omapvideo_info vid_info;
135 	struct video_device *vfd;
136 	struct omap2video_device *vid_dev;
137 	struct v4l2_ctrl_handler ctrl_handler;
138 	int vid;
139 
140 	/* allow to reuse previously allocated buffer which is big enough */
141 	int buffer_size;
142 	enum omap_color_mode dss_mode;
143 
144 	u32 sequence;
145 
146 	struct v4l2_pix_format pix;
147 	struct v4l2_rect crop;
148 	struct v4l2_window win;
149 	struct v4l2_framebuffer fbuf;
150 
151 	/* Lock to protect the shared data structures in ioctl */
152 	struct mutex lock;
153 
154 	enum dss_rotation rotation;
155 	bool mirror;
156 	int flicker_filter;
157 
158 	int bpp; /* bytes per pixel */
159 	int vrfb_bpp; /* bytes per pixel with respect to VRFB */
160 
161 	struct vid_vrfb_dma vrfb_dma_tx;
162 	unsigned int smsshado_phy_addr[MAC_VRFB_CTXS];
163 	unsigned int smsshado_virt_addr[MAC_VRFB_CTXS];
164 	struct vrfb vrfb_context[MAC_VRFB_CTXS];
165 	bool vrfb_static_allocation;
166 	unsigned int smsshado_size;
167 	unsigned char pos;
168 
169 	int ps, vr_ps, line_length, first_int, field_id;
170 	struct omap_vout_buffer *cur_frm, *next_frm;
171 	spinlock_t vbq_lock;            /* spinlock for dma_queue */
172 	struct list_head dma_queue;
173 	dma_addr_t queued_buf_addr[VIDEO_MAX_FRAME];
174 	u32 cropped_offset;
175 	s32 tv_field1_offset;
176 	void *isr_handle;
177 	struct vb2_queue vq;
178 
179 };
180 
181 /*
182  * Return true if rotation is 90 or 270
183  */
184 static inline int is_rotation_90_or_270(const struct omap_vout_device *vout)
185 {
186 	return (vout->rotation == dss_rotation_90_degree ||
187 			vout->rotation == dss_rotation_270_degree);
188 }
189 
190 /*
191  * Return true if rotation is enabled
192  */
193 static inline int is_rotation_enabled(const struct omap_vout_device *vout)
194 {
195 	return vout->rotation || vout->mirror;
196 }
197 
198 /*
199  * Reverse the rotation degree if mirroring is enabled
200  */
201 static inline int calc_rotation(const struct omap_vout_device *vout)
202 {
203 	if (!vout->mirror)
204 		return vout->rotation;
205 
206 	switch (vout->rotation) {
207 	case dss_rotation_90_degree:
208 		return dss_rotation_270_degree;
209 	case dss_rotation_270_degree:
210 		return dss_rotation_90_degree;
211 	case dss_rotation_180_degree:
212 		return dss_rotation_0_degree;
213 	default:
214 		return dss_rotation_180_degree;
215 	}
216 }
217 
218 void omap_vout_free_buffers(struct omap_vout_device *vout);
219 #endif	/* ifndef OMAP_VOUTDEF_H */
220