1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * PowerMac G5 SMU driver 4 * 5 * Copyright 2004 J. Mayer <l_indien@magic.fr> 6 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. 7 */ 8 9 /* 10 * TODO: 11 * - maybe add timeout to commands ? 12 * - blocking version of time functions 13 * - polling version of i2c commands (including timer that works with 14 * interrupts off) 15 * - maybe avoid some data copies with i2c by directly using the smu cmd 16 * buffer and a lower level internal interface 17 * - understand SMU -> CPU events and implement reception of them via 18 * the userland interface 19 */ 20 21 #include <linux/types.h> 22 #include <linux/kernel.h> 23 #include <linux/device.h> 24 #include <linux/dmapool.h> 25 #include <linux/memblock.h> 26 #include <linux/vmalloc.h> 27 #include <linux/highmem.h> 28 #include <linux/jiffies.h> 29 #include <linux/interrupt.h> 30 #include <linux/rtc.h> 31 #include <linux/completion.h> 32 #include <linux/miscdevice.h> 33 #include <linux/delay.h> 34 #include <linux/poll.h> 35 #include <linux/mutex.h> 36 #include <linux/of_device.h> 37 #include <linux/of_irq.h> 38 #include <linux/of_platform.h> 39 #include <linux/slab.h> 40 #include <linux/sched/signal.h> 41 42 #include <asm/byteorder.h> 43 #include <asm/io.h> 44 #include <asm/prom.h> 45 #include <asm/machdep.h> 46 #include <asm/pmac_feature.h> 47 #include <asm/smu.h> 48 #include <asm/sections.h> 49 #include <linux/uaccess.h> 50 51 #define VERSION "0.7" 52 #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." 53 54 #undef DEBUG_SMU 55 56 #ifdef DEBUG_SMU 57 #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) 58 #else 59 #define DPRINTK(fmt, args...) do { } while (0) 60 #endif 61 62 /* 63 * This is the command buffer passed to the SMU hardware 64 */ 65 #define SMU_MAX_DATA 254 66 67 struct smu_cmd_buf { 68 u8 cmd; 69 u8 length; 70 u8 data[SMU_MAX_DATA]; 71 }; 72 73 struct smu_device { 74 spinlock_t lock; 75 struct device_node *of_node; 76 struct platform_device *of_dev; 77 int doorbell; /* doorbell gpio */ 78 u32 __iomem *db_buf; /* doorbell buffer */ 79 struct device_node *db_node; 80 unsigned int db_irq; 81 int msg; 82 struct device_node *msg_node; 83 unsigned int msg_irq; 84 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ 85 u32 cmd_buf_abs; /* command buffer absolute */ 86 struct list_head cmd_list; 87 struct smu_cmd *cmd_cur; /* pending command */ 88 int broken_nap; 89 struct list_head cmd_i2c_list; 90 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ 91 struct timer_list i2c_timer; 92 }; 93 94 /* 95 * I don't think there will ever be more than one SMU, so 96 * for now, just hard code that 97 */ 98 static DEFINE_MUTEX(smu_mutex); 99 static struct smu_device *smu; 100 static DEFINE_MUTEX(smu_part_access); 101 static int smu_irq_inited; 102 static unsigned long smu_cmdbuf_abs; 103 104 static void smu_i2c_retry(struct timer_list *t); 105 106 /* 107 * SMU driver low level stuff 108 */ 109 110 static void smu_start_cmd(void) 111 { 112 unsigned long faddr, fend; 113 struct smu_cmd *cmd; 114 115 if (list_empty(&smu->cmd_list)) 116 return; 117 118 /* Fetch first command in queue */ 119 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); 120 smu->cmd_cur = cmd; 121 list_del(&cmd->link); 122 123 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, 124 cmd->data_len); 125 DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf); 126 127 /* Fill the SMU command buffer */ 128 smu->cmd_buf->cmd = cmd->cmd; 129 smu->cmd_buf->length = cmd->data_len; 130 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); 131 132 /* Flush command and data to RAM */ 133 faddr = (unsigned long)smu->cmd_buf; 134 fend = faddr + smu->cmd_buf->length + 2; 135 flush_dcache_range(faddr, fend); 136 137 138 /* We also disable NAP mode for the duration of the command 139 * on U3 based machines. 140 * This is slightly racy as it can be written back to 1 by a sysctl 141 * but that never happens in practice. There seem to be an issue with 142 * U3 based machines such as the iMac G5 where napping for the 143 * whole duration of the command prevents the SMU from fetching it 144 * from memory. This might be related to the strange i2c based 145 * mechanism the SMU uses to access memory. 146 */ 147 if (smu->broken_nap) 148 powersave_nap = 0; 149 150 /* This isn't exactly a DMA mapping here, I suspect 151 * the SMU is actually communicating with us via i2c to the 152 * northbridge or the CPU to access RAM. 153 */ 154 writel(smu->cmd_buf_abs, smu->db_buf); 155 156 /* Ring the SMU doorbell */ 157 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); 158 } 159 160 161 static irqreturn_t smu_db_intr(int irq, void *arg) 162 { 163 unsigned long flags; 164 struct smu_cmd *cmd; 165 void (*done)(struct smu_cmd *cmd, void *misc) = NULL; 166 void *misc = NULL; 167 u8 gpio; 168 int rc = 0; 169 170 /* SMU completed the command, well, we hope, let's make sure 171 * of it 172 */ 173 spin_lock_irqsave(&smu->lock, flags); 174 175 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 176 if ((gpio & 7) != 7) { 177 spin_unlock_irqrestore(&smu->lock, flags); 178 return IRQ_HANDLED; 179 } 180 181 cmd = smu->cmd_cur; 182 smu->cmd_cur = NULL; 183 if (cmd == NULL) 184 goto bail; 185 186 if (rc == 0) { 187 unsigned long faddr; 188 int reply_len; 189 u8 ack; 190 191 /* CPU might have brought back the cache line, so we need 192 * to flush again before peeking at the SMU response. We 193 * flush the entire buffer for now as we haven't read the 194 * reply length (it's only 2 cache lines anyway) 195 */ 196 faddr = (unsigned long)smu->cmd_buf; 197 flush_dcache_range(faddr, faddr + 256); 198 199 /* Now check ack */ 200 ack = (~cmd->cmd) & 0xff; 201 if (ack != smu->cmd_buf->cmd) { 202 DPRINTK("SMU: incorrect ack, want %x got %x\n", 203 ack, smu->cmd_buf->cmd); 204 rc = -EIO; 205 } 206 reply_len = rc == 0 ? smu->cmd_buf->length : 0; 207 DPRINTK("SMU: reply len: %d\n", reply_len); 208 if (reply_len > cmd->reply_len) { 209 printk(KERN_WARNING "SMU: reply buffer too small," 210 "got %d bytes for a %d bytes buffer\n", 211 reply_len, cmd->reply_len); 212 reply_len = cmd->reply_len; 213 } 214 cmd->reply_len = reply_len; 215 if (cmd->reply_buf && reply_len) 216 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); 217 } 218 219 /* Now complete the command. Write status last in order as we lost 220 * ownership of the command structure as soon as it's no longer -1 221 */ 222 done = cmd->done; 223 misc = cmd->misc; 224 mb(); 225 cmd->status = rc; 226 227 /* Re-enable NAP mode */ 228 if (smu->broken_nap) 229 powersave_nap = 1; 230 bail: 231 /* Start next command if any */ 232 smu_start_cmd(); 233 spin_unlock_irqrestore(&smu->lock, flags); 234 235 /* Call command completion handler if any */ 236 if (done) 237 done(cmd, misc); 238 239 /* It's an edge interrupt, nothing to do */ 240 return IRQ_HANDLED; 241 } 242 243 244 static irqreturn_t smu_msg_intr(int irq, void *arg) 245 { 246 /* I don't quite know what to do with this one, we seem to never 247 * receive it, so I suspect we have to arm it someway in the SMU 248 * to start getting events that way. 249 */ 250 251 printk(KERN_INFO "SMU: message interrupt !\n"); 252 253 /* It's an edge interrupt, nothing to do */ 254 return IRQ_HANDLED; 255 } 256 257 258 /* 259 * Queued command management. 260 * 261 */ 262 263 int smu_queue_cmd(struct smu_cmd *cmd) 264 { 265 unsigned long flags; 266 267 if (smu == NULL) 268 return -ENODEV; 269 if (cmd->data_len > SMU_MAX_DATA || 270 cmd->reply_len > SMU_MAX_DATA) 271 return -EINVAL; 272 273 cmd->status = 1; 274 spin_lock_irqsave(&smu->lock, flags); 275 list_add_tail(&cmd->link, &smu->cmd_list); 276 if (smu->cmd_cur == NULL) 277 smu_start_cmd(); 278 spin_unlock_irqrestore(&smu->lock, flags); 279 280 /* Workaround for early calls when irq isn't available */ 281 if (!smu_irq_inited || !smu->db_irq) 282 smu_spinwait_cmd(cmd); 283 284 return 0; 285 } 286 EXPORT_SYMBOL(smu_queue_cmd); 287 288 289 int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, 290 unsigned int data_len, 291 void (*done)(struct smu_cmd *cmd, void *misc), 292 void *misc, ...) 293 { 294 struct smu_cmd *cmd = &scmd->cmd; 295 va_list list; 296 int i; 297 298 if (data_len > sizeof(scmd->buffer)) 299 return -EINVAL; 300 301 memset(scmd, 0, sizeof(*scmd)); 302 cmd->cmd = command; 303 cmd->data_len = data_len; 304 cmd->data_buf = scmd->buffer; 305 cmd->reply_len = sizeof(scmd->buffer); 306 cmd->reply_buf = scmd->buffer; 307 cmd->done = done; 308 cmd->misc = misc; 309 310 va_start(list, misc); 311 for (i = 0; i < data_len; ++i) 312 scmd->buffer[i] = (u8)va_arg(list, int); 313 va_end(list); 314 315 return smu_queue_cmd(cmd); 316 } 317 EXPORT_SYMBOL(smu_queue_simple); 318 319 320 void smu_poll(void) 321 { 322 u8 gpio; 323 324 if (smu == NULL) 325 return; 326 327 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 328 if ((gpio & 7) == 7) 329 smu_db_intr(smu->db_irq, smu); 330 } 331 EXPORT_SYMBOL(smu_poll); 332 333 334 void smu_done_complete(struct smu_cmd *cmd, void *misc) 335 { 336 struct completion *comp = misc; 337 338 complete(comp); 339 } 340 EXPORT_SYMBOL(smu_done_complete); 341 342 343 void smu_spinwait_cmd(struct smu_cmd *cmd) 344 { 345 while(cmd->status == 1) 346 smu_poll(); 347 } 348 EXPORT_SYMBOL(smu_spinwait_cmd); 349 350 351 /* RTC low level commands */ 352 static inline int bcd2hex (int n) 353 { 354 return (((n & 0xf0) >> 4) * 10) + (n & 0xf); 355 } 356 357 358 static inline int hex2bcd (int n) 359 { 360 return ((n / 10) << 4) + (n % 10); 361 } 362 363 364 static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, 365 struct rtc_time *time) 366 { 367 cmd_buf->cmd = 0x8e; 368 cmd_buf->length = 8; 369 cmd_buf->data[0] = 0x80; 370 cmd_buf->data[1] = hex2bcd(time->tm_sec); 371 cmd_buf->data[2] = hex2bcd(time->tm_min); 372 cmd_buf->data[3] = hex2bcd(time->tm_hour); 373 cmd_buf->data[4] = time->tm_wday; 374 cmd_buf->data[5] = hex2bcd(time->tm_mday); 375 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; 376 cmd_buf->data[7] = hex2bcd(time->tm_year - 100); 377 } 378 379 380 int smu_get_rtc_time(struct rtc_time *time, int spinwait) 381 { 382 struct smu_simple_cmd cmd; 383 int rc; 384 385 if (smu == NULL) 386 return -ENODEV; 387 388 memset(time, 0, sizeof(struct rtc_time)); 389 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, 390 SMU_CMD_RTC_GET_DATETIME); 391 if (rc) 392 return rc; 393 smu_spinwait_simple(&cmd); 394 395 time->tm_sec = bcd2hex(cmd.buffer[0]); 396 time->tm_min = bcd2hex(cmd.buffer[1]); 397 time->tm_hour = bcd2hex(cmd.buffer[2]); 398 time->tm_wday = bcd2hex(cmd.buffer[3]); 399 time->tm_mday = bcd2hex(cmd.buffer[4]); 400 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; 401 time->tm_year = bcd2hex(cmd.buffer[6]) + 100; 402 403 return 0; 404 } 405 406 407 int smu_set_rtc_time(struct rtc_time *time, int spinwait) 408 { 409 struct smu_simple_cmd cmd; 410 int rc; 411 412 if (smu == NULL) 413 return -ENODEV; 414 415 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, 416 SMU_CMD_RTC_SET_DATETIME, 417 hex2bcd(time->tm_sec), 418 hex2bcd(time->tm_min), 419 hex2bcd(time->tm_hour), 420 time->tm_wday, 421 hex2bcd(time->tm_mday), 422 hex2bcd(time->tm_mon) + 1, 423 hex2bcd(time->tm_year - 100)); 424 if (rc) 425 return rc; 426 smu_spinwait_simple(&cmd); 427 428 return 0; 429 } 430 431 432 void smu_shutdown(void) 433 { 434 struct smu_simple_cmd cmd; 435 436 if (smu == NULL) 437 return; 438 439 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, 440 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) 441 return; 442 smu_spinwait_simple(&cmd); 443 for (;;) 444 ; 445 } 446 447 448 void smu_restart(void) 449 { 450 struct smu_simple_cmd cmd; 451 452 if (smu == NULL) 453 return; 454 455 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, 456 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) 457 return; 458 smu_spinwait_simple(&cmd); 459 for (;;) 460 ; 461 } 462 463 464 int smu_present(void) 465 { 466 return smu != NULL; 467 } 468 EXPORT_SYMBOL(smu_present); 469 470 471 int __init smu_init (void) 472 { 473 struct device_node *np; 474 const u32 *data; 475 int ret = 0; 476 477 np = of_find_node_by_type(NULL, "smu"); 478 if (np == NULL) 479 return -ENODEV; 480 481 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR); 482 483 /* 484 * SMU based G5s need some memory below 2Gb. Thankfully this is 485 * called at a time where memblock is still available. 486 */ 487 smu_cmdbuf_abs = memblock_phys_alloc_range(4096, 4096, 0, 0x80000000UL); 488 if (smu_cmdbuf_abs == 0) { 489 printk(KERN_ERR "SMU: Command buffer allocation failed !\n"); 490 ret = -EINVAL; 491 goto fail_np; 492 } 493 494 smu = memblock_alloc(sizeof(struct smu_device), SMP_CACHE_BYTES); 495 if (!smu) 496 panic("%s: Failed to allocate %zu bytes\n", __func__, 497 sizeof(struct smu_device)); 498 499 spin_lock_init(&smu->lock); 500 INIT_LIST_HEAD(&smu->cmd_list); 501 INIT_LIST_HEAD(&smu->cmd_i2c_list); 502 smu->of_node = np; 503 smu->db_irq = 0; 504 smu->msg_irq = 0; 505 506 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a 507 * 32 bits value safely 508 */ 509 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; 510 smu->cmd_buf = __va(smu_cmdbuf_abs); 511 512 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell"); 513 if (smu->db_node == NULL) { 514 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); 515 ret = -ENXIO; 516 goto fail_bootmem; 517 } 518 data = of_get_property(smu->db_node, "reg", NULL); 519 if (data == NULL) { 520 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); 521 ret = -ENXIO; 522 goto fail_db_node; 523 } 524 525 /* Current setup has one doorbell GPIO that does both doorbell 526 * and ack. GPIOs are at 0x50, best would be to find that out 527 * in the device-tree though. 528 */ 529 smu->doorbell = *data; 530 if (smu->doorbell < 0x50) 531 smu->doorbell += 0x50; 532 533 /* Now look for the smu-interrupt GPIO */ 534 do { 535 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt"); 536 if (smu->msg_node == NULL) 537 break; 538 data = of_get_property(smu->msg_node, "reg", NULL); 539 if (data == NULL) { 540 of_node_put(smu->msg_node); 541 smu->msg_node = NULL; 542 break; 543 } 544 smu->msg = *data; 545 if (smu->msg < 0x50) 546 smu->msg += 0x50; 547 } while(0); 548 549 /* Doorbell buffer is currently hard-coded, I didn't find a proper 550 * device-tree entry giving the address. Best would probably to use 551 * an offset for K2 base though, but let's do it that way for now. 552 */ 553 smu->db_buf = ioremap(0x8000860c, 0x1000); 554 if (smu->db_buf == NULL) { 555 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); 556 ret = -ENXIO; 557 goto fail_msg_node; 558 } 559 560 /* U3 has an issue with NAP mode when issuing SMU commands */ 561 smu->broken_nap = pmac_get_uninorth_variant() < 4; 562 if (smu->broken_nap) 563 printk(KERN_INFO "SMU: using NAP mode workaround\n"); 564 565 sys_ctrler = SYS_CTRLER_SMU; 566 return 0; 567 568 fail_msg_node: 569 of_node_put(smu->msg_node); 570 fail_db_node: 571 of_node_put(smu->db_node); 572 fail_bootmem: 573 memblock_free(smu, sizeof(struct smu_device)); 574 smu = NULL; 575 fail_np: 576 of_node_put(np); 577 return ret; 578 } 579 580 581 static int smu_late_init(void) 582 { 583 if (!smu) 584 return 0; 585 586 timer_setup(&smu->i2c_timer, smu_i2c_retry, 0); 587 588 if (smu->db_node) { 589 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0); 590 if (!smu->db_irq) 591 printk(KERN_ERR "smu: failed to map irq for node %pOF\n", 592 smu->db_node); 593 } 594 if (smu->msg_node) { 595 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0); 596 if (!smu->msg_irq) 597 printk(KERN_ERR "smu: failed to map irq for node %pOF\n", 598 smu->msg_node); 599 } 600 601 /* 602 * Try to request the interrupts 603 */ 604 605 if (smu->db_irq) { 606 if (request_irq(smu->db_irq, smu_db_intr, 607 IRQF_SHARED, "SMU doorbell", smu) < 0) { 608 printk(KERN_WARNING "SMU: can't " 609 "request interrupt %d\n", 610 smu->db_irq); 611 smu->db_irq = 0; 612 } 613 } 614 615 if (smu->msg_irq) { 616 if (request_irq(smu->msg_irq, smu_msg_intr, 617 IRQF_SHARED, "SMU message", smu) < 0) { 618 printk(KERN_WARNING "SMU: can't " 619 "request interrupt %d\n", 620 smu->msg_irq); 621 smu->msg_irq = 0; 622 } 623 } 624 625 smu_irq_inited = 1; 626 return 0; 627 } 628 /* This has to be before arch_initcall as the low i2c stuff relies on the 629 * above having been done before we reach arch_initcalls 630 */ 631 core_initcall(smu_late_init); 632 633 /* 634 * sysfs visibility 635 */ 636 637 static void smu_expose_childs(struct work_struct *unused) 638 { 639 struct device_node *np; 640 641 for_each_child_of_node(smu->of_node, np) 642 if (of_device_is_compatible(np, "smu-sensors")) 643 of_platform_device_create(np, "smu-sensors", 644 &smu->of_dev->dev); 645 } 646 647 static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs); 648 649 static int smu_platform_probe(struct platform_device* dev) 650 { 651 if (!smu) 652 return -ENODEV; 653 smu->of_dev = dev; 654 655 /* 656 * Ok, we are matched, now expose all i2c busses. We have to defer 657 * that unfortunately or it would deadlock inside the device model 658 */ 659 schedule_work(&smu_expose_childs_work); 660 661 return 0; 662 } 663 664 static const struct of_device_id smu_platform_match[] = 665 { 666 { 667 .type = "smu", 668 }, 669 {}, 670 }; 671 672 static struct platform_driver smu_of_platform_driver = 673 { 674 .driver = { 675 .name = "smu", 676 .of_match_table = smu_platform_match, 677 }, 678 .probe = smu_platform_probe, 679 }; 680 681 static int __init smu_init_sysfs(void) 682 { 683 /* 684 * For now, we don't power manage machines with an SMU chip, 685 * I'm a bit too far from figuring out how that works with those 686 * new chipsets, but that will come back and bite us 687 */ 688 platform_driver_register(&smu_of_platform_driver); 689 return 0; 690 } 691 692 device_initcall(smu_init_sysfs); 693 694 struct platform_device *smu_get_ofdev(void) 695 { 696 if (!smu) 697 return NULL; 698 return smu->of_dev; 699 } 700 701 EXPORT_SYMBOL_GPL(smu_get_ofdev); 702 703 /* 704 * i2c interface 705 */ 706 707 static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) 708 { 709 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; 710 void *misc = cmd->misc; 711 unsigned long flags; 712 713 /* Check for read case */ 714 if (!fail && cmd->read) { 715 if (cmd->pdata[0] < 1) 716 fail = 1; 717 else 718 memcpy(cmd->info.data, &cmd->pdata[1], 719 cmd->info.datalen); 720 } 721 722 DPRINTK("SMU: completing, success: %d\n", !fail); 723 724 /* Update status and mark no pending i2c command with lock 725 * held so nobody comes in while we dequeue an eventual 726 * pending next i2c command 727 */ 728 spin_lock_irqsave(&smu->lock, flags); 729 smu->cmd_i2c_cur = NULL; 730 wmb(); 731 cmd->status = fail ? -EIO : 0; 732 733 /* Is there another i2c command waiting ? */ 734 if (!list_empty(&smu->cmd_i2c_list)) { 735 struct smu_i2c_cmd *newcmd; 736 737 /* Fetch it, new current, remove from list */ 738 newcmd = list_entry(smu->cmd_i2c_list.next, 739 struct smu_i2c_cmd, link); 740 smu->cmd_i2c_cur = newcmd; 741 list_del(&cmd->link); 742 743 /* Queue with low level smu */ 744 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 745 if (smu->cmd_cur == NULL) 746 smu_start_cmd(); 747 } 748 spin_unlock_irqrestore(&smu->lock, flags); 749 750 /* Call command completion handler if any */ 751 if (done) 752 done(cmd, misc); 753 754 } 755 756 757 static void smu_i2c_retry(struct timer_list *unused) 758 { 759 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur; 760 761 DPRINTK("SMU: i2c failure, requeuing...\n"); 762 763 /* requeue command simply by resetting reply_len */ 764 cmd->pdata[0] = 0xff; 765 cmd->scmd.reply_len = sizeof(cmd->pdata); 766 smu_queue_cmd(&cmd->scmd); 767 } 768 769 770 static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) 771 { 772 struct smu_i2c_cmd *cmd = misc; 773 int fail = 0; 774 775 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", 776 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); 777 778 /* Check for possible status */ 779 if (scmd->status < 0) 780 fail = 1; 781 else if (cmd->read) { 782 if (cmd->stage == 0) 783 fail = cmd->pdata[0] != 0; 784 else 785 fail = cmd->pdata[0] >= 0x80; 786 } else { 787 fail = cmd->pdata[0] != 0; 788 } 789 790 /* Handle failures by requeuing command, after 5ms interval 791 */ 792 if (fail && --cmd->retries > 0) { 793 DPRINTK("SMU: i2c failure, starting timer...\n"); 794 BUG_ON(cmd != smu->cmd_i2c_cur); 795 if (!smu_irq_inited) { 796 mdelay(5); 797 smu_i2c_retry(NULL); 798 return; 799 } 800 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5)); 801 return; 802 } 803 804 /* If failure or stage 1, command is complete */ 805 if (fail || cmd->stage != 0) { 806 smu_i2c_complete_command(cmd, fail); 807 return; 808 } 809 810 DPRINTK("SMU: going to stage 1\n"); 811 812 /* Ok, initial command complete, now poll status */ 813 scmd->reply_buf = cmd->pdata; 814 scmd->reply_len = sizeof(cmd->pdata); 815 scmd->data_buf = cmd->pdata; 816 scmd->data_len = 1; 817 cmd->pdata[0] = 0; 818 cmd->stage = 1; 819 cmd->retries = 20; 820 smu_queue_cmd(scmd); 821 } 822 823 824 int smu_queue_i2c(struct smu_i2c_cmd *cmd) 825 { 826 unsigned long flags; 827 828 if (smu == NULL) 829 return -ENODEV; 830 831 /* Fill most fields of scmd */ 832 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; 833 cmd->scmd.done = smu_i2c_low_completion; 834 cmd->scmd.misc = cmd; 835 cmd->scmd.reply_buf = cmd->pdata; 836 cmd->scmd.reply_len = sizeof(cmd->pdata); 837 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; 838 cmd->scmd.status = 1; 839 cmd->stage = 0; 840 cmd->pdata[0] = 0xff; 841 cmd->retries = 20; 842 cmd->status = 1; 843 844 /* Check transfer type, sanitize some "info" fields 845 * based on transfer type and do more checking 846 */ 847 cmd->info.caddr = cmd->info.devaddr; 848 cmd->read = cmd->info.devaddr & 0x01; 849 switch(cmd->info.type) { 850 case SMU_I2C_TRANSFER_SIMPLE: 851 cmd->info.sublen = 0; 852 memset(cmd->info.subaddr, 0, sizeof(cmd->info.subaddr)); 853 break; 854 case SMU_I2C_TRANSFER_COMBINED: 855 cmd->info.devaddr &= 0xfe; 856 fallthrough; 857 case SMU_I2C_TRANSFER_STDSUB: 858 if (cmd->info.sublen > 3) 859 return -EINVAL; 860 break; 861 default: 862 return -EINVAL; 863 } 864 865 /* Finish setting up command based on transfer direction 866 */ 867 if (cmd->read) { 868 if (cmd->info.datalen > SMU_I2C_READ_MAX) 869 return -EINVAL; 870 memset(cmd->info.data, 0xff, cmd->info.datalen); 871 cmd->scmd.data_len = 9; 872 } else { 873 if (cmd->info.datalen > SMU_I2C_WRITE_MAX) 874 return -EINVAL; 875 cmd->scmd.data_len = 9 + cmd->info.datalen; 876 } 877 878 DPRINTK("SMU: i2c enqueuing command\n"); 879 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", 880 cmd->read ? "read" : "write", cmd->info.datalen, 881 cmd->info.bus, cmd->info.caddr, 882 cmd->info.subaddr[0], cmd->info.type); 883 884 885 /* Enqueue command in i2c list, and if empty, enqueue also in 886 * main command list 887 */ 888 spin_lock_irqsave(&smu->lock, flags); 889 if (smu->cmd_i2c_cur == NULL) { 890 smu->cmd_i2c_cur = cmd; 891 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 892 if (smu->cmd_cur == NULL) 893 smu_start_cmd(); 894 } else 895 list_add_tail(&cmd->link, &smu->cmd_i2c_list); 896 spin_unlock_irqrestore(&smu->lock, flags); 897 898 return 0; 899 } 900 901 /* 902 * Handling of "partitions" 903 */ 904 905 static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) 906 { 907 DECLARE_COMPLETION_ONSTACK(comp); 908 unsigned int chunk; 909 struct smu_cmd cmd; 910 int rc; 911 u8 params[8]; 912 913 /* We currently use a chunk size of 0xe. We could check the 914 * SMU firmware version and use bigger sizes though 915 */ 916 chunk = 0xe; 917 918 while (len) { 919 unsigned int clen = min(len, chunk); 920 921 cmd.cmd = SMU_CMD_MISC_ee_COMMAND; 922 cmd.data_len = 7; 923 cmd.data_buf = params; 924 cmd.reply_len = chunk; 925 cmd.reply_buf = dest; 926 cmd.done = smu_done_complete; 927 cmd.misc = ∁ 928 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; 929 params[1] = 0x4; 930 *((u32 *)¶ms[2]) = addr; 931 params[6] = clen; 932 933 rc = smu_queue_cmd(&cmd); 934 if (rc) 935 return rc; 936 wait_for_completion(&comp); 937 if (cmd.status != 0) 938 return rc; 939 if (cmd.reply_len != clen) { 940 printk(KERN_DEBUG "SMU: short read in " 941 "smu_read_datablock, got: %d, want: %d\n", 942 cmd.reply_len, clen); 943 return -EIO; 944 } 945 len -= clen; 946 addr += clen; 947 dest += clen; 948 } 949 return 0; 950 } 951 952 static struct smu_sdbp_header *smu_create_sdb_partition(int id) 953 { 954 DECLARE_COMPLETION_ONSTACK(comp); 955 struct smu_simple_cmd cmd; 956 unsigned int addr, len, tlen; 957 struct smu_sdbp_header *hdr; 958 struct property *prop; 959 960 /* First query the partition info */ 961 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); 962 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, 963 smu_done_complete, &comp, 964 SMU_CMD_PARTITION_LATEST, id); 965 wait_for_completion(&comp); 966 DPRINTK("SMU: done, status: %d, reply_len: %d\n", 967 cmd.cmd.status, cmd.cmd.reply_len); 968 969 /* Partition doesn't exist (or other error) */ 970 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) 971 return NULL; 972 973 /* Fetch address and length from reply */ 974 addr = *((u16 *)cmd.buffer); 975 len = cmd.buffer[3] << 2; 976 /* Calucluate total length to allocate, including the 17 bytes 977 * for "sdb-partition-XX" that we append at the end of the buffer 978 */ 979 tlen = sizeof(struct property) + len + 18; 980 981 prop = kzalloc(tlen, GFP_KERNEL); 982 if (prop == NULL) 983 return NULL; 984 hdr = (struct smu_sdbp_header *)(prop + 1); 985 prop->name = ((char *)prop) + tlen - 18; 986 sprintf(prop->name, "sdb-partition-%02x", id); 987 prop->length = len; 988 prop->value = hdr; 989 prop->next = NULL; 990 991 /* Read the datablock */ 992 if (smu_read_datablock((u8 *)hdr, addr, len)) { 993 printk(KERN_DEBUG "SMU: datablock read failed while reading " 994 "partition %02x !\n", id); 995 goto failure; 996 } 997 998 /* Got it, check a few things and create the property */ 999 if (hdr->id != id) { 1000 printk(KERN_DEBUG "SMU: Reading partition %02x and got " 1001 "%02x !\n", id, hdr->id); 1002 goto failure; 1003 } 1004 if (of_add_property(smu->of_node, prop)) { 1005 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " 1006 "property !\n", id); 1007 goto failure; 1008 } 1009 1010 return hdr; 1011 failure: 1012 kfree(prop); 1013 return NULL; 1014 } 1015 1016 /* Note: Only allowed to return error code in pointers (using ERR_PTR) 1017 * when interruptible is 1 1018 */ 1019 static const struct smu_sdbp_header *__smu_get_sdb_partition(int id, 1020 unsigned int *size, int interruptible) 1021 { 1022 char pname[32]; 1023 const struct smu_sdbp_header *part; 1024 1025 if (!smu) 1026 return NULL; 1027 1028 sprintf(pname, "sdb-partition-%02x", id); 1029 1030 DPRINTK("smu_get_sdb_partition(%02x)\n", id); 1031 1032 if (interruptible) { 1033 int rc; 1034 rc = mutex_lock_interruptible(&smu_part_access); 1035 if (rc) 1036 return ERR_PTR(rc); 1037 } else 1038 mutex_lock(&smu_part_access); 1039 1040 part = of_get_property(smu->of_node, pname, size); 1041 if (part == NULL) { 1042 DPRINTK("trying to extract from SMU ...\n"); 1043 part = smu_create_sdb_partition(id); 1044 if (part != NULL && size) 1045 *size = part->len << 2; 1046 } 1047 mutex_unlock(&smu_part_access); 1048 return part; 1049 } 1050 1051 const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) 1052 { 1053 return __smu_get_sdb_partition(id, size, 0); 1054 } 1055 EXPORT_SYMBOL(smu_get_sdb_partition); 1056 1057 1058 /* 1059 * Userland driver interface 1060 */ 1061 1062 1063 static LIST_HEAD(smu_clist); 1064 static DEFINE_SPINLOCK(smu_clist_lock); 1065 1066 enum smu_file_mode { 1067 smu_file_commands, 1068 smu_file_events, 1069 smu_file_closing 1070 }; 1071 1072 struct smu_private 1073 { 1074 struct list_head list; 1075 enum smu_file_mode mode; 1076 int busy; 1077 struct smu_cmd cmd; 1078 spinlock_t lock; 1079 wait_queue_head_t wait; 1080 u8 buffer[SMU_MAX_DATA]; 1081 }; 1082 1083 1084 static int smu_open(struct inode *inode, struct file *file) 1085 { 1086 struct smu_private *pp; 1087 unsigned long flags; 1088 1089 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); 1090 if (pp == 0) 1091 return -ENOMEM; 1092 spin_lock_init(&pp->lock); 1093 pp->mode = smu_file_commands; 1094 init_waitqueue_head(&pp->wait); 1095 1096 mutex_lock(&smu_mutex); 1097 spin_lock_irqsave(&smu_clist_lock, flags); 1098 list_add(&pp->list, &smu_clist); 1099 spin_unlock_irqrestore(&smu_clist_lock, flags); 1100 file->private_data = pp; 1101 mutex_unlock(&smu_mutex); 1102 1103 return 0; 1104 } 1105 1106 1107 static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) 1108 { 1109 struct smu_private *pp = misc; 1110 1111 wake_up_all(&pp->wait); 1112 } 1113 1114 1115 static ssize_t smu_write(struct file *file, const char __user *buf, 1116 size_t count, loff_t *ppos) 1117 { 1118 struct smu_private *pp = file->private_data; 1119 unsigned long flags; 1120 struct smu_user_cmd_hdr hdr; 1121 int rc = 0; 1122 1123 if (pp->busy) 1124 return -EBUSY; 1125 else if (copy_from_user(&hdr, buf, sizeof(hdr))) 1126 return -EFAULT; 1127 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { 1128 pp->mode = smu_file_events; 1129 return 0; 1130 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { 1131 const struct smu_sdbp_header *part; 1132 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); 1133 if (part == NULL) 1134 return -EINVAL; 1135 else if (IS_ERR(part)) 1136 return PTR_ERR(part); 1137 return 0; 1138 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) 1139 return -EINVAL; 1140 else if (pp->mode != smu_file_commands) 1141 return -EBADFD; 1142 else if (hdr.data_len > SMU_MAX_DATA) 1143 return -EINVAL; 1144 1145 spin_lock_irqsave(&pp->lock, flags); 1146 if (pp->busy) { 1147 spin_unlock_irqrestore(&pp->lock, flags); 1148 return -EBUSY; 1149 } 1150 pp->busy = 1; 1151 pp->cmd.status = 1; 1152 spin_unlock_irqrestore(&pp->lock, flags); 1153 1154 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { 1155 pp->busy = 0; 1156 return -EFAULT; 1157 } 1158 1159 pp->cmd.cmd = hdr.cmd; 1160 pp->cmd.data_len = hdr.data_len; 1161 pp->cmd.reply_len = SMU_MAX_DATA; 1162 pp->cmd.data_buf = pp->buffer; 1163 pp->cmd.reply_buf = pp->buffer; 1164 pp->cmd.done = smu_user_cmd_done; 1165 pp->cmd.misc = pp; 1166 rc = smu_queue_cmd(&pp->cmd); 1167 if (rc < 0) 1168 return rc; 1169 return count; 1170 } 1171 1172 1173 static ssize_t smu_read_command(struct file *file, struct smu_private *pp, 1174 char __user *buf, size_t count) 1175 { 1176 DECLARE_WAITQUEUE(wait, current); 1177 struct smu_user_reply_hdr hdr; 1178 unsigned long flags; 1179 int size, rc = 0; 1180 1181 if (!pp->busy) 1182 return 0; 1183 if (count < sizeof(struct smu_user_reply_hdr)) 1184 return -EOVERFLOW; 1185 spin_lock_irqsave(&pp->lock, flags); 1186 if (pp->cmd.status == 1) { 1187 if (file->f_flags & O_NONBLOCK) { 1188 spin_unlock_irqrestore(&pp->lock, flags); 1189 return -EAGAIN; 1190 } 1191 add_wait_queue(&pp->wait, &wait); 1192 for (;;) { 1193 set_current_state(TASK_INTERRUPTIBLE); 1194 rc = 0; 1195 if (pp->cmd.status != 1) 1196 break; 1197 rc = -ERESTARTSYS; 1198 if (signal_pending(current)) 1199 break; 1200 spin_unlock_irqrestore(&pp->lock, flags); 1201 schedule(); 1202 spin_lock_irqsave(&pp->lock, flags); 1203 } 1204 set_current_state(TASK_RUNNING); 1205 remove_wait_queue(&pp->wait, &wait); 1206 } 1207 spin_unlock_irqrestore(&pp->lock, flags); 1208 if (rc) 1209 return rc; 1210 if (pp->cmd.status != 0) 1211 pp->cmd.reply_len = 0; 1212 size = sizeof(hdr) + pp->cmd.reply_len; 1213 if (count < size) 1214 size = count; 1215 rc = size; 1216 hdr.status = pp->cmd.status; 1217 hdr.reply_len = pp->cmd.reply_len; 1218 if (copy_to_user(buf, &hdr, sizeof(hdr))) 1219 return -EFAULT; 1220 size -= sizeof(hdr); 1221 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) 1222 return -EFAULT; 1223 pp->busy = 0; 1224 1225 return rc; 1226 } 1227 1228 1229 static ssize_t smu_read_events(struct file *file, struct smu_private *pp, 1230 char __user *buf, size_t count) 1231 { 1232 /* Not implemented */ 1233 msleep_interruptible(1000); 1234 return 0; 1235 } 1236 1237 1238 static ssize_t smu_read(struct file *file, char __user *buf, 1239 size_t count, loff_t *ppos) 1240 { 1241 struct smu_private *pp = file->private_data; 1242 1243 if (pp->mode == smu_file_commands) 1244 return smu_read_command(file, pp, buf, count); 1245 if (pp->mode == smu_file_events) 1246 return smu_read_events(file, pp, buf, count); 1247 1248 return -EBADFD; 1249 } 1250 1251 static __poll_t smu_fpoll(struct file *file, poll_table *wait) 1252 { 1253 struct smu_private *pp = file->private_data; 1254 __poll_t mask = 0; 1255 unsigned long flags; 1256 1257 if (pp == 0) 1258 return 0; 1259 1260 if (pp->mode == smu_file_commands) { 1261 poll_wait(file, &pp->wait, wait); 1262 1263 spin_lock_irqsave(&pp->lock, flags); 1264 if (pp->busy && pp->cmd.status != 1) 1265 mask |= EPOLLIN; 1266 spin_unlock_irqrestore(&pp->lock, flags); 1267 } 1268 if (pp->mode == smu_file_events) { 1269 /* Not yet implemented */ 1270 } 1271 return mask; 1272 } 1273 1274 static int smu_release(struct inode *inode, struct file *file) 1275 { 1276 struct smu_private *pp = file->private_data; 1277 unsigned long flags; 1278 unsigned int busy; 1279 1280 if (pp == 0) 1281 return 0; 1282 1283 file->private_data = NULL; 1284 1285 /* Mark file as closing to avoid races with new request */ 1286 spin_lock_irqsave(&pp->lock, flags); 1287 pp->mode = smu_file_closing; 1288 busy = pp->busy; 1289 1290 /* Wait for any pending request to complete */ 1291 if (busy && pp->cmd.status == 1) { 1292 DECLARE_WAITQUEUE(wait, current); 1293 1294 add_wait_queue(&pp->wait, &wait); 1295 for (;;) { 1296 set_current_state(TASK_UNINTERRUPTIBLE); 1297 if (pp->cmd.status != 1) 1298 break; 1299 spin_unlock_irqrestore(&pp->lock, flags); 1300 schedule(); 1301 spin_lock_irqsave(&pp->lock, flags); 1302 } 1303 set_current_state(TASK_RUNNING); 1304 remove_wait_queue(&pp->wait, &wait); 1305 } 1306 spin_unlock_irqrestore(&pp->lock, flags); 1307 1308 spin_lock_irqsave(&smu_clist_lock, flags); 1309 list_del(&pp->list); 1310 spin_unlock_irqrestore(&smu_clist_lock, flags); 1311 kfree(pp); 1312 1313 return 0; 1314 } 1315 1316 1317 static const struct file_operations smu_device_fops = { 1318 .llseek = no_llseek, 1319 .read = smu_read, 1320 .write = smu_write, 1321 .poll = smu_fpoll, 1322 .open = smu_open, 1323 .release = smu_release, 1324 }; 1325 1326 static struct miscdevice pmu_device = { 1327 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops 1328 }; 1329 1330 static int smu_device_init(void) 1331 { 1332 if (!smu) 1333 return -ENODEV; 1334 if (misc_register(&pmu_device) < 0) 1335 printk(KERN_ERR "via-pmu: cannot register misc device.\n"); 1336 return 0; 1337 } 1338 device_initcall(smu_device_init); 1339