xref: /linux/drivers/i2c/algos/i2c-algo-pcf.h (revision 3bdab16c55f57a24245c97d707241dd9b48d1a91)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* -------------------------------------------------------------------- */
3 /* i2c-pcf8584.h: PCF 8584 global defines				*/
4 /* -------------------------------------------------------------------- */
5 /*   Copyright (C) 1996 Simon G. Vogl
6                    1999 Hans Berglund
7 
8  */
9 /* --------------------------------------------------------------------	*/
10 
11 /* With some changes from Frodo Looijaard <frodol@dds.nl> */
12 
13 #ifndef I2C_PCF8584_H
14 #define I2C_PCF8584_H 1
15 
16 /* ----- Control register bits ----------------------------------------	*/
17 #define I2C_PCF_PIN	0x80
18 #define I2C_PCF_ESO	0x40
19 #define I2C_PCF_ES1	0x20
20 #define I2C_PCF_ES2	0x10
21 #define I2C_PCF_ENI	0x08
22 #define I2C_PCF_STA	0x04
23 #define I2C_PCF_STO	0x02
24 #define I2C_PCF_ACK	0x01
25 
26 #define I2C_PCF_START    (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_STA | I2C_PCF_ACK)
27 #define I2C_PCF_STOP     (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_STO | I2C_PCF_ACK)
28 #define I2C_PCF_REPSTART (              I2C_PCF_ESO | I2C_PCF_STA | I2C_PCF_ACK)
29 #define I2C_PCF_IDLE     (I2C_PCF_PIN | I2C_PCF_ESO               | I2C_PCF_ACK)
30 
31 /* ----- Status register bits -----------------------------------------	*/
32 /*#define I2C_PCF_PIN  0x80    as above*/
33 
34 #define I2C_PCF_INI 0x40   /* 1 if not initialized */
35 #define I2C_PCF_STS 0x20
36 #define I2C_PCF_BER 0x10
37 #define I2C_PCF_AD0 0x08
38 #define I2C_PCF_LRB 0x08
39 #define I2C_PCF_AAS 0x04
40 #define I2C_PCF_LAB 0x02
41 #define I2C_PCF_BB  0x01
42 
43 /* ----- Chip clock frequencies ---------------------------------------	*/
44 #define I2C_PCF_CLK3	0x00
45 #define I2C_PCF_CLK443	0x10
46 #define I2C_PCF_CLK6	0x14
47 #define I2C_PCF_CLK	0x18
48 #define I2C_PCF_CLK12	0x1c
49 
50 /* ----- transmission frequencies -------------------------------------	*/
51 #define I2C_PCF_TRNS90 0x00	/*  90 kHz */
52 #define I2C_PCF_TRNS45 0x01	/*  45 kHz */
53 #define I2C_PCF_TRNS11 0x02	/*  11 kHz */
54 #define I2C_PCF_TRNS15 0x03	/* 1.5 kHz */
55 
56 
57 /* ----- Access to internal registers according to ES1,ES2 ------------	*/
58 /* they are mapped to the data port ( a0 = 0 ) 				*/
59 /* available when ESO == 0 :						*/
60 
61 #define I2C_PCF_OWNADR	0
62 #define I2C_PCF_INTREG	I2C_PCF_ES2
63 #define I2C_PCF_CLKREG	I2C_PCF_ES1
64 
65 #endif /* I2C_PCF8584_H */
66