1 /* 2 * Copyright (C) 2015 Free Electrons 3 * Copyright (C) 2015 NextThing Co 4 * 5 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/component.h> 15 #include <linux/of_address.h> 16 #include <linux/regmap.h> 17 #include <linux/reset.h> 18 19 #include <drm/drmP.h> 20 #include <drm/drm_atomic_helper.h> 21 #include <drm/drm_crtc_helper.h> 22 #include <drm/drm_of.h> 23 #include <drm/drm_panel.h> 24 25 #include "sun4i_backend.h" 26 #include "sun4i_crtc.h" 27 #include "sun4i_drv.h" 28 #include "sun4i_tcon.h" 29 30 #define SUN4I_TVE_EN_REG 0x000 31 #define SUN4I_TVE_EN_DAC_MAP_MASK GENMASK(19, 4) 32 #define SUN4I_TVE_EN_DAC_MAP(dac, out) (((out) & 0xf) << (dac + 1) * 4) 33 #define SUN4I_TVE_EN_ENABLE BIT(0) 34 35 #define SUN4I_TVE_CFG0_REG 0x004 36 #define SUN4I_TVE_CFG0_DAC_CONTROL_54M BIT(26) 37 #define SUN4I_TVE_CFG0_CORE_DATAPATH_54M BIT(25) 38 #define SUN4I_TVE_CFG0_CORE_CONTROL_54M BIT(24) 39 #define SUN4I_TVE_CFG0_YC_EN BIT(17) 40 #define SUN4I_TVE_CFG0_COMP_EN BIT(16) 41 #define SUN4I_TVE_CFG0_RES(x) ((x) & 0xf) 42 #define SUN4I_TVE_CFG0_RES_480i SUN4I_TVE_CFG0_RES(0) 43 #define SUN4I_TVE_CFG0_RES_576i SUN4I_TVE_CFG0_RES(1) 44 45 #define SUN4I_TVE_DAC0_REG 0x008 46 #define SUN4I_TVE_DAC0_CLOCK_INVERT BIT(24) 47 #define SUN4I_TVE_DAC0_LUMA(x) (((x) & 3) << 20) 48 #define SUN4I_TVE_DAC0_LUMA_0_4 SUN4I_TVE_DAC0_LUMA(3) 49 #define SUN4I_TVE_DAC0_CHROMA(x) (((x) & 3) << 18) 50 #define SUN4I_TVE_DAC0_CHROMA_0_75 SUN4I_TVE_DAC0_CHROMA(3) 51 #define SUN4I_TVE_DAC0_INTERNAL_DAC(x) (((x) & 3) << 16) 52 #define SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS SUN4I_TVE_DAC0_INTERNAL_DAC(3) 53 #define SUN4I_TVE_DAC0_DAC_EN(dac) BIT(dac) 54 55 #define SUN4I_TVE_NOTCH_REG 0x00c 56 #define SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(dac, x) ((4 - (x)) << (dac * 3)) 57 58 #define SUN4I_TVE_CHROMA_FREQ_REG 0x010 59 60 #define SUN4I_TVE_PORCH_REG 0x014 61 #define SUN4I_TVE_PORCH_BACK(x) ((x) << 16) 62 #define SUN4I_TVE_PORCH_FRONT(x) (x) 63 64 #define SUN4I_TVE_LINE_REG 0x01c 65 #define SUN4I_TVE_LINE_FIRST(x) ((x) << 16) 66 #define SUN4I_TVE_LINE_NUMBER(x) (x) 67 68 #define SUN4I_TVE_LEVEL_REG 0x020 69 #define SUN4I_TVE_LEVEL_BLANK(x) ((x) << 16) 70 #define SUN4I_TVE_LEVEL_BLACK(x) (x) 71 72 #define SUN4I_TVE_DAC1_REG 0x024 73 #define SUN4I_TVE_DAC1_AMPLITUDE(dac, x) ((x) << (dac * 8)) 74 75 #define SUN4I_TVE_DETECT_STA_REG 0x038 76 #define SUN4I_TVE_DETECT_STA_DAC(dac) BIT((dac * 8)) 77 #define SUN4I_TVE_DETECT_STA_UNCONNECTED 0 78 #define SUN4I_TVE_DETECT_STA_CONNECTED 1 79 #define SUN4I_TVE_DETECT_STA_GROUND 2 80 81 #define SUN4I_TVE_CB_CR_LVL_REG 0x10c 82 #define SUN4I_TVE_CB_CR_LVL_CR_BURST(x) ((x) << 8) 83 #define SUN4I_TVE_CB_CR_LVL_CB_BURST(x) (x) 84 85 #define SUN4I_TVE_TINT_BURST_PHASE_REG 0x110 86 #define SUN4I_TVE_TINT_BURST_PHASE_CHROMA(x) (x) 87 88 #define SUN4I_TVE_BURST_WIDTH_REG 0x114 89 #define SUN4I_TVE_BURST_WIDTH_BREEZEWAY(x) ((x) << 16) 90 #define SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(x) ((x) << 8) 91 #define SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(x) (x) 92 93 #define SUN4I_TVE_CB_CR_GAIN_REG 0x118 94 #define SUN4I_TVE_CB_CR_GAIN_CR(x) ((x) << 8) 95 #define SUN4I_TVE_CB_CR_GAIN_CB(x) (x) 96 97 #define SUN4I_TVE_SYNC_VBI_REG 0x11c 98 #define SUN4I_TVE_SYNC_VBI_SYNC(x) ((x) << 16) 99 #define SUN4I_TVE_SYNC_VBI_VBLANK(x) (x) 100 101 #define SUN4I_TVE_ACTIVE_LINE_REG 0x124 102 #define SUN4I_TVE_ACTIVE_LINE(x) (x) 103 104 #define SUN4I_TVE_CHROMA_REG 0x128 105 #define SUN4I_TVE_CHROMA_COMP_GAIN(x) ((x) & 3) 106 #define SUN4I_TVE_CHROMA_COMP_GAIN_50 SUN4I_TVE_CHROMA_COMP_GAIN(2) 107 108 #define SUN4I_TVE_12C_REG 0x12c 109 #define SUN4I_TVE_12C_NOTCH_WIDTH_WIDE BIT(8) 110 #define SUN4I_TVE_12C_COMP_YUV_EN BIT(0) 111 112 #define SUN4I_TVE_RESYNC_REG 0x130 113 #define SUN4I_TVE_RESYNC_FIELD BIT(31) 114 #define SUN4I_TVE_RESYNC_LINE(x) ((x) << 16) 115 #define SUN4I_TVE_RESYNC_PIXEL(x) (x) 116 117 #define SUN4I_TVE_SLAVE_REG 0x134 118 119 #define SUN4I_TVE_WSS_DATA2_REG 0x244 120 121 struct color_gains { 122 u16 cb; 123 u16 cr; 124 }; 125 126 struct burst_levels { 127 u16 cb; 128 u16 cr; 129 }; 130 131 struct video_levels { 132 u16 black; 133 u16 blank; 134 }; 135 136 struct resync_parameters { 137 bool field; 138 u16 line; 139 u16 pixel; 140 }; 141 142 struct tv_mode { 143 char *name; 144 145 u32 mode; 146 u32 chroma_freq; 147 u16 back_porch; 148 u16 front_porch; 149 u16 line_number; 150 u16 vblank_level; 151 152 u32 hdisplay; 153 u16 hfront_porch; 154 u16 hsync_len; 155 u16 hback_porch; 156 157 u32 vdisplay; 158 u16 vfront_porch; 159 u16 vsync_len; 160 u16 vback_porch; 161 162 bool yc_en; 163 bool dac3_en; 164 bool dac_bit25_en; 165 166 const struct color_gains *color_gains; 167 const struct burst_levels *burst_levels; 168 const struct video_levels *video_levels; 169 const struct resync_parameters *resync_params; 170 }; 171 172 struct sun4i_tv { 173 struct drm_connector connector; 174 struct drm_encoder encoder; 175 176 struct clk *clk; 177 struct regmap *regs; 178 struct reset_control *reset; 179 180 struct sun4i_drv *drv; 181 }; 182 183 static const struct video_levels ntsc_video_levels = { 184 .black = 282, .blank = 240, 185 }; 186 187 static const struct video_levels pal_video_levels = { 188 .black = 252, .blank = 252, 189 }; 190 191 static const struct burst_levels ntsc_burst_levels = { 192 .cb = 79, .cr = 0, 193 }; 194 195 static const struct burst_levels pal_burst_levels = { 196 .cb = 40, .cr = 40, 197 }; 198 199 static const struct color_gains ntsc_color_gains = { 200 .cb = 160, .cr = 160, 201 }; 202 203 static const struct color_gains pal_color_gains = { 204 .cb = 224, .cr = 224, 205 }; 206 207 static const struct resync_parameters ntsc_resync_parameters = { 208 .field = false, .line = 14, .pixel = 12, 209 }; 210 211 static const struct resync_parameters pal_resync_parameters = { 212 .field = true, .line = 13, .pixel = 12, 213 }; 214 215 static const struct tv_mode tv_modes[] = { 216 { 217 .name = "NTSC", 218 .mode = SUN4I_TVE_CFG0_RES_480i, 219 .chroma_freq = 0x21f07c1f, 220 .yc_en = true, 221 .dac3_en = true, 222 .dac_bit25_en = true, 223 224 .back_porch = 118, 225 .front_porch = 32, 226 .line_number = 525, 227 228 .hdisplay = 720, 229 .hfront_porch = 18, 230 .hsync_len = 2, 231 .hback_porch = 118, 232 233 .vdisplay = 480, 234 .vfront_porch = 26, 235 .vsync_len = 2, 236 .vback_porch = 17, 237 238 .vblank_level = 240, 239 240 .color_gains = &ntsc_color_gains, 241 .burst_levels = &ntsc_burst_levels, 242 .video_levels = &ntsc_video_levels, 243 .resync_params = &ntsc_resync_parameters, 244 }, 245 { 246 .name = "PAL", 247 .mode = SUN4I_TVE_CFG0_RES_576i, 248 .chroma_freq = 0x2a098acb, 249 250 .back_porch = 138, 251 .front_porch = 24, 252 .line_number = 625, 253 254 .hdisplay = 720, 255 .hfront_porch = 3, 256 .hsync_len = 2, 257 .hback_porch = 139, 258 259 .vdisplay = 576, 260 .vfront_porch = 28, 261 .vsync_len = 2, 262 .vback_porch = 19, 263 264 .vblank_level = 252, 265 266 .color_gains = &pal_color_gains, 267 .burst_levels = &pal_burst_levels, 268 .video_levels = &pal_video_levels, 269 .resync_params = &pal_resync_parameters, 270 }, 271 }; 272 273 static inline struct sun4i_tv * 274 drm_encoder_to_sun4i_tv(struct drm_encoder *encoder) 275 { 276 return container_of(encoder, struct sun4i_tv, 277 encoder); 278 } 279 280 static inline struct sun4i_tv * 281 drm_connector_to_sun4i_tv(struct drm_connector *connector) 282 { 283 return container_of(connector, struct sun4i_tv, 284 connector); 285 } 286 287 /* 288 * FIXME: If only the drm_display_mode private field was usable, this 289 * could go away... 290 * 291 * So far, it doesn't seem to be preserved when the mode is passed by 292 * to mode_set for some reason. 293 */ 294 static const struct tv_mode *sun4i_tv_find_tv_by_mode(const struct drm_display_mode *mode) 295 { 296 int i; 297 298 /* First try to identify the mode by name */ 299 for (i = 0; i < ARRAY_SIZE(tv_modes); i++) { 300 const struct tv_mode *tv_mode = &tv_modes[i]; 301 302 DRM_DEBUG_DRIVER("Comparing mode %s vs %s", 303 mode->name, tv_mode->name); 304 305 if (!strcmp(mode->name, tv_mode->name)) 306 return tv_mode; 307 } 308 309 /* Then by number of lines */ 310 for (i = 0; i < ARRAY_SIZE(tv_modes); i++) { 311 const struct tv_mode *tv_mode = &tv_modes[i]; 312 313 DRM_DEBUG_DRIVER("Comparing mode %s vs %s (X: %d vs %d)", 314 mode->name, tv_mode->name, 315 mode->vdisplay, tv_mode->vdisplay); 316 317 if (mode->vdisplay == tv_mode->vdisplay) 318 return tv_mode; 319 } 320 321 return NULL; 322 } 323 324 static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode, 325 struct drm_display_mode *mode) 326 { 327 DRM_DEBUG_DRIVER("Creating mode %s\n", mode->name); 328 329 mode->type = DRM_MODE_TYPE_DRIVER; 330 mode->clock = 13500; 331 mode->flags = DRM_MODE_FLAG_INTERLACE; 332 333 mode->hdisplay = tv_mode->hdisplay; 334 mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch; 335 mode->hsync_end = mode->hsync_start + tv_mode->hsync_len; 336 mode->htotal = mode->hsync_end + tv_mode->hback_porch; 337 338 mode->vdisplay = tv_mode->vdisplay; 339 mode->vsync_start = mode->vdisplay + tv_mode->vfront_porch; 340 mode->vsync_end = mode->vsync_start + tv_mode->vsync_len; 341 mode->vtotal = mode->vsync_end + tv_mode->vback_porch; 342 } 343 344 static int sun4i_tv_atomic_check(struct drm_encoder *encoder, 345 struct drm_crtc_state *crtc_state, 346 struct drm_connector_state *conn_state) 347 { 348 return 0; 349 } 350 351 static void sun4i_tv_disable(struct drm_encoder *encoder) 352 { 353 struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); 354 struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); 355 struct sun4i_tcon *tcon = crtc->tcon; 356 struct sun4i_backend *backend = crtc->backend; 357 358 DRM_DEBUG_DRIVER("Disabling the TV Output\n"); 359 360 sun4i_tcon_channel_disable(tcon, 1); 361 362 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 363 SUN4I_TVE_EN_ENABLE, 364 0); 365 sun4i_backend_disable_color_correction(backend); 366 } 367 368 static void sun4i_tv_enable(struct drm_encoder *encoder) 369 { 370 struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); 371 struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); 372 struct sun4i_tcon *tcon = crtc->tcon; 373 struct sun4i_backend *backend = crtc->backend; 374 375 DRM_DEBUG_DRIVER("Enabling the TV Output\n"); 376 377 sun4i_backend_apply_color_correction(backend); 378 379 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 380 SUN4I_TVE_EN_ENABLE, 381 SUN4I_TVE_EN_ENABLE); 382 383 sun4i_tcon_channel_enable(tcon, 1); 384 } 385 386 static void sun4i_tv_mode_set(struct drm_encoder *encoder, 387 struct drm_display_mode *mode, 388 struct drm_display_mode *adjusted_mode) 389 { 390 struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); 391 struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); 392 struct sun4i_tcon *tcon = crtc->tcon; 393 const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); 394 395 sun4i_tcon1_mode_set(tcon, mode); 396 397 /* Enable and map the DAC to the output */ 398 regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, 399 SUN4I_TVE_EN_DAC_MAP_MASK, 400 SUN4I_TVE_EN_DAC_MAP(0, 1) | 401 SUN4I_TVE_EN_DAC_MAP(1, 2) | 402 SUN4I_TVE_EN_DAC_MAP(2, 3) | 403 SUN4I_TVE_EN_DAC_MAP(3, 4)); 404 405 /* Set PAL settings */ 406 regmap_write(tv->regs, SUN4I_TVE_CFG0_REG, 407 tv_mode->mode | 408 (tv_mode->yc_en ? SUN4I_TVE_CFG0_YC_EN : 0) | 409 SUN4I_TVE_CFG0_COMP_EN | 410 SUN4I_TVE_CFG0_DAC_CONTROL_54M | 411 SUN4I_TVE_CFG0_CORE_DATAPATH_54M | 412 SUN4I_TVE_CFG0_CORE_CONTROL_54M); 413 414 /* Configure the DAC for a composite output */ 415 regmap_write(tv->regs, SUN4I_TVE_DAC0_REG, 416 SUN4I_TVE_DAC0_DAC_EN(0) | 417 (tv_mode->dac3_en ? SUN4I_TVE_DAC0_DAC_EN(3) : 0) | 418 SUN4I_TVE_DAC0_INTERNAL_DAC_37_5_OHMS | 419 SUN4I_TVE_DAC0_CHROMA_0_75 | 420 SUN4I_TVE_DAC0_LUMA_0_4 | 421 SUN4I_TVE_DAC0_CLOCK_INVERT | 422 (tv_mode->dac_bit25_en ? BIT(25) : 0) | 423 BIT(30)); 424 425 /* Configure the sample delay between DAC0 and the other DAC */ 426 regmap_write(tv->regs, SUN4I_TVE_NOTCH_REG, 427 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(1, 0) | 428 SUN4I_TVE_NOTCH_DAC0_TO_DAC_DLY(2, 0)); 429 430 regmap_write(tv->regs, SUN4I_TVE_CHROMA_FREQ_REG, 431 tv_mode->chroma_freq); 432 433 /* Set the front and back porch */ 434 regmap_write(tv->regs, SUN4I_TVE_PORCH_REG, 435 SUN4I_TVE_PORCH_BACK(tv_mode->back_porch) | 436 SUN4I_TVE_PORCH_FRONT(tv_mode->front_porch)); 437 438 /* Set the lines setup */ 439 regmap_write(tv->regs, SUN4I_TVE_LINE_REG, 440 SUN4I_TVE_LINE_FIRST(22) | 441 SUN4I_TVE_LINE_NUMBER(tv_mode->line_number)); 442 443 regmap_write(tv->regs, SUN4I_TVE_LEVEL_REG, 444 SUN4I_TVE_LEVEL_BLANK(tv_mode->video_levels->blank) | 445 SUN4I_TVE_LEVEL_BLACK(tv_mode->video_levels->black)); 446 447 regmap_write(tv->regs, SUN4I_TVE_DAC1_REG, 448 SUN4I_TVE_DAC1_AMPLITUDE(0, 0x18) | 449 SUN4I_TVE_DAC1_AMPLITUDE(1, 0x18) | 450 SUN4I_TVE_DAC1_AMPLITUDE(2, 0x18) | 451 SUN4I_TVE_DAC1_AMPLITUDE(3, 0x18)); 452 453 regmap_write(tv->regs, SUN4I_TVE_CB_CR_LVL_REG, 454 SUN4I_TVE_CB_CR_LVL_CB_BURST(tv_mode->burst_levels->cb) | 455 SUN4I_TVE_CB_CR_LVL_CR_BURST(tv_mode->burst_levels->cr)); 456 457 /* Set burst width for a composite output */ 458 regmap_write(tv->regs, SUN4I_TVE_BURST_WIDTH_REG, 459 SUN4I_TVE_BURST_WIDTH_HSYNC_WIDTH(126) | 460 SUN4I_TVE_BURST_WIDTH_BURST_WIDTH(68) | 461 SUN4I_TVE_BURST_WIDTH_BREEZEWAY(22)); 462 463 regmap_write(tv->regs, SUN4I_TVE_CB_CR_GAIN_REG, 464 SUN4I_TVE_CB_CR_GAIN_CB(tv_mode->color_gains->cb) | 465 SUN4I_TVE_CB_CR_GAIN_CR(tv_mode->color_gains->cr)); 466 467 regmap_write(tv->regs, SUN4I_TVE_SYNC_VBI_REG, 468 SUN4I_TVE_SYNC_VBI_SYNC(0x10) | 469 SUN4I_TVE_SYNC_VBI_VBLANK(tv_mode->vblank_level)); 470 471 regmap_write(tv->regs, SUN4I_TVE_ACTIVE_LINE_REG, 472 SUN4I_TVE_ACTIVE_LINE(1440)); 473 474 /* Set composite chroma gain to 50 % */ 475 regmap_write(tv->regs, SUN4I_TVE_CHROMA_REG, 476 SUN4I_TVE_CHROMA_COMP_GAIN_50); 477 478 regmap_write(tv->regs, SUN4I_TVE_12C_REG, 479 SUN4I_TVE_12C_COMP_YUV_EN | 480 SUN4I_TVE_12C_NOTCH_WIDTH_WIDE); 481 482 regmap_write(tv->regs, SUN4I_TVE_RESYNC_REG, 483 SUN4I_TVE_RESYNC_PIXEL(tv_mode->resync_params->pixel) | 484 SUN4I_TVE_RESYNC_LINE(tv_mode->resync_params->line) | 485 (tv_mode->resync_params->field ? 486 SUN4I_TVE_RESYNC_FIELD : 0)); 487 488 regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0); 489 490 clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000); 491 } 492 493 static struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = { 494 .atomic_check = sun4i_tv_atomic_check, 495 .disable = sun4i_tv_disable, 496 .enable = sun4i_tv_enable, 497 .mode_set = sun4i_tv_mode_set, 498 }; 499 500 static void sun4i_tv_destroy(struct drm_encoder *encoder) 501 { 502 drm_encoder_cleanup(encoder); 503 } 504 505 static struct drm_encoder_funcs sun4i_tv_funcs = { 506 .destroy = sun4i_tv_destroy, 507 }; 508 509 static int sun4i_tv_comp_get_modes(struct drm_connector *connector) 510 { 511 int i; 512 513 for (i = 0; i < ARRAY_SIZE(tv_modes); i++) { 514 struct drm_display_mode *mode; 515 const struct tv_mode *tv_mode = &tv_modes[i]; 516 517 mode = drm_mode_create(connector->dev); 518 if (!mode) { 519 DRM_ERROR("Failed to create a new display mode\n"); 520 return 0; 521 } 522 523 strcpy(mode->name, tv_mode->name); 524 525 sun4i_tv_mode_to_drm_mode(tv_mode, mode); 526 drm_mode_probed_add(connector, mode); 527 } 528 529 return i; 530 } 531 532 static int sun4i_tv_comp_mode_valid(struct drm_connector *connector, 533 struct drm_display_mode *mode) 534 { 535 /* TODO */ 536 return MODE_OK; 537 } 538 539 static struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs = { 540 .get_modes = sun4i_tv_comp_get_modes, 541 .mode_valid = sun4i_tv_comp_mode_valid, 542 }; 543 544 static void 545 sun4i_tv_comp_connector_destroy(struct drm_connector *connector) 546 { 547 drm_connector_cleanup(connector); 548 } 549 550 static struct drm_connector_funcs sun4i_tv_comp_connector_funcs = { 551 .dpms = drm_atomic_helper_connector_dpms, 552 .fill_modes = drm_helper_probe_single_connector_modes, 553 .destroy = sun4i_tv_comp_connector_destroy, 554 .reset = drm_atomic_helper_connector_reset, 555 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 556 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 557 }; 558 559 static struct regmap_config sun4i_tv_regmap_config = { 560 .reg_bits = 32, 561 .val_bits = 32, 562 .reg_stride = 4, 563 .max_register = SUN4I_TVE_WSS_DATA2_REG, 564 .name = "tv-encoder", 565 }; 566 567 static int sun4i_tv_bind(struct device *dev, struct device *master, 568 void *data) 569 { 570 struct platform_device *pdev = to_platform_device(dev); 571 struct drm_device *drm = data; 572 struct sun4i_drv *drv = drm->dev_private; 573 struct sun4i_tv *tv; 574 struct resource *res; 575 void __iomem *regs; 576 int ret; 577 578 tv = devm_kzalloc(dev, sizeof(*tv), GFP_KERNEL); 579 if (!tv) 580 return -ENOMEM; 581 tv->drv = drv; 582 dev_set_drvdata(dev, tv); 583 584 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 585 regs = devm_ioremap_resource(dev, res); 586 if (IS_ERR(regs)) { 587 dev_err(dev, "Couldn't map the TV encoder registers\n"); 588 return PTR_ERR(regs); 589 } 590 591 tv->regs = devm_regmap_init_mmio(dev, regs, 592 &sun4i_tv_regmap_config); 593 if (IS_ERR(tv->regs)) { 594 dev_err(dev, "Couldn't create the TV encoder regmap\n"); 595 return PTR_ERR(tv->regs); 596 } 597 598 tv->reset = devm_reset_control_get(dev, NULL); 599 if (IS_ERR(tv->reset)) { 600 dev_err(dev, "Couldn't get our reset line\n"); 601 return PTR_ERR(tv->reset); 602 } 603 604 ret = reset_control_deassert(tv->reset); 605 if (ret) { 606 dev_err(dev, "Couldn't deassert our reset line\n"); 607 return ret; 608 } 609 610 tv->clk = devm_clk_get(dev, NULL); 611 if (IS_ERR(tv->clk)) { 612 dev_err(dev, "Couldn't get the TV encoder clock\n"); 613 ret = PTR_ERR(tv->clk); 614 goto err_assert_reset; 615 } 616 clk_prepare_enable(tv->clk); 617 618 drm_encoder_helper_add(&tv->encoder, 619 &sun4i_tv_helper_funcs); 620 ret = drm_encoder_init(drm, 621 &tv->encoder, 622 &sun4i_tv_funcs, 623 DRM_MODE_ENCODER_TVDAC, 624 NULL); 625 if (ret) { 626 dev_err(dev, "Couldn't initialise the TV encoder\n"); 627 goto err_disable_clk; 628 } 629 630 tv->encoder.possible_crtcs = drm_of_find_possible_crtcs(drm, 631 dev->of_node); 632 if (!tv->encoder.possible_crtcs) { 633 ret = -EPROBE_DEFER; 634 goto err_disable_clk; 635 } 636 637 drm_connector_helper_add(&tv->connector, 638 &sun4i_tv_comp_connector_helper_funcs); 639 ret = drm_connector_init(drm, &tv->connector, 640 &sun4i_tv_comp_connector_funcs, 641 DRM_MODE_CONNECTOR_Composite); 642 if (ret) { 643 dev_err(dev, 644 "Couldn't initialise the Composite connector\n"); 645 goto err_cleanup_connector; 646 } 647 tv->connector.interlace_allowed = true; 648 649 drm_mode_connector_attach_encoder(&tv->connector, &tv->encoder); 650 651 return 0; 652 653 err_cleanup_connector: 654 drm_encoder_cleanup(&tv->encoder); 655 err_disable_clk: 656 clk_disable_unprepare(tv->clk); 657 err_assert_reset: 658 reset_control_assert(tv->reset); 659 return ret; 660 } 661 662 static void sun4i_tv_unbind(struct device *dev, struct device *master, 663 void *data) 664 { 665 struct sun4i_tv *tv = dev_get_drvdata(dev); 666 667 drm_connector_cleanup(&tv->connector); 668 drm_encoder_cleanup(&tv->encoder); 669 clk_disable_unprepare(tv->clk); 670 } 671 672 static const struct component_ops sun4i_tv_ops = { 673 .bind = sun4i_tv_bind, 674 .unbind = sun4i_tv_unbind, 675 }; 676 677 static int sun4i_tv_probe(struct platform_device *pdev) 678 { 679 return component_add(&pdev->dev, &sun4i_tv_ops); 680 } 681 682 static int sun4i_tv_remove(struct platform_device *pdev) 683 { 684 component_del(&pdev->dev, &sun4i_tv_ops); 685 686 return 0; 687 } 688 689 static const struct of_device_id sun4i_tv_of_table[] = { 690 { .compatible = "allwinner,sun4i-a10-tv-encoder" }, 691 { } 692 }; 693 MODULE_DEVICE_TABLE(of, sun4i_tv_of_table); 694 695 static struct platform_driver sun4i_tv_platform_driver = { 696 .probe = sun4i_tv_probe, 697 .remove = sun4i_tv_remove, 698 .driver = { 699 .name = "sun4i-tve", 700 .of_match_table = sun4i_tv_of_table, 701 }, 702 }; 703 module_platform_driver(sun4i_tv_platform_driver); 704 705 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 706 MODULE_DESCRIPTION("Allwinner A10 TV Encoder Driver"); 707 MODULE_LICENSE("GPL"); 708