xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.c (revision 91afb7c373e881d5038a78e1206a0f6469440ec3)
1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 const struct nvkm_mc_intr
27 nv50_mc_intr[] = {
28 	{ 0x04000000, NVKM_ENGINE_DISP },  /* DISP before FIFO, so pageflip-timestamping works! */
29 	{ 0x00000001, NVKM_ENGINE_MPEG },
30 	{ 0x00000100, NVKM_ENGINE_FIFO },
31 	{ 0x00001000, NVKM_ENGINE_GR },
32 	{ 0x00004000, NVKM_ENGINE_CIPHER },	/* NV84- */
33 	{ 0x00008000, NVKM_ENGINE_BSP },	/* NV84- */
34 	{ 0x00020000, NVKM_ENGINE_VP },	/* NV84- */
35 	{ 0x00100000, NVKM_SUBDEV_TIMER },
36 	{ 0x00200000, NVKM_SUBDEV_GPIO },	/* PMGR->GPIO */
37 	{ 0x00200000, NVKM_SUBDEV_I2C }, 	/* PMGR->I2C/AUX */
38 	{ 0x10000000, NVKM_SUBDEV_BUS },
39 	{ 0x80000000, NVKM_ENGINE_SW },
40 	{ 0x0002d101, NVKM_SUBDEV_FB },
41 	{},
42 };
43 
44 void
45 nv50_mc_init(struct nvkm_mc *mc)
46 {
47 	struct nvkm_device *device = mc->subdev.device;
48 	nvkm_wr32(device, 0x000200, 0xffffffff); /* everything on */
49 }
50 
51 static const struct nvkm_mc_func
52 nv50_mc = {
53 	.init = nv50_mc_init,
54 	.intr = nv50_mc_intr,
55 	.intr_unarm = nv04_mc_intr_unarm,
56 	.intr_rearm = nv04_mc_intr_rearm,
57 	.intr_mask = nv04_mc_intr_mask,
58 };
59 
60 int
61 nv50_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
62 {
63 	return nvkm_mc_new_(&nv50_mc, device, index, pmc);
64 }
65