1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 28 /* 29 * Pre-requisites: headers required by header of this unit 30 */ 31 #include "include/gpio_types.h" 32 33 /* 34 * Header of this unit 35 */ 36 37 #include "hw_factory.h" 38 39 /* 40 * Post-requisites: headers required by this unit 41 */ 42 43 #if defined(CONFIG_DRM_AMD_DC_SI) 44 #include "dce60/hw_factory_dce60.h" 45 #endif 46 #include "dce80/hw_factory_dce80.h" 47 #include "dce110/hw_factory_dce110.h" 48 #include "dce120/hw_factory_dce120.h" 49 #include "dcn10/hw_factory_dcn10.h" 50 #include "dcn20/hw_factory_dcn20.h" 51 #include "dcn21/hw_factory_dcn21.h" 52 #include "dcn30/hw_factory_dcn30.h" 53 #include "dcn315/hw_factory_dcn315.h" 54 #include "dcn32/hw_factory_dcn32.h" 55 56 bool dal_hw_factory_init( 57 struct hw_factory *factory, 58 enum dce_version dce_version, 59 enum dce_environment dce_environment) 60 { 61 switch (dce_version) { 62 #if defined(CONFIG_DRM_AMD_DC_SI) 63 case DCE_VERSION_6_0: 64 case DCE_VERSION_6_1: 65 case DCE_VERSION_6_4: 66 dal_hw_factory_dce60_init(factory); 67 return true; 68 #endif 69 case DCE_VERSION_8_0: 70 case DCE_VERSION_8_1: 71 case DCE_VERSION_8_3: 72 dal_hw_factory_dce80_init(factory); 73 return true; 74 75 case DCE_VERSION_10_0: 76 dal_hw_factory_dce110_init(factory); 77 return true; 78 case DCE_VERSION_11_0: 79 case DCE_VERSION_11_2: 80 case DCE_VERSION_11_22: 81 dal_hw_factory_dce110_init(factory); 82 return true; 83 case DCE_VERSION_12_0: 84 case DCE_VERSION_12_1: 85 dal_hw_factory_dce120_init(factory); 86 return true; 87 case DCN_VERSION_1_0: 88 case DCN_VERSION_1_01: 89 dal_hw_factory_dcn10_init(factory); 90 return true; 91 case DCN_VERSION_2_0: 92 dal_hw_factory_dcn20_init(factory); 93 return true; 94 case DCN_VERSION_2_01: 95 case DCN_VERSION_2_1: 96 dal_hw_factory_dcn21_init(factory); 97 return true; 98 case DCN_VERSION_3_0: 99 case DCN_VERSION_3_01: 100 case DCN_VERSION_3_02: 101 case DCN_VERSION_3_03: 102 case DCN_VERSION_3_1: 103 case DCN_VERSION_3_14: 104 case DCN_VERSION_3_16: 105 dal_hw_factory_dcn30_init(factory); 106 return true; 107 case DCN_VERSION_3_15: 108 dal_hw_factory_dcn315_init(factory); 109 return true; 110 case DCN_VERSION_3_2: 111 case DCN_VERSION_3_21: 112 dal_hw_factory_dcn32_init(factory); 113 return true; 114 default: 115 ASSERT_CRITICAL(false); 116 return false; 117 } 118 } 119