1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Xilinx Zynq MPSoC Firmware layer 4 * 5 * Copyright (C) 2014-2020 Xilinx, Inc. 6 * 7 * Michal Simek <michal.simek@xilinx.com> 8 * Davorin Mista <davorin.mista@aggios.com> 9 * Jolly Shah <jollys@xilinx.com> 10 * Rajan Vaja <rajanv@xilinx.com> 11 */ 12 13 #include <linux/arm-smccc.h> 14 #include <linux/compiler.h> 15 #include <linux/device.h> 16 #include <linux/init.h> 17 #include <linux/mfd/core.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/of_platform.h> 21 #include <linux/slab.h> 22 #include <linux/uaccess.h> 23 24 #include <linux/firmware/xlnx-zynqmp.h> 25 #include "zynqmp-debug.h" 26 27 static bool feature_check_enabled; 28 static u32 zynqmp_pm_features[PM_API_MAX]; 29 30 static const struct mfd_cell firmware_devs[] = { 31 { 32 .name = "zynqmp_power_controller", 33 }, 34 }; 35 36 /** 37 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes 38 * @ret_status: PMUFW return code 39 * 40 * Return: corresponding Linux error code 41 */ 42 static int zynqmp_pm_ret_code(u32 ret_status) 43 { 44 switch (ret_status) { 45 case XST_PM_SUCCESS: 46 case XST_PM_DOUBLE_REQ: 47 return 0; 48 case XST_PM_NO_FEATURE: 49 return -ENOTSUPP; 50 case XST_PM_NO_ACCESS: 51 return -EACCES; 52 case XST_PM_ABORT_SUSPEND: 53 return -ECANCELED; 54 case XST_PM_MULT_USER: 55 return -EUSERS; 56 case XST_PM_INTERNAL: 57 case XST_PM_CONFLICT: 58 case XST_PM_INVALID_NODE: 59 default: 60 return -EINVAL; 61 } 62 } 63 64 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2, 65 u32 *ret_payload) 66 { 67 return -ENODEV; 68 } 69 70 /* 71 * PM function call wrapper 72 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration 73 */ 74 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail; 75 76 /** 77 * do_fw_call_smc() - Call system-level platform management layer (SMC) 78 * @arg0: Argument 0 to SMC call 79 * @arg1: Argument 1 to SMC call 80 * @arg2: Argument 2 to SMC call 81 * @ret_payload: Returned value array 82 * 83 * Invoke platform management function via SMC call (no hypervisor present). 84 * 85 * Return: Returns status, either success or error+reason 86 */ 87 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2, 88 u32 *ret_payload) 89 { 90 struct arm_smccc_res res; 91 92 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 93 94 if (ret_payload) { 95 ret_payload[0] = lower_32_bits(res.a0); 96 ret_payload[1] = upper_32_bits(res.a0); 97 ret_payload[2] = lower_32_bits(res.a1); 98 ret_payload[3] = upper_32_bits(res.a1); 99 } 100 101 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 102 } 103 104 /** 105 * do_fw_call_hvc() - Call system-level platform management layer (HVC) 106 * @arg0: Argument 0 to HVC call 107 * @arg1: Argument 1 to HVC call 108 * @arg2: Argument 2 to HVC call 109 * @ret_payload: Returned value array 110 * 111 * Invoke platform management function via HVC 112 * HVC-based for communication through hypervisor 113 * (no direct communication with ATF). 114 * 115 * Return: Returns status, either success or error+reason 116 */ 117 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2, 118 u32 *ret_payload) 119 { 120 struct arm_smccc_res res; 121 122 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res); 123 124 if (ret_payload) { 125 ret_payload[0] = lower_32_bits(res.a0); 126 ret_payload[1] = upper_32_bits(res.a0); 127 ret_payload[2] = lower_32_bits(res.a1); 128 ret_payload[3] = upper_32_bits(res.a1); 129 } 130 131 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0); 132 } 133 134 /** 135 * zynqmp_pm_feature() - Check weather given feature is supported or not 136 * @api_id: API ID to check 137 * 138 * Return: Returns status, either success or error+reason 139 */ 140 static int zynqmp_pm_feature(u32 api_id) 141 { 142 int ret; 143 u32 ret_payload[PAYLOAD_ARG_CNT]; 144 u64 smc_arg[2]; 145 146 if (!feature_check_enabled) 147 return 0; 148 149 /* Return value if feature is already checked */ 150 if (zynqmp_pm_features[api_id] != PM_FEATURE_UNCHECKED) 151 return zynqmp_pm_features[api_id]; 152 153 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK; 154 smc_arg[1] = api_id; 155 156 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload); 157 if (ret) { 158 zynqmp_pm_features[api_id] = PM_FEATURE_INVALID; 159 return PM_FEATURE_INVALID; 160 } 161 162 zynqmp_pm_features[api_id] = ret_payload[1]; 163 164 return zynqmp_pm_features[api_id]; 165 } 166 167 /** 168 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer 169 * caller function depending on the configuration 170 * @pm_api_id: Requested PM-API call 171 * @arg0: Argument 0 to requested PM-API call 172 * @arg1: Argument 1 to requested PM-API call 173 * @arg2: Argument 2 to requested PM-API call 174 * @arg3: Argument 3 to requested PM-API call 175 * @ret_payload: Returned value array 176 * 177 * Invoke platform management function for SMC or HVC call, depending on 178 * configuration. 179 * Following SMC Calling Convention (SMCCC) for SMC64: 180 * Pm Function Identifier, 181 * PM_SIP_SVC + PM_API_ID = 182 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) 183 * ((SMC_64) << FUNCID_CC_SHIFT) 184 * ((SIP_START) << FUNCID_OEN_SHIFT) 185 * ((PM_API_ID) & FUNCID_NUM_MASK)) 186 * 187 * PM_SIP_SVC - Registered ZynqMP SIP Service Call. 188 * PM_API_ID - Platform Management API ID. 189 * 190 * Return: Returns status, either success or error+reason 191 */ 192 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, 193 u32 arg2, u32 arg3, u32 *ret_payload) 194 { 195 /* 196 * Added SIP service call Function Identifier 197 * Make sure to stay in x0 register 198 */ 199 u64 smc_arg[4]; 200 201 if (zynqmp_pm_feature(pm_api_id) == PM_FEATURE_INVALID) 202 return -ENOTSUPP; 203 204 smc_arg[0] = PM_SIP_SVC | pm_api_id; 205 smc_arg[1] = ((u64)arg1 << 32) | arg0; 206 smc_arg[2] = ((u64)arg3 << 32) | arg2; 207 208 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload); 209 } 210 211 static u32 pm_api_version; 212 static u32 pm_tz_version; 213 214 /** 215 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware 216 * @version: Returned version value 217 * 218 * Return: Returns status, either success or error+reason 219 */ 220 int zynqmp_pm_get_api_version(u32 *version) 221 { 222 u32 ret_payload[PAYLOAD_ARG_CNT]; 223 int ret; 224 225 if (!version) 226 return -EINVAL; 227 228 /* Check is PM API version already verified */ 229 if (pm_api_version > 0) { 230 *version = pm_api_version; 231 return 0; 232 } 233 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload); 234 *version = ret_payload[1]; 235 236 return ret; 237 } 238 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); 239 240 /** 241 * zynqmp_pm_get_chipid - Get silicon ID registers 242 * @idcode: IDCODE register 243 * @version: version register 244 * 245 * Return: Returns the status of the operation and the idcode and version 246 * registers in @idcode and @version. 247 */ 248 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) 249 { 250 u32 ret_payload[PAYLOAD_ARG_CNT]; 251 int ret; 252 253 if (!idcode || !version) 254 return -EINVAL; 255 256 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload); 257 *idcode = ret_payload[1]; 258 *version = ret_payload[2]; 259 260 return ret; 261 } 262 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); 263 264 /** 265 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version 266 * @version: Returned version value 267 * 268 * Return: Returns status, either success or error+reason 269 */ 270 static int zynqmp_pm_get_trustzone_version(u32 *version) 271 { 272 u32 ret_payload[PAYLOAD_ARG_CNT]; 273 int ret; 274 275 if (!version) 276 return -EINVAL; 277 278 /* Check is PM trustzone version already verified */ 279 if (pm_tz_version > 0) { 280 *version = pm_tz_version; 281 return 0; 282 } 283 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0, 284 0, 0, ret_payload); 285 *version = ret_payload[1]; 286 287 return ret; 288 } 289 290 /** 291 * get_set_conduit_method() - Choose SMC or HVC based communication 292 * @np: Pointer to the device_node structure 293 * 294 * Use SMC or HVC-based functions to communicate with EL2/EL3. 295 * 296 * Return: Returns 0 on success or error code 297 */ 298 static int get_set_conduit_method(struct device_node *np) 299 { 300 const char *method; 301 302 if (of_property_read_string(np, "method", &method)) { 303 pr_warn("%s missing \"method\" property\n", __func__); 304 return -ENXIO; 305 } 306 307 if (!strcmp("hvc", method)) { 308 do_fw_call = do_fw_call_hvc; 309 } else if (!strcmp("smc", method)) { 310 do_fw_call = do_fw_call_smc; 311 } else { 312 pr_warn("%s Invalid \"method\" property: %s\n", 313 __func__, method); 314 return -EINVAL; 315 } 316 317 return 0; 318 } 319 320 /** 321 * zynqmp_pm_query_data() - Get query data from firmware 322 * @qdata: Variable to the zynqmp_pm_query_data structure 323 * @out: Returned output value 324 * 325 * Return: Returns status, either success or error+reason 326 */ 327 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) 328 { 329 int ret; 330 331 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1, 332 qdata.arg2, qdata.arg3, out); 333 334 /* 335 * For clock name query, all bytes in SMC response are clock name 336 * characters and return code is always success. For invalid clocks, 337 * clock name bytes would be zeros. 338 */ 339 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; 340 } 341 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); 342 343 /** 344 * zynqmp_pm_clock_enable() - Enable the clock for given id 345 * @clock_id: ID of the clock to be enabled 346 * 347 * This function is used by master to enable the clock 348 * including peripherals and PLL clocks. 349 * 350 * Return: Returns status, either success or error+reason 351 */ 352 int zynqmp_pm_clock_enable(u32 clock_id) 353 { 354 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); 355 } 356 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); 357 358 /** 359 * zynqmp_pm_clock_disable() - Disable the clock for given id 360 * @clock_id: ID of the clock to be disable 361 * 362 * This function is used by master to disable the clock 363 * including peripherals and PLL clocks. 364 * 365 * Return: Returns status, either success or error+reason 366 */ 367 int zynqmp_pm_clock_disable(u32 clock_id) 368 { 369 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); 370 } 371 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); 372 373 /** 374 * zynqmp_pm_clock_getstate() - Get the clock state for given id 375 * @clock_id: ID of the clock to be queried 376 * @state: 1/0 (Enabled/Disabled) 377 * 378 * This function is used by master to get the state of clock 379 * including peripherals and PLL clocks. 380 * 381 * Return: Returns status, either success or error+reason 382 */ 383 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) 384 { 385 u32 ret_payload[PAYLOAD_ARG_CNT]; 386 int ret; 387 388 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0, 389 0, 0, ret_payload); 390 *state = ret_payload[1]; 391 392 return ret; 393 } 394 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); 395 396 /** 397 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id 398 * @clock_id: ID of the clock 399 * @divider: divider value 400 * 401 * This function is used by master to set divider for any clock 402 * to achieve desired rate. 403 * 404 * Return: Returns status, either success or error+reason 405 */ 406 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) 407 { 408 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, 409 0, 0, NULL); 410 } 411 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); 412 413 /** 414 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id 415 * @clock_id: ID of the clock 416 * @divider: divider value 417 * 418 * This function is used by master to get divider values 419 * for any clock. 420 * 421 * Return: Returns status, either success or error+reason 422 */ 423 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) 424 { 425 u32 ret_payload[PAYLOAD_ARG_CNT]; 426 int ret; 427 428 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0, 429 0, 0, ret_payload); 430 *divider = ret_payload[1]; 431 432 return ret; 433 } 434 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); 435 436 /** 437 * zynqmp_pm_clock_setrate() - Set the clock rate for given id 438 * @clock_id: ID of the clock 439 * @rate: rate value in hz 440 * 441 * This function is used by master to set rate for any clock. 442 * 443 * Return: Returns status, either success or error+reason 444 */ 445 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) 446 { 447 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id, 448 lower_32_bits(rate), 449 upper_32_bits(rate), 450 0, NULL); 451 } 452 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate); 453 454 /** 455 * zynqmp_pm_clock_getrate() - Get the clock rate for given id 456 * @clock_id: ID of the clock 457 * @rate: rate value in hz 458 * 459 * This function is used by master to get rate 460 * for any clock. 461 * 462 * Return: Returns status, either success or error+reason 463 */ 464 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) 465 { 466 u32 ret_payload[PAYLOAD_ARG_CNT]; 467 int ret; 468 469 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0, 470 0, 0, ret_payload); 471 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1]; 472 473 return ret; 474 } 475 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); 476 477 /** 478 * zynqmp_pm_clock_setparent() - Set the clock parent for given id 479 * @clock_id: ID of the clock 480 * @parent_id: parent id 481 * 482 * This function is used by master to set parent for any clock. 483 * 484 * Return: Returns status, either success or error+reason 485 */ 486 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) 487 { 488 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, 489 parent_id, 0, 0, NULL); 490 } 491 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); 492 493 /** 494 * zynqmp_pm_clock_getparent() - Get the clock parent for given id 495 * @clock_id: ID of the clock 496 * @parent_id: parent id 497 * 498 * This function is used by master to get parent index 499 * for any clock. 500 * 501 * Return: Returns status, either success or error+reason 502 */ 503 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) 504 { 505 u32 ret_payload[PAYLOAD_ARG_CNT]; 506 int ret; 507 508 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0, 509 0, 0, ret_payload); 510 *parent_id = ret_payload[1]; 511 512 return ret; 513 } 514 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); 515 516 /** 517 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode 518 * 519 * @clk_id: PLL clock ID 520 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) 521 * 522 * This function sets PLL mode 523 * 524 * Return: Returns status, either success or error+reason 525 */ 526 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) 527 { 528 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE, 529 clk_id, mode, NULL); 530 } 531 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); 532 533 /** 534 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode 535 * 536 * @clk_id: PLL clock ID 537 * @mode: PLL mode 538 * 539 * This function return current PLL mode 540 * 541 * Return: Returns status, either success or error+reason 542 */ 543 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) 544 { 545 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE, 546 clk_id, 0, mode); 547 } 548 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); 549 550 /** 551 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data 552 * 553 * @clk_id: PLL clock ID 554 * @data: fraction data 555 * 556 * This function sets fraction data. 557 * It is valid for fraction mode only. 558 * 559 * Return: Returns status, either success or error+reason 560 */ 561 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) 562 { 563 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA, 564 clk_id, data, NULL); 565 } 566 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); 567 568 /** 569 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data 570 * 571 * @clk_id: PLL clock ID 572 * @data: fraction data 573 * 574 * This function returns fraction data value. 575 * 576 * Return: Returns status, either success or error+reason 577 */ 578 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) 579 { 580 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA, 581 clk_id, 0, data); 582 } 583 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); 584 585 /** 586 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device 587 * 588 * @node_id Node ID of the device 589 * @type Type of tap delay to set (input/output) 590 * @value Value to set fot the tap delay 591 * 592 * This function sets input/output tap delay for the SD device. 593 * 594 * @return Returns status, either success or error+reason 595 */ 596 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) 597 { 598 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, 599 type, value, NULL); 600 } 601 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); 602 603 /** 604 * zynqmp_pm_sd_dll_reset() - Reset DLL logic 605 * 606 * @node_id Node ID of the device 607 * @type Reset type 608 * 609 * This function resets DLL logic for the SD device. 610 * 611 * @return Returns status, either success or error+reason 612 */ 613 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) 614 { 615 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, 616 type, 0, NULL); 617 } 618 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); 619 620 /** 621 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) 622 * @index GGS register index 623 * @value Register value to be written 624 * 625 * This function writes value to GGS register. 626 * 627 * @return Returns status, either success or error+reason 628 */ 629 int zynqmp_pm_write_ggs(u32 index, u32 value) 630 { 631 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, 632 index, value, NULL); 633 } 634 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); 635 636 /** 637 * zynqmp_pm_write_ggs() - PM API for reading global general storage (ggs) 638 * @index GGS register index 639 * @value Register value to be written 640 * 641 * This function returns GGS register value. 642 * 643 * @return Returns status, either success or error+reason 644 */ 645 int zynqmp_pm_read_ggs(u32 index, u32 *value) 646 { 647 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, 648 index, 0, value); 649 } 650 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); 651 652 /** 653 * zynqmp_pm_write_pggs() - PM API for writing persistent global general 654 * storage (pggs) 655 * @index PGGS register index 656 * @value Register value to be written 657 * 658 * This function writes value to PGGS register. 659 * 660 * @return Returns status, either success or error+reason 661 */ 662 int zynqmp_pm_write_pggs(u32 index, u32 value) 663 { 664 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, 665 NULL); 666 } 667 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); 668 669 /** 670 * zynqmp_pm_write_pggs() - PM API for reading persistent global general 671 * storage (pggs) 672 * @index PGGS register index 673 * @value Register value to be written 674 * 675 * This function returns PGGS register value. 676 * 677 * @return Returns status, either success or error+reason 678 */ 679 int zynqmp_pm_read_pggs(u32 index, u32 *value) 680 { 681 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, 682 value); 683 } 684 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); 685 686 /** 687 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status 688 * @value Status value to be written 689 * 690 * This function sets healthy bit value to indicate boot health status 691 * to firmware. 692 * 693 * @return Returns status, either success or error+reason 694 */ 695 int zynqmp_pm_set_boot_health_status(u32 value) 696 { 697 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS, 698 value, 0, NULL); 699 } 700 701 /** 702 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) 703 * @reset: Reset to be configured 704 * @assert_flag: Flag stating should reset be asserted (1) or 705 * released (0) 706 * 707 * Return: Returns status, either success or error+reason 708 */ 709 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, 710 const enum zynqmp_pm_reset_action assert_flag) 711 { 712 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag, 713 0, 0, NULL); 714 } 715 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); 716 717 /** 718 * zynqmp_pm_reset_get_status - Get status of the reset 719 * @reset: Reset whose status should be returned 720 * @status: Returned status 721 * 722 * Return: Returns status, either success or error+reason 723 */ 724 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) 725 { 726 u32 ret_payload[PAYLOAD_ARG_CNT]; 727 int ret; 728 729 if (!status) 730 return -EINVAL; 731 732 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0, 733 0, 0, ret_payload); 734 *status = ret_payload[1]; 735 736 return ret; 737 } 738 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); 739 740 /** 741 * zynqmp_pm_fpga_load - Perform the fpga load 742 * @address: Address to write to 743 * @size: pl bitstream size 744 * @flags: Bitstream type 745 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration 746 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration 747 * 748 * This function provides access to pmufw. To transfer 749 * the required bitstream into PL. 750 * 751 * Return: Returns status, either success or error+reason 752 */ 753 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) 754 { 755 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), 756 upper_32_bits(address), size, flags, NULL); 757 } 758 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); 759 760 /** 761 * zynqmp_pm_fpga_get_status - Read value from PCAP status register 762 * @value: Value to read 763 * 764 * This function provides access to the pmufw to get the PCAP 765 * status 766 * 767 * Return: Returns status, either success or error+reason 768 */ 769 int zynqmp_pm_fpga_get_status(u32 *value) 770 { 771 u32 ret_payload[PAYLOAD_ARG_CNT]; 772 int ret; 773 774 if (!value) 775 return -EINVAL; 776 777 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload); 778 *value = ret_payload[1]; 779 780 return ret; 781 } 782 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); 783 784 /** 785 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller 786 * master has initialized its own power management 787 * 788 * This API function is to be used for notify the power management controller 789 * about the completed power management initialization. 790 * 791 * Return: Returns status, either success or error+reason 792 */ 793 int zynqmp_pm_init_finalize(void) 794 { 795 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL); 796 } 797 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); 798 799 /** 800 * zynqmp_pm_set_suspend_mode() - Set system suspend mode 801 * @mode: Mode to set for system suspend 802 * 803 * This API function is used to set mode of system suspend. 804 * 805 * Return: Returns status, either success or error+reason 806 */ 807 int zynqmp_pm_set_suspend_mode(u32 mode) 808 { 809 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL); 810 } 811 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); 812 813 /** 814 * zynqmp_pm_request_node() - Request a node with specific capabilities 815 * @node: Node ID of the slave 816 * @capabilities: Requested capabilities of the slave 817 * @qos: Quality of service (not supported) 818 * @ack: Flag to specify whether acknowledge is requested 819 * 820 * This function is used by master to request particular node from firmware. 821 * Every master must request node before using it. 822 * 823 * Return: Returns status, either success or error+reason 824 */ 825 int zynqmp_pm_request_node(const u32 node, const u32 capabilities, 826 const u32 qos, const enum zynqmp_pm_request_ack ack) 827 { 828 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities, 829 qos, ack, NULL); 830 } 831 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); 832 833 /** 834 * zynqmp_pm_release_node() - Release a node 835 * @node: Node ID of the slave 836 * 837 * This function is used by master to inform firmware that master 838 * has released node. Once released, master must not use that node 839 * without re-request. 840 * 841 * Return: Returns status, either success or error+reason 842 */ 843 int zynqmp_pm_release_node(const u32 node) 844 { 845 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL); 846 } 847 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); 848 849 /** 850 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves 851 * @node: Node ID of the slave 852 * @capabilities: Requested capabilities of the slave 853 * @qos: Quality of service (not supported) 854 * @ack: Flag to specify whether acknowledge is requested 855 * 856 * This API function is to be used for slaves a PU already has requested 857 * to change its capabilities. 858 * 859 * Return: Returns status, either success or error+reason 860 */ 861 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, 862 const u32 qos, 863 const enum zynqmp_pm_request_ack ack) 864 { 865 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities, 866 qos, ack, NULL); 867 } 868 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); 869 870 /** 871 * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using 872 * AES-GCM core. 873 * @address: Address of the AesParams structure. 874 * @out: Returned output value 875 * 876 * Return: Returns status, either success or error code. 877 */ 878 int zynqmp_pm_aes_engine(const u64 address, u32 *out) 879 { 880 u32 ret_payload[PAYLOAD_ARG_CNT]; 881 int ret; 882 883 if (!out) 884 return -EINVAL; 885 886 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), 887 lower_32_bits(address), 888 0, 0, ret_payload); 889 *out = ret_payload[1]; 890 891 return ret; 892 } 893 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); 894 895 /** 896 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart 897 * @type: Shutdown or restart? 0 for shutdown, 1 for restart 898 * @subtype: Specifies which system should be restarted or shut down 899 * 900 * Return: Returns status, either success or error+reason 901 */ 902 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 903 { 904 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype, 905 0, 0, NULL); 906 } 907 908 /** 909 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope 910 * @subtype: Shutdown subtype 911 * @name: Matching string for scope argument 912 * 913 * This struct encapsulates mapping between shutdown scope ID and string. 914 */ 915 struct zynqmp_pm_shutdown_scope { 916 const enum zynqmp_pm_shutdown_subtype subtype; 917 const char *name; 918 }; 919 920 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { 921 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { 922 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, 923 .name = "subsystem", 924 }, 925 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { 926 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, 927 .name = "ps_only", 928 }, 929 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { 930 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, 931 .name = "system", 932 }, 933 }; 934 935 static struct zynqmp_pm_shutdown_scope *selected_scope = 936 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; 937 938 /** 939 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid 940 * @scope_string: Shutdown scope string 941 * 942 * Return: Return pointer to matching shutdown scope struct from 943 * array of available options in system if string is valid, 944 * otherwise returns NULL. 945 */ 946 static struct zynqmp_pm_shutdown_scope* 947 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) 948 { 949 int count; 950 951 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) 952 if (sysfs_streq(scope_string, shutdown_scopes[count].name)) 953 return &shutdown_scopes[count]; 954 955 return NULL; 956 } 957 958 static ssize_t shutdown_scope_show(struct device *device, 959 struct device_attribute *attr, 960 char *buf) 961 { 962 int i; 963 964 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { 965 if (&shutdown_scopes[i] == selected_scope) { 966 strcat(buf, "["); 967 strcat(buf, shutdown_scopes[i].name); 968 strcat(buf, "]"); 969 } else { 970 strcat(buf, shutdown_scopes[i].name); 971 } 972 strcat(buf, " "); 973 } 974 strcat(buf, "\n"); 975 976 return strlen(buf); 977 } 978 979 static ssize_t shutdown_scope_store(struct device *device, 980 struct device_attribute *attr, 981 const char *buf, size_t count) 982 { 983 int ret; 984 struct zynqmp_pm_shutdown_scope *scope; 985 986 scope = zynqmp_pm_is_shutdown_scope_valid(buf); 987 if (!scope) 988 return -EINVAL; 989 990 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, 991 scope->subtype); 992 if (ret) { 993 pr_err("unable to set shutdown scope %s\n", buf); 994 return ret; 995 } 996 997 selected_scope = scope; 998 999 return count; 1000 } 1001 1002 static DEVICE_ATTR_RW(shutdown_scope); 1003 1004 static ssize_t health_status_store(struct device *device, 1005 struct device_attribute *attr, 1006 const char *buf, size_t count) 1007 { 1008 int ret; 1009 unsigned int value; 1010 1011 ret = kstrtouint(buf, 10, &value); 1012 if (ret) 1013 return ret; 1014 1015 ret = zynqmp_pm_set_boot_health_status(value); 1016 if (ret) { 1017 dev_err(device, "unable to set healthy bit value to %u\n", 1018 value); 1019 return ret; 1020 } 1021 1022 return count; 1023 } 1024 1025 static DEVICE_ATTR_WO(health_status); 1026 1027 static ssize_t ggs_show(struct device *device, 1028 struct device_attribute *attr, 1029 char *buf, 1030 u32 reg) 1031 { 1032 int ret; 1033 u32 ret_payload[PAYLOAD_ARG_CNT]; 1034 1035 ret = zynqmp_pm_read_ggs(reg, ret_payload); 1036 if (ret) 1037 return ret; 1038 1039 return sprintf(buf, "0x%x\n", ret_payload[1]); 1040 } 1041 1042 static ssize_t ggs_store(struct device *device, 1043 struct device_attribute *attr, 1044 const char *buf, size_t count, 1045 u32 reg) 1046 { 1047 long value; 1048 int ret; 1049 1050 if (reg >= GSS_NUM_REGS) 1051 return -EINVAL; 1052 1053 ret = kstrtol(buf, 16, &value); 1054 if (ret) { 1055 count = -EFAULT; 1056 goto err; 1057 } 1058 1059 ret = zynqmp_pm_write_ggs(reg, value); 1060 if (ret) 1061 count = -EFAULT; 1062 err: 1063 return count; 1064 } 1065 1066 /* GGS register show functions */ 1067 #define GGS0_SHOW(N) \ 1068 ssize_t ggs##N##_show(struct device *device, \ 1069 struct device_attribute *attr, \ 1070 char *buf) \ 1071 { \ 1072 return ggs_show(device, attr, buf, N); \ 1073 } 1074 1075 static GGS0_SHOW(0); 1076 static GGS0_SHOW(1); 1077 static GGS0_SHOW(2); 1078 static GGS0_SHOW(3); 1079 1080 /* GGS register store function */ 1081 #define GGS0_STORE(N) \ 1082 ssize_t ggs##N##_store(struct device *device, \ 1083 struct device_attribute *attr, \ 1084 const char *buf, \ 1085 size_t count) \ 1086 { \ 1087 return ggs_store(device, attr, buf, count, N); \ 1088 } 1089 1090 static GGS0_STORE(0); 1091 static GGS0_STORE(1); 1092 static GGS0_STORE(2); 1093 static GGS0_STORE(3); 1094 1095 static ssize_t pggs_show(struct device *device, 1096 struct device_attribute *attr, 1097 char *buf, 1098 u32 reg) 1099 { 1100 int ret; 1101 u32 ret_payload[PAYLOAD_ARG_CNT]; 1102 1103 ret = zynqmp_pm_read_pggs(reg, ret_payload); 1104 if (ret) 1105 return ret; 1106 1107 return sprintf(buf, "0x%x\n", ret_payload[1]); 1108 } 1109 1110 static ssize_t pggs_store(struct device *device, 1111 struct device_attribute *attr, 1112 const char *buf, size_t count, 1113 u32 reg) 1114 { 1115 long value; 1116 int ret; 1117 1118 if (reg >= GSS_NUM_REGS) 1119 return -EINVAL; 1120 1121 ret = kstrtol(buf, 16, &value); 1122 if (ret) { 1123 count = -EFAULT; 1124 goto err; 1125 } 1126 1127 ret = zynqmp_pm_write_pggs(reg, value); 1128 if (ret) 1129 count = -EFAULT; 1130 1131 err: 1132 return count; 1133 } 1134 1135 #define PGGS0_SHOW(N) \ 1136 ssize_t pggs##N##_show(struct device *device, \ 1137 struct device_attribute *attr, \ 1138 char *buf) \ 1139 { \ 1140 return pggs_show(device, attr, buf, N); \ 1141 } 1142 1143 #define PGGS0_STORE(N) \ 1144 ssize_t pggs##N##_store(struct device *device, \ 1145 struct device_attribute *attr, \ 1146 const char *buf, \ 1147 size_t count) \ 1148 { \ 1149 return pggs_store(device, attr, buf, count, N); \ 1150 } 1151 1152 /* PGGS register show functions */ 1153 static PGGS0_SHOW(0); 1154 static PGGS0_SHOW(1); 1155 static PGGS0_SHOW(2); 1156 static PGGS0_SHOW(3); 1157 1158 /* PGGS register store functions */ 1159 static PGGS0_STORE(0); 1160 static PGGS0_STORE(1); 1161 static PGGS0_STORE(2); 1162 static PGGS0_STORE(3); 1163 1164 /* GGS register attributes */ 1165 static DEVICE_ATTR_RW(ggs0); 1166 static DEVICE_ATTR_RW(ggs1); 1167 static DEVICE_ATTR_RW(ggs2); 1168 static DEVICE_ATTR_RW(ggs3); 1169 1170 /* PGGS register attributes */ 1171 static DEVICE_ATTR_RW(pggs0); 1172 static DEVICE_ATTR_RW(pggs1); 1173 static DEVICE_ATTR_RW(pggs2); 1174 static DEVICE_ATTR_RW(pggs3); 1175 1176 static struct attribute *zynqmp_firmware_attrs[] = { 1177 &dev_attr_ggs0.attr, 1178 &dev_attr_ggs1.attr, 1179 &dev_attr_ggs2.attr, 1180 &dev_attr_ggs3.attr, 1181 &dev_attr_pggs0.attr, 1182 &dev_attr_pggs1.attr, 1183 &dev_attr_pggs2.attr, 1184 &dev_attr_pggs3.attr, 1185 &dev_attr_shutdown_scope.attr, 1186 &dev_attr_health_status.attr, 1187 NULL, 1188 }; 1189 1190 ATTRIBUTE_GROUPS(zynqmp_firmware); 1191 1192 static int zynqmp_firmware_probe(struct platform_device *pdev) 1193 { 1194 struct device *dev = &pdev->dev; 1195 struct device_node *np; 1196 int ret; 1197 1198 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp"); 1199 if (!np) { 1200 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); 1201 if (!np) 1202 return 0; 1203 1204 feature_check_enabled = true; 1205 } 1206 of_node_put(np); 1207 1208 ret = get_set_conduit_method(dev->of_node); 1209 if (ret) 1210 return ret; 1211 1212 /* Check PM API version number */ 1213 zynqmp_pm_get_api_version(&pm_api_version); 1214 if (pm_api_version < ZYNQMP_PM_VERSION) { 1215 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n", 1216 __func__, 1217 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR, 1218 pm_api_version >> 16, pm_api_version & 0xFFFF); 1219 } 1220 1221 pr_info("%s Platform Management API v%d.%d\n", __func__, 1222 pm_api_version >> 16, pm_api_version & 0xFFFF); 1223 1224 /* Check trustzone version number */ 1225 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version); 1226 if (ret) 1227 panic("Legacy trustzone found without version support\n"); 1228 1229 if (pm_tz_version < ZYNQMP_TZ_VERSION) 1230 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n", 1231 __func__, 1232 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR, 1233 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1234 1235 pr_info("%s Trustzone version v%d.%d\n", __func__, 1236 pm_tz_version >> 16, pm_tz_version & 0xFFFF); 1237 1238 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, 1239 ARRAY_SIZE(firmware_devs), NULL, 0, NULL); 1240 if (ret) { 1241 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret); 1242 return ret; 1243 } 1244 1245 zynqmp_pm_api_debugfs_init(); 1246 1247 return of_platform_populate(dev->of_node, NULL, NULL, dev); 1248 } 1249 1250 static int zynqmp_firmware_remove(struct platform_device *pdev) 1251 { 1252 mfd_remove_devices(&pdev->dev); 1253 zynqmp_pm_api_debugfs_exit(); 1254 1255 return 0; 1256 } 1257 1258 static const struct of_device_id zynqmp_firmware_of_match[] = { 1259 {.compatible = "xlnx,zynqmp-firmware"}, 1260 {.compatible = "xlnx,versal-firmware"}, 1261 {}, 1262 }; 1263 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match); 1264 1265 static struct platform_driver zynqmp_firmware_driver = { 1266 .driver = { 1267 .name = "zynqmp_firmware", 1268 .of_match_table = zynqmp_firmware_of_match, 1269 .dev_groups = zynqmp_firmware_groups, 1270 }, 1271 .probe = zynqmp_firmware_probe, 1272 .remove = zynqmp_firmware_remove, 1273 }; 1274 module_platform_driver(zynqmp_firmware_driver); 1275