xref: /linux/drivers/crypto/qce/skcipher.c (revision e5a52fd2b8cdb700b3c07b030e050a49ef3156b9)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved.
4  */
5 
6 #include <linux/device.h>
7 #include <linux/interrupt.h>
8 #include <linux/moduleparam.h>
9 #include <linux/types.h>
10 #include <crypto/aes.h>
11 #include <crypto/internal/des.h>
12 #include <crypto/internal/skcipher.h>
13 
14 #include "cipher.h"
15 
16 static unsigned int aes_sw_max_len = CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN;
17 module_param(aes_sw_max_len, uint, 0644);
18 MODULE_PARM_DESC(aes_sw_max_len,
19 		 "Only use hardware for AES requests larger than this "
20 		 "[0=always use hardware; anything <16 breaks AES-GCM; default="
21 		 __stringify(CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN)"]");
22 
23 static LIST_HEAD(skcipher_algs);
24 
25 static void qce_skcipher_done(void *data)
26 {
27 	struct crypto_async_request *async_req = data;
28 	struct skcipher_request *req = skcipher_request_cast(async_req);
29 	struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req);
30 	struct qce_alg_template *tmpl = to_cipher_tmpl(crypto_skcipher_reqtfm(req));
31 	struct qce_device *qce = tmpl->qce;
32 	struct qce_result_dump *result_buf = qce->dma.result_buf;
33 	enum dma_data_direction dir_src, dir_dst;
34 	u32 status;
35 	int error;
36 	bool diff_dst;
37 
38 	diff_dst = (req->src != req->dst) ? true : false;
39 	dir_src = diff_dst ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL;
40 	dir_dst = diff_dst ? DMA_FROM_DEVICE : DMA_BIDIRECTIONAL;
41 
42 	error = qce_dma_terminate_all(&qce->dma);
43 	if (error)
44 		dev_dbg(qce->dev, "skcipher dma termination error (%d)\n",
45 			error);
46 
47 	if (diff_dst)
48 		dma_unmap_sg(qce->dev, rctx->src_sg, rctx->src_nents, dir_src);
49 	dma_unmap_sg(qce->dev, rctx->dst_sg, rctx->dst_nents, dir_dst);
50 
51 	sg_free_table(&rctx->dst_tbl);
52 
53 	error = qce_check_status(qce, &status);
54 	if (error < 0)
55 		dev_dbg(qce->dev, "skcipher operation error (%x)\n", status);
56 
57 	memcpy(rctx->iv, result_buf->encr_cntr_iv, rctx->ivsize);
58 	qce->async_req_done(tmpl->qce, error);
59 }
60 
61 static int
62 qce_skcipher_async_req_handle(struct crypto_async_request *async_req)
63 {
64 	struct skcipher_request *req = skcipher_request_cast(async_req);
65 	struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req);
66 	struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
67 	struct qce_alg_template *tmpl = to_cipher_tmpl(crypto_skcipher_reqtfm(req));
68 	struct qce_device *qce = tmpl->qce;
69 	enum dma_data_direction dir_src, dir_dst;
70 	struct scatterlist *sg;
71 	bool diff_dst;
72 	gfp_t gfp;
73 	int ret;
74 
75 	rctx->iv = req->iv;
76 	rctx->ivsize = crypto_skcipher_ivsize(skcipher);
77 	rctx->cryptlen = req->cryptlen;
78 
79 	diff_dst = (req->src != req->dst) ? true : false;
80 	dir_src = diff_dst ? DMA_TO_DEVICE : DMA_BIDIRECTIONAL;
81 	dir_dst = diff_dst ? DMA_FROM_DEVICE : DMA_BIDIRECTIONAL;
82 
83 	rctx->src_nents = sg_nents_for_len(req->src, req->cryptlen);
84 	if (diff_dst)
85 		rctx->dst_nents = sg_nents_for_len(req->dst, req->cryptlen);
86 	else
87 		rctx->dst_nents = rctx->src_nents;
88 	if (rctx->src_nents < 0) {
89 		dev_err(qce->dev, "Invalid numbers of src SG.\n");
90 		return rctx->src_nents;
91 	}
92 	if (rctx->dst_nents < 0) {
93 		dev_err(qce->dev, "Invalid numbers of dst SG.\n");
94 		return -rctx->dst_nents;
95 	}
96 
97 	rctx->dst_nents += 1;
98 
99 	gfp = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
100 						GFP_KERNEL : GFP_ATOMIC;
101 
102 	ret = sg_alloc_table(&rctx->dst_tbl, rctx->dst_nents, gfp);
103 	if (ret)
104 		return ret;
105 
106 	sg_init_one(&rctx->result_sg, qce->dma.result_buf, QCE_RESULT_BUF_SZ);
107 
108 	sg = qce_sgtable_add(&rctx->dst_tbl, req->dst, req->cryptlen);
109 	if (IS_ERR(sg)) {
110 		ret = PTR_ERR(sg);
111 		goto error_free;
112 	}
113 
114 	sg = qce_sgtable_add(&rctx->dst_tbl, &rctx->result_sg,
115 			     QCE_RESULT_BUF_SZ);
116 	if (IS_ERR(sg)) {
117 		ret = PTR_ERR(sg);
118 		goto error_free;
119 	}
120 
121 	sg_mark_end(sg);
122 	rctx->dst_sg = rctx->dst_tbl.sgl;
123 
124 	ret = dma_map_sg(qce->dev, rctx->dst_sg, rctx->dst_nents, dir_dst);
125 	if (ret < 0)
126 		goto error_free;
127 
128 	if (diff_dst) {
129 		ret = dma_map_sg(qce->dev, req->src, rctx->src_nents, dir_src);
130 		if (ret < 0)
131 			goto error_unmap_dst;
132 		rctx->src_sg = req->src;
133 	} else {
134 		rctx->src_sg = rctx->dst_sg;
135 	}
136 
137 	ret = qce_dma_prep_sgs(&qce->dma, rctx->src_sg, rctx->src_nents,
138 			       rctx->dst_sg, rctx->dst_nents,
139 			       qce_skcipher_done, async_req);
140 	if (ret)
141 		goto error_unmap_src;
142 
143 	qce_dma_issue_pending(&qce->dma);
144 
145 	ret = qce_start(async_req, tmpl->crypto_alg_type, req->cryptlen, 0);
146 	if (ret)
147 		goto error_terminate;
148 
149 	return 0;
150 
151 error_terminate:
152 	qce_dma_terminate_all(&qce->dma);
153 error_unmap_src:
154 	if (diff_dst)
155 		dma_unmap_sg(qce->dev, req->src, rctx->src_nents, dir_src);
156 error_unmap_dst:
157 	dma_unmap_sg(qce->dev, rctx->dst_sg, rctx->dst_nents, dir_dst);
158 error_free:
159 	sg_free_table(&rctx->dst_tbl);
160 	return ret;
161 }
162 
163 static int qce_skcipher_setkey(struct crypto_skcipher *ablk, const u8 *key,
164 				 unsigned int keylen)
165 {
166 	struct crypto_tfm *tfm = crypto_skcipher_tfm(ablk);
167 	struct qce_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
168 	unsigned long flags = to_cipher_tmpl(ablk)->alg_flags;
169 	int ret;
170 
171 	if (!key || !keylen)
172 		return -EINVAL;
173 
174 	switch (IS_XTS(flags) ? keylen >> 1 : keylen) {
175 	case AES_KEYSIZE_128:
176 	case AES_KEYSIZE_256:
177 		memcpy(ctx->enc_key, key, keylen);
178 		break;
179 	}
180 
181 	ret = crypto_sync_skcipher_setkey(ctx->fallback, key, keylen);
182 	if (!ret)
183 		ctx->enc_keylen = keylen;
184 	return ret;
185 }
186 
187 static int qce_des_setkey(struct crypto_skcipher *ablk, const u8 *key,
188 			  unsigned int keylen)
189 {
190 	struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(ablk);
191 	int err;
192 
193 	err = verify_skcipher_des_key(ablk, key);
194 	if (err)
195 		return err;
196 
197 	ctx->enc_keylen = keylen;
198 	memcpy(ctx->enc_key, key, keylen);
199 	return 0;
200 }
201 
202 static int qce_des3_setkey(struct crypto_skcipher *ablk, const u8 *key,
203 			   unsigned int keylen)
204 {
205 	struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(ablk);
206 	int err;
207 
208 	err = verify_skcipher_des3_key(ablk, key);
209 	if (err)
210 		return err;
211 
212 	ctx->enc_keylen = keylen;
213 	memcpy(ctx->enc_key, key, keylen);
214 	return 0;
215 }
216 
217 static int qce_skcipher_crypt(struct skcipher_request *req, int encrypt)
218 {
219 	struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
220 	struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
221 	struct qce_cipher_reqctx *rctx = skcipher_request_ctx(req);
222 	struct qce_alg_template *tmpl = to_cipher_tmpl(tfm);
223 	int keylen;
224 	int ret;
225 
226 	rctx->flags = tmpl->alg_flags;
227 	rctx->flags |= encrypt ? QCE_ENCRYPT : QCE_DECRYPT;
228 	keylen = IS_XTS(rctx->flags) ? ctx->enc_keylen >> 1 : ctx->enc_keylen;
229 
230 	/* qce is hanging when AES-XTS request len > QCE_SECTOR_SIZE and
231 	 * is not a multiple of it; pass such requests to the fallback
232 	 */
233 	if (IS_AES(rctx->flags) &&
234 	    (((keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_256) ||
235 	      req->cryptlen <= aes_sw_max_len) ||
236 	     (IS_XTS(rctx->flags) && req->cryptlen > QCE_SECTOR_SIZE &&
237 	      req->cryptlen % QCE_SECTOR_SIZE))) {
238 		SYNC_SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
239 
240 		skcipher_request_set_sync_tfm(subreq, ctx->fallback);
241 		skcipher_request_set_callback(subreq, req->base.flags,
242 					      NULL, NULL);
243 		skcipher_request_set_crypt(subreq, req->src, req->dst,
244 					   req->cryptlen, req->iv);
245 		ret = encrypt ? crypto_skcipher_encrypt(subreq) :
246 				crypto_skcipher_decrypt(subreq);
247 		skcipher_request_zero(subreq);
248 		return ret;
249 	}
250 
251 	return tmpl->qce->async_req_enqueue(tmpl->qce, &req->base);
252 }
253 
254 static int qce_skcipher_encrypt(struct skcipher_request *req)
255 {
256 	return qce_skcipher_crypt(req, 1);
257 }
258 
259 static int qce_skcipher_decrypt(struct skcipher_request *req)
260 {
261 	return qce_skcipher_crypt(req, 0);
262 }
263 
264 static int qce_skcipher_init(struct crypto_skcipher *tfm)
265 {
266 	struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
267 
268 	memset(ctx, 0, sizeof(*ctx));
269 	crypto_skcipher_set_reqsize(tfm, sizeof(struct qce_cipher_reqctx));
270 	return 0;
271 }
272 
273 static int qce_skcipher_init_fallback(struct crypto_skcipher *tfm)
274 {
275 	struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
276 
277 	qce_skcipher_init(tfm);
278 	ctx->fallback = crypto_alloc_sync_skcipher(crypto_tfm_alg_name(&tfm->base),
279 						   0, CRYPTO_ALG_NEED_FALLBACK);
280 	return PTR_ERR_OR_ZERO(ctx->fallback);
281 }
282 
283 static void qce_skcipher_exit(struct crypto_skcipher *tfm)
284 {
285 	struct qce_cipher_ctx *ctx = crypto_skcipher_ctx(tfm);
286 
287 	crypto_free_sync_skcipher(ctx->fallback);
288 }
289 
290 struct qce_skcipher_def {
291 	unsigned long flags;
292 	const char *name;
293 	const char *drv_name;
294 	unsigned int blocksize;
295 	unsigned int chunksize;
296 	unsigned int ivsize;
297 	unsigned int min_keysize;
298 	unsigned int max_keysize;
299 };
300 
301 static const struct qce_skcipher_def skcipher_def[] = {
302 	{
303 		.flags		= QCE_ALG_AES | QCE_MODE_ECB,
304 		.name		= "ecb(aes)",
305 		.drv_name	= "ecb-aes-qce",
306 		.blocksize	= AES_BLOCK_SIZE,
307 		.ivsize		= AES_BLOCK_SIZE,
308 		.min_keysize	= AES_MIN_KEY_SIZE,
309 		.max_keysize	= AES_MAX_KEY_SIZE,
310 	},
311 	{
312 		.flags		= QCE_ALG_AES | QCE_MODE_CBC,
313 		.name		= "cbc(aes)",
314 		.drv_name	= "cbc-aes-qce",
315 		.blocksize	= AES_BLOCK_SIZE,
316 		.ivsize		= AES_BLOCK_SIZE,
317 		.min_keysize	= AES_MIN_KEY_SIZE,
318 		.max_keysize	= AES_MAX_KEY_SIZE,
319 	},
320 	{
321 		.flags		= QCE_ALG_AES | QCE_MODE_CTR,
322 		.name		= "ctr(aes)",
323 		.drv_name	= "ctr-aes-qce",
324 		.blocksize	= 1,
325 		.chunksize	= AES_BLOCK_SIZE,
326 		.ivsize		= AES_BLOCK_SIZE,
327 		.min_keysize	= AES_MIN_KEY_SIZE,
328 		.max_keysize	= AES_MAX_KEY_SIZE,
329 	},
330 	{
331 		.flags		= QCE_ALG_AES | QCE_MODE_XTS,
332 		.name		= "xts(aes)",
333 		.drv_name	= "xts-aes-qce",
334 		.blocksize	= AES_BLOCK_SIZE,
335 		.ivsize		= AES_BLOCK_SIZE,
336 		.min_keysize	= AES_MIN_KEY_SIZE * 2,
337 		.max_keysize	= AES_MAX_KEY_SIZE * 2,
338 	},
339 	{
340 		.flags		= QCE_ALG_DES | QCE_MODE_ECB,
341 		.name		= "ecb(des)",
342 		.drv_name	= "ecb-des-qce",
343 		.blocksize	= DES_BLOCK_SIZE,
344 		.ivsize		= 0,
345 		.min_keysize	= DES_KEY_SIZE,
346 		.max_keysize	= DES_KEY_SIZE,
347 	},
348 	{
349 		.flags		= QCE_ALG_DES | QCE_MODE_CBC,
350 		.name		= "cbc(des)",
351 		.drv_name	= "cbc-des-qce",
352 		.blocksize	= DES_BLOCK_SIZE,
353 		.ivsize		= DES_BLOCK_SIZE,
354 		.min_keysize	= DES_KEY_SIZE,
355 		.max_keysize	= DES_KEY_SIZE,
356 	},
357 	{
358 		.flags		= QCE_ALG_3DES | QCE_MODE_ECB,
359 		.name		= "ecb(des3_ede)",
360 		.drv_name	= "ecb-3des-qce",
361 		.blocksize	= DES3_EDE_BLOCK_SIZE,
362 		.ivsize		= 0,
363 		.min_keysize	= DES3_EDE_KEY_SIZE,
364 		.max_keysize	= DES3_EDE_KEY_SIZE,
365 	},
366 	{
367 		.flags		= QCE_ALG_3DES | QCE_MODE_CBC,
368 		.name		= "cbc(des3_ede)",
369 		.drv_name	= "cbc-3des-qce",
370 		.blocksize	= DES3_EDE_BLOCK_SIZE,
371 		.ivsize		= DES3_EDE_BLOCK_SIZE,
372 		.min_keysize	= DES3_EDE_KEY_SIZE,
373 		.max_keysize	= DES3_EDE_KEY_SIZE,
374 	},
375 };
376 
377 static int qce_skcipher_register_one(const struct qce_skcipher_def *def,
378 				       struct qce_device *qce)
379 {
380 	struct qce_alg_template *tmpl;
381 	struct skcipher_alg *alg;
382 	int ret;
383 
384 	tmpl = kzalloc(sizeof(*tmpl), GFP_KERNEL);
385 	if (!tmpl)
386 		return -ENOMEM;
387 
388 	alg = &tmpl->alg.skcipher;
389 
390 	snprintf(alg->base.cra_name, CRYPTO_MAX_ALG_NAME, "%s", def->name);
391 	snprintf(alg->base.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
392 		 def->drv_name);
393 
394 	alg->base.cra_blocksize		= def->blocksize;
395 	alg->chunksize			= def->chunksize;
396 	alg->ivsize			= def->ivsize;
397 	alg->min_keysize		= def->min_keysize;
398 	alg->max_keysize		= def->max_keysize;
399 	alg->setkey			= IS_3DES(def->flags) ? qce_des3_setkey :
400 					  IS_DES(def->flags) ? qce_des_setkey :
401 					  qce_skcipher_setkey;
402 	alg->encrypt			= qce_skcipher_encrypt;
403 	alg->decrypt			= qce_skcipher_decrypt;
404 
405 	alg->base.cra_priority		= 300;
406 	alg->base.cra_flags		= CRYPTO_ALG_ASYNC |
407 					  CRYPTO_ALG_KERN_DRIVER_ONLY;
408 	alg->base.cra_ctxsize		= sizeof(struct qce_cipher_ctx);
409 	alg->base.cra_alignmask		= 0;
410 	alg->base.cra_module		= THIS_MODULE;
411 
412 	if (IS_AES(def->flags)) {
413 		alg->base.cra_flags    |= CRYPTO_ALG_NEED_FALLBACK;
414 		alg->init		= qce_skcipher_init_fallback;
415 		alg->exit		= qce_skcipher_exit;
416 	} else {
417 		alg->init		= qce_skcipher_init;
418 	}
419 
420 	INIT_LIST_HEAD(&tmpl->entry);
421 	tmpl->crypto_alg_type = CRYPTO_ALG_TYPE_SKCIPHER;
422 	tmpl->alg_flags = def->flags;
423 	tmpl->qce = qce;
424 
425 	ret = crypto_register_skcipher(alg);
426 	if (ret) {
427 		kfree(tmpl);
428 		dev_err(qce->dev, "%s registration failed\n", alg->base.cra_name);
429 		return ret;
430 	}
431 
432 	list_add_tail(&tmpl->entry, &skcipher_algs);
433 	dev_dbg(qce->dev, "%s is registered\n", alg->base.cra_name);
434 	return 0;
435 }
436 
437 static void qce_skcipher_unregister(struct qce_device *qce)
438 {
439 	struct qce_alg_template *tmpl, *n;
440 
441 	list_for_each_entry_safe(tmpl, n, &skcipher_algs, entry) {
442 		crypto_unregister_skcipher(&tmpl->alg.skcipher);
443 		list_del(&tmpl->entry);
444 		kfree(tmpl);
445 	}
446 }
447 
448 static int qce_skcipher_register(struct qce_device *qce)
449 {
450 	int ret, i;
451 
452 	for (i = 0; i < ARRAY_SIZE(skcipher_def); i++) {
453 		ret = qce_skcipher_register_one(&skcipher_def[i], qce);
454 		if (ret)
455 			goto err;
456 	}
457 
458 	return 0;
459 err:
460 	qce_skcipher_unregister(qce);
461 	return ret;
462 }
463 
464 const struct qce_algo_ops skcipher_ops = {
465 	.type = CRYPTO_ALG_TYPE_SKCIPHER,
466 	.register_algs = qce_skcipher_register,
467 	.unregister_algs = qce_skcipher_unregister,
468 	.async_req_handle = qce_skcipher_async_req_handle,
469 };
470