xref: /linux/drivers/clk/ux500/clk.h (revision 6ed7ffddcf61f668114edb676417e5fb33773b59)
1 /*
2  * Clocks for ux500 platforms
3  *
4  * Copyright (C) 2012 ST-Ericsson SA
5  * Author: Ulf Hansson <ulf.hansson@linaro.org>
6  *
7  * License terms: GNU General Public License (GPL) version 2
8  */
9 
10 #ifndef __UX500_CLK_H
11 #define __UX500_CLK_H
12 
13 #include <linux/clk.h>
14 
15 struct clk *clk_reg_prcc_pclk(const char *name,
16 			      const char *parent_name,
17 			      unsigned int phy_base,
18 			      u32 cg_sel,
19 			      unsigned long flags);
20 
21 struct clk *clk_reg_prcc_kclk(const char *name,
22 			      const char *parent_name,
23 			      unsigned int phy_base,
24 			      u32 cg_sel,
25 			      unsigned long flags);
26 
27 struct clk *clk_reg_prcmu_scalable(const char *name,
28 				   const char *parent_name,
29 				   u8 cg_sel,
30 				   unsigned long rate,
31 				   unsigned long flags);
32 
33 struct clk *clk_reg_prcmu_gate(const char *name,
34 			       const char *parent_name,
35 			       u8 cg_sel,
36 			       unsigned long flags);
37 
38 struct clk *clk_reg_prcmu_scalable_rate(const char *name,
39 					const char *parent_name,
40 					u8 cg_sel,
41 					unsigned long rate,
42 					unsigned long flags);
43 
44 struct clk *clk_reg_prcmu_rate(const char *name,
45 			       const char *parent_name,
46 			       u8 cg_sel,
47 			       unsigned long flags);
48 
49 struct clk *clk_reg_prcmu_opp_gate(const char *name,
50 				   const char *parent_name,
51 				   u8 cg_sel,
52 				   unsigned long flags);
53 
54 struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
55 					    const char *parent_name,
56 					    u8 cg_sel,
57 					    unsigned long rate,
58 					    unsigned long flags);
59 
60 #endif /* __UX500_CLK_H */
61