1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_DEFS_H 3 #define _ASM_X86_PGTABLE_DEFS_H 4 5 #include <linux/const.h> 6 #include <linux/mem_encrypt.h> 7 8 #include <asm/page_types.h> 9 10 #define _PAGE_BIT_PRESENT 0 /* is present */ 11 #define _PAGE_BIT_RW 1 /* writeable */ 12 #define _PAGE_BIT_USER 2 /* userspace addressable */ 13 #define _PAGE_BIT_PWT 3 /* page write through */ 14 #define _PAGE_BIT_PCD 4 /* page cache disabled */ 15 #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */ 16 #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */ 17 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */ 18 #define _PAGE_BIT_PAT 7 /* on 4KB pages */ 19 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */ 20 #define _PAGE_BIT_SOFTW1 9 /* available for programmer */ 21 #define _PAGE_BIT_SOFTW2 10 /* " */ 22 #define _PAGE_BIT_SOFTW3 11 /* " */ 23 #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ 24 #define _PAGE_BIT_SOFTW4 58 /* available for programmer */ 25 #define _PAGE_BIT_PKEY_BIT0 59 /* Protection Keys, bit 1/4 */ 26 #define _PAGE_BIT_PKEY_BIT1 60 /* Protection Keys, bit 2/4 */ 27 #define _PAGE_BIT_PKEY_BIT2 61 /* Protection Keys, bit 3/4 */ 28 #define _PAGE_BIT_PKEY_BIT3 62 /* Protection Keys, bit 4/4 */ 29 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ 30 31 #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1 32 #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1 33 #define _PAGE_BIT_UFFD_WP _PAGE_BIT_SOFTW2 /* userfaultfd wrprotected */ 34 #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */ 35 #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4 36 37 /* If _PAGE_BIT_PRESENT is clear, we use these: */ 38 /* - if the user mapped it with PROT_NONE; pte_present gives true */ 39 #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL 40 41 #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) 42 #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) 43 #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) 44 #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT) 45 #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD) 46 #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED) 47 #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY) 48 #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE) 49 #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL) 50 #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1) 51 #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2) 52 #define _PAGE_SOFTW3 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW3) 53 #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) 54 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) 55 #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL) 56 #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST) 57 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 58 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT0) 59 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT1) 60 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT2) 61 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT3) 62 #else 63 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 0)) 64 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 0)) 65 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0)) 66 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0)) 67 #endif 68 69 #define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \ 70 _PAGE_PKEY_BIT1 | \ 71 _PAGE_PKEY_BIT2 | \ 72 _PAGE_PKEY_BIT3) 73 74 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) 75 #define _PAGE_KNL_ERRATUM_MASK (_PAGE_DIRTY | _PAGE_ACCESSED) 76 #else 77 #define _PAGE_KNL_ERRATUM_MASK 0 78 #endif 79 80 #ifdef CONFIG_MEM_SOFT_DIRTY 81 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY) 82 #else 83 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0)) 84 #endif 85 86 /* 87 * Tracking soft dirty bit when a page goes to a swap is tricky. 88 * We need a bit which can be stored in pte _and_ not conflict 89 * with swap entry format. On x86 bits 1-4 are *not* involved 90 * into swap entry computation, but bit 7 is used for thp migration, 91 * so we borrow bit 1 for soft dirty tracking. 92 * 93 * Please note that this bit must be treated as swap dirty page 94 * mark if and only if the PTE/PMD has present bit clear! 95 */ 96 #ifdef CONFIG_MEM_SOFT_DIRTY 97 #define _PAGE_SWP_SOFT_DIRTY _PAGE_RW 98 #else 99 #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0)) 100 #endif 101 102 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 103 #define _PAGE_UFFD_WP (_AT(pteval_t, 1) << _PAGE_BIT_UFFD_WP) 104 #define _PAGE_SWP_UFFD_WP _PAGE_USER 105 #else 106 #define _PAGE_UFFD_WP (_AT(pteval_t, 0)) 107 #define _PAGE_SWP_UFFD_WP (_AT(pteval_t, 0)) 108 #endif 109 110 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) 111 #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) 112 #define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP) 113 #else 114 #define _PAGE_NX (_AT(pteval_t, 0)) 115 #define _PAGE_DEVMAP (_AT(pteval_t, 0)) 116 #endif 117 118 #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE) 119 120 /* 121 * Set of bits not changed in pte_modify. The pte's 122 * protection key is treated like _PAGE_RW, for 123 * instance, and is *not* included in this mask since 124 * pte_modify() does modify it. 125 */ 126 #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ 127 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \ 128 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP | _PAGE_ENC | \ 129 _PAGE_UFFD_WP) 130 #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE) 131 132 /* 133 * The cache modes defined here are used to translate between pure SW usage 134 * and the HW defined cache mode bits and/or PAT entries. 135 * 136 * The resulting bits for PWT, PCD and PAT should be chosen in a way 137 * to have the WB mode at index 0 (all bits clear). This is the default 138 * right now and likely would break too much if changed. 139 */ 140 #ifndef __ASSEMBLY__ 141 enum page_cache_mode { 142 _PAGE_CACHE_MODE_WB = 0, 143 _PAGE_CACHE_MODE_WC = 1, 144 _PAGE_CACHE_MODE_UC_MINUS = 2, 145 _PAGE_CACHE_MODE_UC = 3, 146 _PAGE_CACHE_MODE_WT = 4, 147 _PAGE_CACHE_MODE_WP = 5, 148 149 _PAGE_CACHE_MODE_NUM = 8 150 }; 151 #endif 152 153 #define _PAGE_ENC (_AT(pteval_t, sme_me_mask)) 154 155 #define _PAGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT) 156 #define _PAGE_LARGE_CACHE_MASK (_PAGE_PWT | _PAGE_PCD | _PAGE_PAT_LARGE) 157 158 #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC)) 159 #define _PAGE_CACHE_WP (cachemode2protval(_PAGE_CACHE_MODE_WP)) 160 161 #define __PP _PAGE_PRESENT 162 #define __RW _PAGE_RW 163 #define _USR _PAGE_USER 164 #define ___A _PAGE_ACCESSED 165 #define ___D _PAGE_DIRTY 166 #define ___G _PAGE_GLOBAL 167 #define __NX _PAGE_NX 168 169 #define _ENC _PAGE_ENC 170 #define __WP _PAGE_CACHE_WP 171 #define __NC _PAGE_NOCACHE 172 #define _PSE _PAGE_PSE 173 174 #define pgprot_val(x) ((x).pgprot) 175 #define __pgprot(x) ((pgprot_t) { (x) } ) 176 #define __pg(x) __pgprot(x) 177 178 #define PAGE_NONE __pg( 0| 0| 0|___A| 0| 0| 0|___G) 179 #define PAGE_SHARED __pg(__PP|__RW|_USR|___A|__NX| 0| 0| 0) 180 #define PAGE_SHARED_EXEC __pg(__PP|__RW|_USR|___A| 0| 0| 0| 0) 181 #define PAGE_COPY_NOEXEC __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0) 182 #define PAGE_COPY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0) 183 #define PAGE_COPY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0) 184 #define PAGE_READONLY __pg(__PP| 0|_USR|___A|__NX| 0| 0| 0) 185 #define PAGE_READONLY_EXEC __pg(__PP| 0|_USR|___A| 0| 0| 0| 0) 186 187 #define __PAGE_KERNEL (__PP|__RW| 0|___A|__NX|___D| 0|___G) 188 #define __PAGE_KERNEL_EXEC (__PP|__RW| 0|___A| 0|___D| 0|___G) 189 #define _KERNPG_TABLE_NOENC (__PP|__RW| 0|___A| 0|___D| 0| 0) 190 #define _KERNPG_TABLE (__PP|__RW| 0|___A| 0|___D| 0| 0| _ENC) 191 #define _PAGE_TABLE_NOENC (__PP|__RW|_USR|___A| 0|___D| 0| 0) 192 #define _PAGE_TABLE (__PP|__RW|_USR|___A| 0|___D| 0| 0| _ENC) 193 #define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G) 194 #define __PAGE_KERNEL_ROX (__PP| 0| 0|___A| 0|___D| 0|___G) 195 #define __PAGE_KERNEL_NOCACHE (__PP|__RW| 0|___A|__NX|___D| 0|___G| __NC) 196 #define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G) 197 #define __PAGE_KERNEL_LARGE (__PP|__RW| 0|___A|__NX|___D|_PSE|___G) 198 #define __PAGE_KERNEL_LARGE_EXEC (__PP|__RW| 0|___A| 0|___D|_PSE|___G) 199 #define __PAGE_KERNEL_WP (__PP|__RW| 0|___A|__NX|___D| 0|___G| __WP) 200 201 202 #define __PAGE_KERNEL_IO __PAGE_KERNEL 203 #define __PAGE_KERNEL_IO_NOCACHE __PAGE_KERNEL_NOCACHE 204 205 206 #ifndef __ASSEMBLY__ 207 208 #define __PAGE_KERNEL_ENC (__PAGE_KERNEL | _ENC) 209 #define __PAGE_KERNEL_ENC_WP (__PAGE_KERNEL_WP | _ENC) 210 #define __PAGE_KERNEL_NOENC (__PAGE_KERNEL | 0) 211 #define __PAGE_KERNEL_NOENC_WP (__PAGE_KERNEL_WP | 0) 212 213 #define __pgprot_mask(x) __pgprot((x) & __default_kernel_pte_mask) 214 215 #define PAGE_KERNEL __pgprot_mask(__PAGE_KERNEL | _ENC) 216 #define PAGE_KERNEL_NOENC __pgprot_mask(__PAGE_KERNEL | 0) 217 #define PAGE_KERNEL_RO __pgprot_mask(__PAGE_KERNEL_RO | _ENC) 218 #define PAGE_KERNEL_EXEC __pgprot_mask(__PAGE_KERNEL_EXEC | _ENC) 219 #define PAGE_KERNEL_EXEC_NOENC __pgprot_mask(__PAGE_KERNEL_EXEC | 0) 220 #define PAGE_KERNEL_ROX __pgprot_mask(__PAGE_KERNEL_ROX | _ENC) 221 #define PAGE_KERNEL_NOCACHE __pgprot_mask(__PAGE_KERNEL_NOCACHE | _ENC) 222 #define PAGE_KERNEL_LARGE __pgprot_mask(__PAGE_KERNEL_LARGE | _ENC) 223 #define PAGE_KERNEL_LARGE_EXEC __pgprot_mask(__PAGE_KERNEL_LARGE_EXEC | _ENC) 224 #define PAGE_KERNEL_VVAR __pgprot_mask(__PAGE_KERNEL_VVAR | _ENC) 225 226 #define PAGE_KERNEL_IO __pgprot_mask(__PAGE_KERNEL_IO) 227 #define PAGE_KERNEL_IO_NOCACHE __pgprot_mask(__PAGE_KERNEL_IO_NOCACHE) 228 229 #endif /* __ASSEMBLY__ */ 230 231 /* xwr */ 232 #define __P000 PAGE_NONE 233 #define __P001 PAGE_READONLY 234 #define __P010 PAGE_COPY 235 #define __P011 PAGE_COPY 236 #define __P100 PAGE_READONLY_EXEC 237 #define __P101 PAGE_READONLY_EXEC 238 #define __P110 PAGE_COPY_EXEC 239 #define __P111 PAGE_COPY_EXEC 240 241 #define __S000 PAGE_NONE 242 #define __S001 PAGE_READONLY 243 #define __S010 PAGE_SHARED 244 #define __S011 PAGE_SHARED 245 #define __S100 PAGE_READONLY_EXEC 246 #define __S101 PAGE_READONLY_EXEC 247 #define __S110 PAGE_SHARED_EXEC 248 #define __S111 PAGE_SHARED_EXEC 249 250 /* 251 * early identity mapping pte attrib macros. 252 */ 253 #ifdef CONFIG_X86_64 254 #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC 255 #else 256 #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */ 257 #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */ 258 #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */ 259 #endif 260 261 #ifdef CONFIG_X86_32 262 # include <asm/pgtable_32_types.h> 263 #else 264 # include <asm/pgtable_64_types.h> 265 #endif 266 267 #ifndef __ASSEMBLY__ 268 269 #include <linux/types.h> 270 271 /* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */ 272 #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK) 273 274 /* 275 * Extracts the flags from a (pte|pmd|pud|pgd)val_t 276 * This includes the protection key value. 277 */ 278 #define PTE_FLAGS_MASK (~PTE_PFN_MASK) 279 280 typedef struct pgprot { pgprotval_t pgprot; } pgprot_t; 281 282 typedef struct { pgdval_t pgd; } pgd_t; 283 284 static inline pgprot_t pgprot_nx(pgprot_t prot) 285 { 286 return __pgprot(pgprot_val(prot) | _PAGE_NX); 287 } 288 #define pgprot_nx pgprot_nx 289 290 #ifdef CONFIG_X86_PAE 291 292 /* 293 * PHYSICAL_PAGE_MASK might be non-constant when SME is compiled in, so we can't 294 * use it here. 295 */ 296 297 #define PGD_PAE_PAGE_MASK ((signed long)PAGE_MASK) 298 #define PGD_PAE_PHYS_MASK (((1ULL << __PHYSICAL_MASK_SHIFT)-1) & PGD_PAE_PAGE_MASK) 299 300 /* 301 * PAE allows Base Address, P, PWT, PCD and AVL bits to be set in PGD entries. 302 * All other bits are Reserved MBZ 303 */ 304 #define PGD_ALLOWED_BITS (PGD_PAE_PHYS_MASK | _PAGE_PRESENT | \ 305 _PAGE_PWT | _PAGE_PCD | \ 306 _PAGE_SOFTW1 | _PAGE_SOFTW2 | _PAGE_SOFTW3) 307 308 #else 309 /* No need to mask any bits for !PAE */ 310 #define PGD_ALLOWED_BITS (~0ULL) 311 #endif 312 313 static inline pgd_t native_make_pgd(pgdval_t val) 314 { 315 return (pgd_t) { val & PGD_ALLOWED_BITS }; 316 } 317 318 static inline pgdval_t native_pgd_val(pgd_t pgd) 319 { 320 return pgd.pgd & PGD_ALLOWED_BITS; 321 } 322 323 static inline pgdval_t pgd_flags(pgd_t pgd) 324 { 325 return native_pgd_val(pgd) & PTE_FLAGS_MASK; 326 } 327 328 #if CONFIG_PGTABLE_LEVELS > 4 329 typedef struct { p4dval_t p4d; } p4d_t; 330 331 static inline p4d_t native_make_p4d(pudval_t val) 332 { 333 return (p4d_t) { val }; 334 } 335 336 static inline p4dval_t native_p4d_val(p4d_t p4d) 337 { 338 return p4d.p4d; 339 } 340 #else 341 #include <asm-generic/pgtable-nop4d.h> 342 343 static inline p4d_t native_make_p4d(pudval_t val) 344 { 345 return (p4d_t) { .pgd = native_make_pgd((pgdval_t)val) }; 346 } 347 348 static inline p4dval_t native_p4d_val(p4d_t p4d) 349 { 350 return native_pgd_val(p4d.pgd); 351 } 352 #endif 353 354 #if CONFIG_PGTABLE_LEVELS > 3 355 typedef struct { pudval_t pud; } pud_t; 356 357 static inline pud_t native_make_pud(pmdval_t val) 358 { 359 return (pud_t) { val }; 360 } 361 362 static inline pudval_t native_pud_val(pud_t pud) 363 { 364 return pud.pud; 365 } 366 #else 367 #include <asm-generic/pgtable-nopud.h> 368 369 static inline pud_t native_make_pud(pudval_t val) 370 { 371 return (pud_t) { .p4d.pgd = native_make_pgd(val) }; 372 } 373 374 static inline pudval_t native_pud_val(pud_t pud) 375 { 376 return native_pgd_val(pud.p4d.pgd); 377 } 378 #endif 379 380 #if CONFIG_PGTABLE_LEVELS > 2 381 typedef struct { pmdval_t pmd; } pmd_t; 382 383 static inline pmd_t native_make_pmd(pmdval_t val) 384 { 385 return (pmd_t) { val }; 386 } 387 388 static inline pmdval_t native_pmd_val(pmd_t pmd) 389 { 390 return pmd.pmd; 391 } 392 #else 393 #include <asm-generic/pgtable-nopmd.h> 394 395 static inline pmd_t native_make_pmd(pmdval_t val) 396 { 397 return (pmd_t) { .pud.p4d.pgd = native_make_pgd(val) }; 398 } 399 400 static inline pmdval_t native_pmd_val(pmd_t pmd) 401 { 402 return native_pgd_val(pmd.pud.p4d.pgd); 403 } 404 #endif 405 406 static inline p4dval_t p4d_pfn_mask(p4d_t p4d) 407 { 408 /* No 512 GiB huge pages yet */ 409 return PTE_PFN_MASK; 410 } 411 412 static inline p4dval_t p4d_flags_mask(p4d_t p4d) 413 { 414 return ~p4d_pfn_mask(p4d); 415 } 416 417 static inline p4dval_t p4d_flags(p4d_t p4d) 418 { 419 return native_p4d_val(p4d) & p4d_flags_mask(p4d); 420 } 421 422 static inline pudval_t pud_pfn_mask(pud_t pud) 423 { 424 if (native_pud_val(pud) & _PAGE_PSE) 425 return PHYSICAL_PUD_PAGE_MASK; 426 else 427 return PTE_PFN_MASK; 428 } 429 430 static inline pudval_t pud_flags_mask(pud_t pud) 431 { 432 return ~pud_pfn_mask(pud); 433 } 434 435 static inline pudval_t pud_flags(pud_t pud) 436 { 437 return native_pud_val(pud) & pud_flags_mask(pud); 438 } 439 440 static inline pmdval_t pmd_pfn_mask(pmd_t pmd) 441 { 442 if (native_pmd_val(pmd) & _PAGE_PSE) 443 return PHYSICAL_PMD_PAGE_MASK; 444 else 445 return PTE_PFN_MASK; 446 } 447 448 static inline pmdval_t pmd_flags_mask(pmd_t pmd) 449 { 450 return ~pmd_pfn_mask(pmd); 451 } 452 453 static inline pmdval_t pmd_flags(pmd_t pmd) 454 { 455 return native_pmd_val(pmd) & pmd_flags_mask(pmd); 456 } 457 458 static inline pte_t native_make_pte(pteval_t val) 459 { 460 return (pte_t) { .pte = val }; 461 } 462 463 static inline pteval_t native_pte_val(pte_t pte) 464 { 465 return pte.pte; 466 } 467 468 static inline pteval_t pte_flags(pte_t pte) 469 { 470 return native_pte_val(pte) & PTE_FLAGS_MASK; 471 } 472 473 #define __pte2cm_idx(cb) \ 474 ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \ 475 (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \ 476 (((cb) >> _PAGE_BIT_PWT) & 1)) 477 #define __cm_idx2pte(i) \ 478 ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \ 479 (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \ 480 (((i) & 1) << _PAGE_BIT_PWT)) 481 482 unsigned long cachemode2protval(enum page_cache_mode pcm); 483 484 static inline pgprotval_t protval_4k_2_large(pgprotval_t val) 485 { 486 return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) | 487 ((val & _PAGE_PAT) << (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT)); 488 } 489 static inline pgprot_t pgprot_4k_2_large(pgprot_t pgprot) 490 { 491 return __pgprot(protval_4k_2_large(pgprot_val(pgprot))); 492 } 493 static inline pgprotval_t protval_large_2_4k(pgprotval_t val) 494 { 495 return (val & ~(_PAGE_PAT | _PAGE_PAT_LARGE)) | 496 ((val & _PAGE_PAT_LARGE) >> 497 (_PAGE_BIT_PAT_LARGE - _PAGE_BIT_PAT)); 498 } 499 static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot) 500 { 501 return __pgprot(protval_large_2_4k(pgprot_val(pgprot))); 502 } 503 504 505 typedef struct page *pgtable_t; 506 507 extern pteval_t __supported_pte_mask; 508 extern pteval_t __default_kernel_pte_mask; 509 extern void set_nx(void); 510 extern int nx_enabled; 511 512 #define pgprot_writecombine pgprot_writecombine 513 extern pgprot_t pgprot_writecombine(pgprot_t prot); 514 515 #define pgprot_writethrough pgprot_writethrough 516 extern pgprot_t pgprot_writethrough(pgprot_t prot); 517 518 /* Indicate that x86 has its own track and untrack pfn vma functions */ 519 #define __HAVE_PFNMAP_TRACKING 520 521 #define __HAVE_PHYS_MEM_ACCESS_PROT 522 struct file; 523 pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, 524 unsigned long size, pgprot_t vma_prot); 525 526 /* Install a pte for a particular vaddr in kernel space. */ 527 void set_pte_vaddr(unsigned long vaddr, pte_t pte); 528 529 #ifdef CONFIG_X86_32 530 extern void native_pagetable_init(void); 531 #else 532 #define native_pagetable_init paging_init 533 #endif 534 535 struct seq_file; 536 extern void arch_report_meminfo(struct seq_file *m); 537 538 enum pg_level { 539 PG_LEVEL_NONE, 540 PG_LEVEL_4K, 541 PG_LEVEL_2M, 542 PG_LEVEL_1G, 543 PG_LEVEL_512G, 544 PG_LEVEL_NUM 545 }; 546 547 #ifdef CONFIG_PROC_FS 548 extern void update_page_count(int level, unsigned long pages); 549 #else 550 static inline void update_page_count(int level, unsigned long pages) { } 551 #endif 552 553 /* 554 * Helper function that returns the kernel pagetable entry controlling 555 * the virtual address 'address'. NULL means no pagetable entry present. 556 * NOTE: the return type is pte_t but if the pmd is PSE then we return it 557 * as a pte too. 558 */ 559 extern pte_t *lookup_address(unsigned long address, unsigned int *level); 560 extern pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, 561 unsigned int *level); 562 563 struct mm_struct; 564 extern pte_t *lookup_address_in_mm(struct mm_struct *mm, unsigned long address, 565 unsigned int *level); 566 extern pmd_t *lookup_pmd_address(unsigned long address); 567 extern phys_addr_t slow_virt_to_phys(void *__address); 568 extern int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, 569 unsigned long address, 570 unsigned numpages, 571 unsigned long page_flags); 572 extern int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address, 573 unsigned long numpages); 574 #endif /* !__ASSEMBLY__ */ 575 576 #endif /* _ASM_X86_PGTABLE_DEFS_H */ 577