xref: /linux/arch/powerpc/platforms/Kconfig (revision e9fb13bfec7e017130ddc5c1b5466340470f4900)
1menu "Platform support"
2
3source "arch/powerpc/platforms/pseries/Kconfig"
4source "arch/powerpc/platforms/iseries/Kconfig"
5source "arch/powerpc/platforms/chrp/Kconfig"
6source "arch/powerpc/platforms/512x/Kconfig"
7source "arch/powerpc/platforms/52xx/Kconfig"
8source "arch/powerpc/platforms/powermac/Kconfig"
9source "arch/powerpc/platforms/prep/Kconfig"
10source "arch/powerpc/platforms/maple/Kconfig"
11source "arch/powerpc/platforms/pasemi/Kconfig"
12source "arch/powerpc/platforms/ps3/Kconfig"
13source "arch/powerpc/platforms/cell/Kconfig"
14source "arch/powerpc/platforms/8xx/Kconfig"
15source "arch/powerpc/platforms/82xx/Kconfig"
16source "arch/powerpc/platforms/83xx/Kconfig"
17source "arch/powerpc/platforms/85xx/Kconfig"
18source "arch/powerpc/platforms/86xx/Kconfig"
19source "arch/powerpc/platforms/embedded6xx/Kconfig"
20source "arch/powerpc/platforms/44x/Kconfig"
21source "arch/powerpc/platforms/40x/Kconfig"
22source "arch/powerpc/platforms/amigaone/Kconfig"
23
24config KVM_GUEST
25	bool "KVM Guest support"
26	default y
27	---help---
28	  This option enables various optimizations for running under the KVM
29	  hypervisor. Overhead for the kernel when not running inside KVM should
30	  be minimal.
31
32	  In case of doubt, say Y
33
34config PPC_NATIVE
35	bool
36	depends on 6xx || PPC64
37	help
38	  Support for running natively on the hardware, i.e. without
39	  a hypervisor. This option is not user-selectable but should
40	  be selected by all platforms that need it.
41
42config PPC_OF_BOOT_TRAMPOLINE
43	bool "Support booting from Open Firmware or yaboot"
44	depends on 6xx || PPC64
45	default y
46	help
47	  Support from booting from Open Firmware or yaboot using an
48	  Open Firmware client interface. This enables the kernel to
49	  communicate with open firmware to retrieve system information
50	  such as the device tree.
51
52	  In case of doubt, say Y
53
54config UDBG_RTAS_CONSOLE
55	bool "RTAS based debug console"
56	depends on PPC_RTAS
57	default n
58
59config PPC_UDBG_BEAT
60	bool "BEAT based debug console"
61	depends on PPC_CELLEB
62	default n
63
64config XICS
65	depends on PPC_PSERIES
66	bool
67	default y
68
69config IPIC
70	bool
71	default n
72
73config MPIC
74	bool
75	default n
76
77config MPIC_WEIRD
78	bool
79	default n
80
81config PPC_I8259
82	bool
83	default n
84
85config U3_DART
86	bool
87	depends on PPC64
88	default n
89
90config PPC_RTAS
91	bool
92	default n
93
94config RTAS_ERROR_LOGGING
95	bool
96	depends on PPC_RTAS
97	default n
98
99config PPC_RTAS_DAEMON
100	bool
101	depends on PPC_RTAS
102	default n
103
104config RTAS_PROC
105	bool "Proc interface to RTAS"
106	depends on PPC_RTAS
107	default y
108
109config RTAS_FLASH
110	tristate "Firmware flash interface"
111	depends on PPC64 && RTAS_PROC
112
113config MMIO_NVRAM
114	bool
115	default n
116
117config MPIC_U3_HT_IRQS
118	bool
119	default n
120
121config MPIC_BROKEN_REGREAD
122	bool
123	depends on MPIC
124	help
125	  This option enables a MPIC driver workaround for some chips
126	  that have a bug that causes some interrupt source information
127	  to not read back properly. It is safe to use on other chips as
128	  well, but enabling it uses about 8KB of memory to keep copies
129	  of the register contents in software.
130
131config IBMVIO
132	depends on PPC_PSERIES || PPC_ISERIES
133	bool
134	default y
135
136config IBMEBUS
137	depends on PPC_PSERIES
138	bool "Support for GX bus based adapters"
139	help
140	  Bus device driver for GX bus based adapters.
141
142config PPC_MPC106
143	bool
144	default n
145
146config PPC_970_NAP
147	bool
148	default n
149
150config PPC_INDIRECT_IO
151	bool
152	select GENERIC_IOMAP
153	default n
154
155config GENERIC_IOMAP
156	bool
157	default n
158
159source "drivers/cpufreq/Kconfig"
160
161menu "CPU Frequency drivers"
162	depends on CPU_FREQ
163
164config CPU_FREQ_PMAC
165	bool "Support for Apple PowerBooks"
166	depends on ADB_PMU && PPC32
167	select CPU_FREQ_TABLE
168	help
169	  This adds support for frequency switching on Apple PowerBooks,
170	  this currently includes some models of iBook & Titanium
171	  PowerBook.
172
173config CPU_FREQ_PMAC64
174	bool "Support for some Apple G5s"
175	depends on PPC_PMAC && PPC64
176	select CPU_FREQ_TABLE
177	help
178	  This adds support for frequency switching on Apple iMac G5,
179	  and some of the more recent desktop G5 machines as well.
180
181config PPC_PASEMI_CPUFREQ
182	bool "Support for PA Semi PWRficient"
183	depends on PPC_PASEMI
184	default y
185	select CPU_FREQ_TABLE
186	help
187	  This adds the support for frequency switching on PA Semi
188	  PWRficient processors.
189
190endmenu
191
192config PPC601_SYNC_FIX
193	bool "Workarounds for PPC601 bugs"
194	depends on 6xx && (PPC_PREP || PPC_PMAC)
195	help
196	  Some versions of the PPC601 (the first PowerPC chip) have bugs which
197	  mean that extra synchronization instructions are required near
198	  certain instructions, typically those that make major changes to the
199	  CPU state.  These extra instructions reduce performance slightly.
200	  If you say N here, these extra instructions will not be included,
201	  resulting in a kernel which will run faster but may not run at all
202	  on some systems with the PPC601 chip.
203
204	  If in doubt, say Y here.
205
206config TAU
207	bool "On-chip CPU temperature sensor support"
208	depends on 6xx
209	help
210	  G3 and G4 processors have an on-chip temperature sensor called the
211	  'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
212	  temperature within 2-4 degrees Celsius. This option shows the current
213	  on-die temperature in /proc/cpuinfo if the cpu supports it.
214
215	  Unfortunately, on some chip revisions, this sensor is very inaccurate
216	  and in many cases, does not work at all, so don't assume the cpu
217	  temp is actually what /proc/cpuinfo says it is.
218
219config TAU_INT
220	bool "Interrupt driven TAU driver (DANGEROUS)"
221	depends on TAU
222	---help---
223	  The TAU supports an interrupt driven mode which causes an interrupt
224	  whenever the temperature goes out of range. This is the fastest way
225	  to get notified the temp has exceeded a range. With this option off,
226	  a timer is used to re-check the temperature periodically.
227
228	  However, on some cpus it appears that the TAU interrupt hardware
229	  is buggy and can cause a situation which would lead unexplained hard
230	  lockups.
231
232	  Unless you are extending the TAU driver, or enjoy kernel/hardware
233	  debugging, leave this option off.
234
235config TAU_AVERAGE
236	bool "Average high and low temp"
237	depends on TAU
238	---help---
239	  The TAU hardware can compare the temperature to an upper and lower
240	  bound.  The default behavior is to show both the upper and lower
241	  bound in /proc/cpuinfo. If the range is large, the temperature is
242	  either changing a lot, or the TAU hardware is broken (likely on some
243	  G4's). If the range is small (around 4 degrees), the temperature is
244	  relatively stable.  If you say Y here, a single temperature value,
245	  halfway between the upper and lower bounds, will be reported in
246	  /proc/cpuinfo.
247
248	  If in doubt, say N here.
249
250config QUICC_ENGINE
251	bool "Freescale QUICC Engine (QE) Support"
252	depends on FSL_SOC
253	select PPC_LIB_RHEAP
254	select CRC32
255	help
256	  The QUICC Engine (QE) is a new generation of communications
257	  coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
258	  Selecting this option means that you wish to build a kernel
259	  for a machine with a QE coprocessor.
260
261config QE_GPIO
262	bool "QE GPIO support"
263	depends on QUICC_ENGINE
264	select GENERIC_GPIO
265	select ARCH_REQUIRE_GPIOLIB
266	help
267	  Say Y here if you're going to use hardware that connects to the
268	  QE GPIOs.
269
270config CPM2
271	bool "Enable support for the CPM2 (Communications Processor Module)"
272	depends on (FSL_SOC_BOOKE && PPC32) || 8260
273	select CPM
274	select PPC_LIB_RHEAP
275	select PPC_PCI_CHOICE
276	select ARCH_REQUIRE_GPIOLIB
277	select GENERIC_GPIO
278	help
279	  The CPM2 (Communications Processor Module) is a coprocessor on
280	  embedded CPUs made by Freescale.  Selecting this option means that
281	  you wish to build a kernel for a machine with a CPM2 coprocessor
282	  on it (826x, 827x, 8560).
283
284config AXON_RAM
285	tristate "Axon DDR2 memory device driver"
286	depends on PPC_IBM_CELL_BLADE && BLOCK
287	default m
288	help
289	  It registers one block device per Axon's DDR2 memory bank found
290	  on a system. Block devices are called axonram?, their major and
291	  minor numbers are available in /proc/devices, /proc/partitions or
292	  in /sys/block/axonram?/dev.
293
294config FSL_ULI1575
295	bool
296	default n
297	select GENERIC_ISA_DMA
298	help
299	  Supports for the ULI1575 PCIe south bridge that exists on some
300	  Freescale reference boards. The boards all use the ULI in pretty
301	  much the same way.
302
303config CPM
304	bool
305	select PPC_CLOCK
306
307config OF_RTC
308	bool
309	help
310	  Uses information from the OF or flattened device tree to instantiate
311	  platform devices for direct mapped RTC chips like the DS1742 or DS1743.
312
313source "arch/powerpc/sysdev/bestcomm/Kconfig"
314
315config MPC8xxx_GPIO
316	bool "MPC512x/MPC8xxx GPIO support"
317	depends on PPC_MPC512x || PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || \
318		   FSL_SOC_BOOKE || PPC_86xx
319	select GENERIC_GPIO
320	select ARCH_REQUIRE_GPIOLIB
321	help
322	  Say Y here if you're going to use hardware that connects to the
323	  MPC512x/831x/834x/837x/8572/8610 GPIOs.
324
325config SIMPLE_GPIO
326	bool "Support for simple, memory-mapped GPIO controllers"
327	depends on PPC
328	select GENERIC_GPIO
329	select ARCH_REQUIRE_GPIOLIB
330	help
331	  Say Y here to support simple, memory-mapped GPIO controllers.
332	  These are usually BCSRs used to control board's switches, LEDs,
333	  chip-selects, Ethernet/USB PHY's power and various other small
334	  on-board peripherals.
335
336config MCU_MPC8349EMITX
337	tristate "MPC8349E-mITX MCU driver"
338	depends on I2C && PPC_83xx
339	select GENERIC_GPIO
340	select ARCH_REQUIRE_GPIOLIB
341	help
342	  Say Y here to enable soft power-off functionality on the Freescale
343	  boards with the MPC8349E-mITX-compatible MCU chips. This driver will
344	  also register MCU GPIOs with the generic GPIO API, so you'll able
345	  to use MCU pins as GPIOs.
346
347config XILINX_PCI
348	bool "Xilinx PCI host bridge support"
349	depends on PCI && XILINX_VIRTEX
350
351endmenu
352