1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 Waldorf GMBH 7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle 8 * Copyright (C) 1996 Paul M. Antoine 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 10 */ 11 #ifndef _ASM_PROCESSOR_H 12 #define _ASM_PROCESSOR_H 13 14 #include <linux/cpumask.h> 15 #include <linux/threads.h> 16 17 #include <asm/cachectl.h> 18 #include <asm/cpu.h> 19 #include <asm/cpu-info.h> 20 #include <asm/mipsregs.h> 21 #include <asm/prefetch.h> 22 #include <asm/system.h> 23 24 /* 25 * Return current * instruction pointer ("program counter"). 26 */ 27 #define current_text_addr() ({ __label__ _l; _l: &&_l;}) 28 29 /* 30 * System setup and hardware flags.. 31 */ 32 extern void (*cpu_wait)(void); 33 34 extern unsigned int vced_count, vcei_count; 35 36 /* 37 * MIPS does have an arch_pick_mmap_layout() 38 */ 39 #define HAVE_ARCH_PICK_MMAP_LAYOUT 1 40 41 /* 42 * A special page (the vdso) is mapped into all processes at the very 43 * top of the virtual memory space. 44 */ 45 #define SPECIAL_PAGES_SIZE PAGE_SIZE 46 47 #ifdef CONFIG_32BIT 48 /* 49 * User space process size: 2GB. This is hardcoded into a few places, 50 * so don't change it unless you know what you are doing. 51 */ 52 #define TASK_SIZE 0x7fff8000UL 53 #define STACK_TOP ((TASK_SIZE & PAGE_MASK) - SPECIAL_PAGES_SIZE) 54 55 /* 56 * This decides where the kernel will search for a free chunk of vm 57 * space during mmap's. 58 */ 59 #define TASK_UNMAPPED_BASE ((TASK_SIZE / 3) & ~(PAGE_SIZE)) 60 61 #define TASK_IS_32BIT_ADDR 1 62 63 #endif 64 65 #ifdef CONFIG_64BIT 66 /* 67 * User space process size: 1TB. This is hardcoded into a few places, 68 * so don't change it unless you know what you are doing. TASK_SIZE 69 * is limited to 1TB by the R4000 architecture; R10000 and better can 70 * support 16TB; the architectural reserve for future expansion is 71 * 8192EB ... 72 */ 73 #define TASK_SIZE32 0x7fff8000UL 74 #define TASK_SIZE 0x10000000000UL 75 #define STACK_TOP \ 76 (((test_thread_flag(TIF_32BIT_ADDR) ? \ 77 TASK_SIZE32 : TASK_SIZE) & PAGE_MASK) - SPECIAL_PAGES_SIZE) 78 79 /* 80 * This decides where the kernel will search for a free chunk of vm 81 * space during mmap's. 82 */ 83 #define TASK_UNMAPPED_BASE \ 84 (test_thread_flag(TIF_32BIT_ADDR) ? \ 85 PAGE_ALIGN(TASK_SIZE32 / 3) : PAGE_ALIGN(TASK_SIZE / 3)) 86 #define TASK_SIZE_OF(tsk) \ 87 (test_tsk_thread_flag(tsk, TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE) 88 89 #define TASK_IS_32BIT_ADDR test_thread_flag(TIF_32BIT_ADDR) 90 91 #endif 92 93 #ifdef __KERNEL__ 94 #define STACK_TOP_MAX TASK_SIZE 95 #endif 96 97 #define NUM_FPU_REGS 32 98 99 typedef __u64 fpureg_t; 100 101 /* 102 * It would be nice to add some more fields for emulator statistics, but there 103 * are a number of fixed offsets in offset.h and elsewhere that would have to 104 * be recalculated by hand. So the additional information will be private to 105 * the FPU emulator for now. See asm-mips/fpu_emulator.h. 106 */ 107 108 struct mips_fpu_struct { 109 fpureg_t fpr[NUM_FPU_REGS]; 110 unsigned int fcr31; 111 }; 112 113 #define NUM_DSP_REGS 6 114 115 typedef __u32 dspreg_t; 116 117 struct mips_dsp_state { 118 dspreg_t dspr[NUM_DSP_REGS]; 119 unsigned int dspcontrol; 120 }; 121 122 #define INIT_CPUMASK { \ 123 {0,} \ 124 } 125 126 struct mips3264_watch_reg_state { 127 /* The width of watchlo is 32 in a 32 bit kernel and 64 in a 128 64 bit kernel. We use unsigned long as it has the same 129 property. */ 130 unsigned long watchlo[NUM_WATCH_REGS]; 131 /* Only the mask and IRW bits from watchhi. */ 132 u16 watchhi[NUM_WATCH_REGS]; 133 }; 134 135 union mips_watch_reg_state { 136 struct mips3264_watch_reg_state mips3264; 137 }; 138 139 #ifdef CONFIG_CPU_CAVIUM_OCTEON 140 141 struct octeon_cop2_state { 142 /* DMFC2 rt, 0x0201 */ 143 unsigned long cop2_crc_iv; 144 /* DMFC2 rt, 0x0202 (Set with DMTC2 rt, 0x1202) */ 145 unsigned long cop2_crc_length; 146 /* DMFC2 rt, 0x0200 (set with DMTC2 rt, 0x4200) */ 147 unsigned long cop2_crc_poly; 148 /* DMFC2 rt, 0x0402; DMFC2 rt, 0x040A */ 149 unsigned long cop2_llm_dat[2]; 150 /* DMFC2 rt, 0x0084 */ 151 unsigned long cop2_3des_iv; 152 /* DMFC2 rt, 0x0080; DMFC2 rt, 0x0081; DMFC2 rt, 0x0082 */ 153 unsigned long cop2_3des_key[3]; 154 /* DMFC2 rt, 0x0088 (Set with DMTC2 rt, 0x0098) */ 155 unsigned long cop2_3des_result; 156 /* DMFC2 rt, 0x0111 (FIXME: Read Pass1 Errata) */ 157 unsigned long cop2_aes_inp0; 158 /* DMFC2 rt, 0x0102; DMFC2 rt, 0x0103 */ 159 unsigned long cop2_aes_iv[2]; 160 /* DMFC2 rt, 0x0104; DMFC2 rt, 0x0105; DMFC2 rt, 0x0106; DMFC2 161 * rt, 0x0107 */ 162 unsigned long cop2_aes_key[4]; 163 /* DMFC2 rt, 0x0110 */ 164 unsigned long cop2_aes_keylen; 165 /* DMFC2 rt, 0x0100; DMFC2 rt, 0x0101 */ 166 unsigned long cop2_aes_result[2]; 167 /* DMFC2 rt, 0x0240; DMFC2 rt, 0x0241; DMFC2 rt, 0x0242; DMFC2 168 * rt, 0x0243; DMFC2 rt, 0x0244; DMFC2 rt, 0x0245; DMFC2 rt, 169 * 0x0246; DMFC2 rt, 0x0247; DMFC2 rt, 0x0248; DMFC2 rt, 170 * 0x0249; DMFC2 rt, 0x024A; DMFC2 rt, 0x024B; DMFC2 rt, 171 * 0x024C; DMFC2 rt, 0x024D; DMFC2 rt, 0x024E - Pass2 */ 172 unsigned long cop2_hsh_datw[15]; 173 /* DMFC2 rt, 0x0250; DMFC2 rt, 0x0251; DMFC2 rt, 0x0252; DMFC2 174 * rt, 0x0253; DMFC2 rt, 0x0254; DMFC2 rt, 0x0255; DMFC2 rt, 175 * 0x0256; DMFC2 rt, 0x0257 - Pass2 */ 176 unsigned long cop2_hsh_ivw[8]; 177 /* DMFC2 rt, 0x0258; DMFC2 rt, 0x0259 - Pass2 */ 178 unsigned long cop2_gfm_mult[2]; 179 /* DMFC2 rt, 0x025E - Pass2 */ 180 unsigned long cop2_gfm_poly; 181 /* DMFC2 rt, 0x025A; DMFC2 rt, 0x025B - Pass2 */ 182 unsigned long cop2_gfm_result[2]; 183 }; 184 #define INIT_OCTEON_COP2 {0,} 185 186 struct octeon_cvmseg_state { 187 unsigned long cvmseg[CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE] 188 [cpu_dcache_line_size() / sizeof(unsigned long)]; 189 }; 190 191 #endif 192 193 typedef struct { 194 unsigned long seg; 195 } mm_segment_t; 196 197 #define ARCH_MIN_TASKALIGN 8 198 199 struct mips_abi; 200 201 /* 202 * If you change thread_struct remember to change the #defines below too! 203 */ 204 struct thread_struct { 205 /* Saved main processor registers. */ 206 unsigned long reg16; 207 unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; 208 unsigned long reg29, reg30, reg31; 209 210 /* Saved cp0 stuff. */ 211 unsigned long cp0_status; 212 213 /* Saved fpu/fpu emulator stuff. */ 214 struct mips_fpu_struct fpu; 215 #ifdef CONFIG_MIPS_MT_FPAFF 216 /* Emulated instruction count */ 217 unsigned long emulated_fp; 218 /* Saved per-thread scheduler affinity mask */ 219 cpumask_t user_cpus_allowed; 220 #endif /* CONFIG_MIPS_MT_FPAFF */ 221 222 /* Saved state of the DSP ASE, if available. */ 223 struct mips_dsp_state dsp; 224 225 /* Saved watch register state, if available. */ 226 union mips_watch_reg_state watch; 227 228 /* Other stuff associated with the thread. */ 229 unsigned long cp0_badvaddr; /* Last user fault */ 230 unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */ 231 unsigned long error_code; 232 unsigned long irix_trampoline; /* Wheee... */ 233 unsigned long irix_oldctx; 234 #ifdef CONFIG_CPU_CAVIUM_OCTEON 235 struct octeon_cop2_state cp2 __attribute__ ((__aligned__(128))); 236 struct octeon_cvmseg_state cvmseg __attribute__ ((__aligned__(128))); 237 #endif 238 struct mips_abi *abi; 239 }; 240 241 #ifdef CONFIG_MIPS_MT_FPAFF 242 #define FPAFF_INIT \ 243 .emulated_fp = 0, \ 244 .user_cpus_allowed = INIT_CPUMASK, 245 #else 246 #define FPAFF_INIT 247 #endif /* CONFIG_MIPS_MT_FPAFF */ 248 249 #ifdef CONFIG_CPU_CAVIUM_OCTEON 250 #define OCTEON_INIT \ 251 .cp2 = INIT_OCTEON_COP2, 252 #else 253 #define OCTEON_INIT 254 #endif /* CONFIG_CPU_CAVIUM_OCTEON */ 255 256 #define INIT_THREAD { \ 257 /* \ 258 * Saved main processor registers \ 259 */ \ 260 .reg16 = 0, \ 261 .reg17 = 0, \ 262 .reg18 = 0, \ 263 .reg19 = 0, \ 264 .reg20 = 0, \ 265 .reg21 = 0, \ 266 .reg22 = 0, \ 267 .reg23 = 0, \ 268 .reg29 = 0, \ 269 .reg30 = 0, \ 270 .reg31 = 0, \ 271 /* \ 272 * Saved cp0 stuff \ 273 */ \ 274 .cp0_status = 0, \ 275 /* \ 276 * Saved FPU/FPU emulator stuff \ 277 */ \ 278 .fpu = { \ 279 .fpr = {0,}, \ 280 .fcr31 = 0, \ 281 }, \ 282 /* \ 283 * FPU affinity state (null if not FPAFF) \ 284 */ \ 285 FPAFF_INIT \ 286 /* \ 287 * Saved DSP stuff \ 288 */ \ 289 .dsp = { \ 290 .dspr = {0, }, \ 291 .dspcontrol = 0, \ 292 }, \ 293 /* \ 294 * saved watch register stuff \ 295 */ \ 296 .watch = {{{0,},},}, \ 297 /* \ 298 * Other stuff associated with the process \ 299 */ \ 300 .cp0_badvaddr = 0, \ 301 .cp0_baduaddr = 0, \ 302 .error_code = 0, \ 303 .irix_trampoline = 0, \ 304 .irix_oldctx = 0, \ 305 /* \ 306 * Cavium Octeon specifics (null if not Octeon) \ 307 */ \ 308 OCTEON_INIT \ 309 } 310 311 struct task_struct; 312 313 /* Free all resources held by a thread. */ 314 #define release_thread(thread) do { } while(0) 315 316 /* Prepare to copy thread state - unlazy all lazy status */ 317 #define prepare_to_copy(tsk) do { } while (0) 318 319 extern long kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 320 321 extern unsigned long thread_saved_pc(struct task_struct *tsk); 322 323 /* 324 * Do necessary setup to start up a newly executed thread. 325 */ 326 extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp); 327 328 unsigned long get_wchan(struct task_struct *p); 329 330 #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \ 331 THREAD_SIZE - 32 - sizeof(struct pt_regs)) 332 #define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk)) 333 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc) 334 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29]) 335 #define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status) 336 337 #define cpu_relax() barrier() 338 339 /* 340 * Return_address is a replacement for __builtin_return_address(count) 341 * which on certain architectures cannot reasonably be implemented in GCC 342 * (MIPS, Alpha) or is unuseable with -fomit-frame-pointer (i386). 343 * Note that __builtin_return_address(x>=1) is forbidden because GCC 344 * aborts compilation on some CPUs. It's simply not possible to unwind 345 * some CPU's stackframes. 346 * 347 * __builtin_return_address works only for non-leaf functions. We avoid the 348 * overhead of a function call by forcing the compiler to save the return 349 * address register on the stack. 350 */ 351 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) 352 353 #ifdef CONFIG_CPU_HAS_PREFETCH 354 355 #define ARCH_HAS_PREFETCH 356 #define prefetch(x) __builtin_prefetch((x), 0, 1) 357 358 #define ARCH_HAS_PREFETCHW 359 #define prefetchw(x) __builtin_prefetch((x), 1, 1) 360 361 #endif 362 363 #endif /* _ASM_PROCESSOR_H */ 364