xref: /linux/arch/m68k/include/asm/mcfclk.h (revision cbdb1f163af2bb90d01be1f0263df1d8d5c9d9d3)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * mcfclk.h -- coldfire specific clock structure
4  */
5 
6 
7 #ifndef mcfclk_h
8 #define mcfclk_h
9 
10 struct clk;
11 
12 struct clk_ops {
13 	void (*enable)(struct clk *);
14 	void (*disable)(struct clk *);
15 };
16 
17 struct clk {
18 	struct clk_ops *clk_ops;
19 	unsigned long rate;
20 	unsigned long enabled;
21 	u8 slot;
22 };
23 
24 #ifdef MCFPM_PPMCR0
25 extern struct clk_ops clk_ops0;
26 #ifdef MCFPM_PPMCR1
27 extern struct clk_ops clk_ops1;
28 #endif /* MCFPM_PPMCR1 */
29 
30 extern struct clk_ops clk_ops2;
31 
32 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \
33 static struct clk __clk_##clk_bank##_##clk_slot = { \
34 	.clk_ops = &clk_ops##clk_bank, \
35 	.rate = clk_rate, \
36 	.slot = clk_slot, \
37 }
38 
39 void __clk_init_enabled(struct clk *);
40 void __clk_init_disabled(struct clk *);
41 #else
42 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \
43         static struct clk clk_##clk_ref = { \
44                 .rate = clk_rate, \
45         }
46 #endif /* MCFPM_PPMCR0 */
47 
48 #endif /* mcfclk_h */
49