xref: /linux/arch/arm64/include/asm/cpucaps.h (revision 3503d56cc7233ced602e38a4c13caa64f00ab2aa)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * arch/arm64/include/asm/cpucaps.h
4  *
5  * Copyright (C) 2016 ARM Ltd.
6  */
7 #ifndef __ASM_CPUCAPS_H
8 #define __ASM_CPUCAPS_H
9 
10 #define ARM64_WORKAROUND_CLEAN_CACHE		0
11 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE	1
12 #define ARM64_WORKAROUND_845719			2
13 #define ARM64_HAS_SYSREG_GIC_CPUIF		3
14 #define ARM64_HAS_PAN				4
15 #define ARM64_HAS_LSE_ATOMICS			5
16 #define ARM64_WORKAROUND_CAVIUM_23154		6
17 #define ARM64_WORKAROUND_834220			7
18 #define ARM64_HAS_NO_HW_PREFETCH		8
19 #define ARM64_HAS_UAO				9
20 #define ARM64_ALT_PAN_NOT_UAO			10
21 #define ARM64_HAS_VIRT_HOST_EXTN		11
22 #define ARM64_WORKAROUND_CAVIUM_27456		12
23 #define ARM64_HAS_32BIT_EL0			13
24 #define ARM64_HARDEN_EL2_VECTORS		14
25 #define ARM64_HAS_CNP				15
26 #define ARM64_HAS_NO_FPSIMD			16
27 #define ARM64_WORKAROUND_REPEAT_TLBI		17
28 #define ARM64_WORKAROUND_QCOM_FALKOR_E1003	18
29 #define ARM64_WORKAROUND_858921			19
30 #define ARM64_WORKAROUND_CAVIUM_30115		20
31 #define ARM64_HAS_DCPOP				21
32 #define ARM64_SVE				22
33 #define ARM64_UNMAP_KERNEL_AT_EL0		23
34 #define ARM64_HARDEN_BRANCH_PREDICTOR		24
35 #define ARM64_HAS_RAS_EXTN			25
36 #define ARM64_WORKAROUND_843419			26
37 #define ARM64_HAS_CACHE_IDC			27
38 #define ARM64_HAS_CACHE_DIC			28
39 #define ARM64_HW_DBM				29
40 #define ARM64_SSBD				30
41 #define ARM64_MISMATCHED_CACHE_TYPE		31
42 #define ARM64_HAS_STAGE2_FWB			32
43 #define ARM64_HAS_CRC32				33
44 #define ARM64_SSBS				34
45 #define ARM64_WORKAROUND_1418040		35
46 #define ARM64_HAS_SB				36
47 #define ARM64_WORKAROUND_SPECULATIVE_AT		37
48 #define ARM64_HAS_ADDRESS_AUTH_ARCH		38
49 #define ARM64_HAS_ADDRESS_AUTH_IMP_DEF		39
50 #define ARM64_HAS_GENERIC_AUTH_ARCH		40
51 #define ARM64_HAS_GENERIC_AUTH_IMP_DEF		41
52 #define ARM64_HAS_IRQ_PRIO_MASKING		42
53 #define ARM64_HAS_DCPODP			43
54 #define ARM64_WORKAROUND_1463225		44
55 #define ARM64_WORKAROUND_CAVIUM_TX2_219_TVM	45
56 #define ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM	46
57 #define ARM64_WORKAROUND_1542419		47
58 #define ARM64_HAS_E0PD				48
59 #define ARM64_HAS_RNG				49
60 #define ARM64_HAS_AMU_EXTN			50
61 #define ARM64_HAS_ADDRESS_AUTH			51
62 #define ARM64_HAS_GENERIC_AUTH			52
63 #define ARM64_HAS_32BIT_EL1			53
64 #define ARM64_BTI				54
65 
66 #define ARM64_NCAPS				55
67 
68 #endif /* __ASM_CPUCAPS_H */
69