1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/gpio-keys.h> 5#include <dt-bindings/input/linux-event-codes.h> 6#include <dt-bindings/mfd/max77620.h> 7 8#include "tegra210.dtsi" 9 10/ { 11 model = "NVIDIA Jetson Nano Developer Kit"; 12 compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 13 14 aliases { 15 ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0"; 16 rtc0 = "/i2c@7000d000/pmic@3c"; 17 rtc1 = "/rtc@7000e000"; 18 serial0 = &uarta; 19 }; 20 21 chosen { 22 stdout-path = "serial0:115200n8"; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x80000000 0x1 0x0>; 28 }; 29 30 pcie@1003000 { 31 status = "okay"; 32 33 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 34 hvddio-pex-supply = <&vdd_1v8>; 35 dvddio-pex-supply = <&vdd_pex_1v05>; 36 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 37 hvdd-pex-pll-e-supply = <&vdd_1v8>; 38 vddio-pex-ctl-supply = <&vdd_1v8>; 39 40 pci@1,0 { 41 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 42 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 43 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>, 44 <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>; 45 phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3"; 46 nvidia,num-lanes = <4>; 47 status = "okay"; 48 }; 49 50 pci@2,0 { 51 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; 52 phy-names = "pcie-0"; 53 status = "okay"; 54 55 ethernet@0,0 { 56 reg = <0x000000 0 0 0 0>; 57 local-mac-address = [ 00 00 00 00 00 00 ]; 58 }; 59 }; 60 }; 61 62 host1x@50000000 { 63 dpaux@54040000 { 64 status = "okay"; 65 }; 66 67 sor@54580000 { 68 status = "okay"; 69 70 avdd-io-supply = <&avdd_1v05>; 71 vdd-pll-supply = <&vdd_1v8>; 72 hdmi-supply = <&vdd_hdmi>; 73 74 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 75 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1) 76 GPIO_ACTIVE_LOW>; 77 nvidia,xbar-cfg = <0 1 2 3 4>; 78 }; 79 }; 80 81 gpu@57000000 { 82 vdd-supply = <&vdd_gpu>; 83 status = "okay"; 84 }; 85 86 /* debug port */ 87 serial@70006000 { 88 status = "okay"; 89 }; 90 91 hdmi_ddc: i2c@7000c700 { 92 status = "okay"; 93 clock-frequency = <100000>; 94 }; 95 96 i2c@7000d000 { 97 status = "okay"; 98 clock-frequency = <400000>; 99 100 pmic: pmic@3c { 101 compatible = "maxim,max77620"; 102 reg = <0x3c>; 103 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 104 105 #interrupt-cells = <2>; 106 interrupt-controller; 107 108 #gpio-cells = <2>; 109 gpio-controller; 110 111 pinctrl-names = "default"; 112 pinctrl-0 = <&max77620_default>; 113 114 max77620_default: pinmux { 115 gpio0 { 116 pins = "gpio0"; 117 function = "gpio"; 118 }; 119 120 gpio1 { 121 pins = "gpio1"; 122 function = "fps-out"; 123 drive-push-pull = <1>; 124 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 125 maxim,active-fps-power-up-slot = <0>; 126 maxim,active-fps-power-down-slot = <7>; 127 }; 128 129 gpio2 { 130 pins = "gpio2"; 131 function = "fps-out"; 132 drive-open-drain = <1>; 133 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 134 maxim,active-fps-power-up-slot = <0>; 135 maxim,active-fps-power-down-slot = <7>; 136 }; 137 138 gpio3 { 139 pins = "gpio3"; 140 function = "fps-out"; 141 drive-open-drain = <1>; 142 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 143 maxim,active-fps-power-up-slot = <4>; 144 maxim,active-fps-power-down-slot = <3>; 145 }; 146 147 gpio4 { 148 pins = "gpio4"; 149 function = "32k-out1"; 150 }; 151 152 gpio5_6_7 { 153 pins = "gpio5", "gpio6", "gpio7"; 154 function = "gpio"; 155 drive-push-pull = <1>; 156 }; 157 }; 158 159 fps { 160 fps0 { 161 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 162 maxim,suspend-fps-time-period-us = <5120>; 163 }; 164 165 fps1 { 166 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 167 maxim,suspend-fps-time-period-us = <5120>; 168 }; 169 170 fps2 { 171 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 172 }; 173 }; 174 175 regulators { 176 in-ldo0-1-supply = <&vdd_pre>; 177 in-ldo2-supply = <&vdd_3v3_sys>; 178 in-ldo3-5-supply = <&vdd_1v8>; 179 in-ldo4-6-supply = <&vdd_5v0_sys>; 180 in-ldo7-8-supply = <&vdd_pre>; 181 in-sd0-supply = <&vdd_5v0_sys>; 182 in-sd1-supply = <&vdd_5v0_sys>; 183 in-sd2-supply = <&vdd_5v0_sys>; 184 in-sd3-supply = <&vdd_5v0_sys>; 185 186 vdd_soc: sd0 { 187 regulator-name = "VDD_SOC"; 188 regulator-min-microvolt = <1000000>; 189 regulator-max-microvolt = <1170000>; 190 regulator-enable-ramp-delay = <146>; 191 regulator-disable-ramp-delay = <4080>; 192 regulator-ramp-delay = <27500>; 193 regulator-ramp-delay-scale = <300>; 194 regulator-always-on; 195 regulator-boot-on; 196 197 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 198 maxim,active-fps-power-up-slot = <1>; 199 maxim,active-fps-power-down-slot = <6>; 200 }; 201 202 vdd_ddr: sd1 { 203 regulator-name = "VDD_DDR_1V1_PMIC"; 204 regulator-min-microvolt = <1150000>; 205 regulator-max-microvolt = <1150000>; 206 regulator-enable-ramp-delay = <176>; 207 regulator-disable-ramp-delay = <145800>; 208 regulator-ramp-delay = <27500>; 209 regulator-ramp-delay-scale = <300>; 210 regulator-always-on; 211 regulator-boot-on; 212 213 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 214 maxim,active-fps-power-up-slot = <5>; 215 maxim,active-fps-power-down-slot = <2>; 216 }; 217 218 vdd_pre: sd2 { 219 regulator-name = "VDD_PRE_REG_1V35"; 220 regulator-min-microvolt = <1350000>; 221 regulator-max-microvolt = <1350000>; 222 regulator-enable-ramp-delay = <176>; 223 regulator-disable-ramp-delay = <32000>; 224 regulator-ramp-delay = <27500>; 225 regulator-ramp-delay-scale = <350>; 226 regulator-always-on; 227 regulator-boot-on; 228 229 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 230 maxim,active-fps-power-up-slot = <2>; 231 maxim,active-fps-power-down-slot = <5>; 232 }; 233 234 vdd_1v8: sd3 { 235 regulator-name = "VDD_1V8"; 236 regulator-min-microvolt = <1800000>; 237 regulator-max-microvolt = <1800000>; 238 regulator-enable-ramp-delay = <242>; 239 regulator-disable-ramp-delay = <118000>; 240 regulator-ramp-delay = <27500>; 241 regulator-ramp-delay-scale = <360>; 242 regulator-always-on; 243 regulator-boot-on; 244 245 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 246 maxim,active-fps-power-up-slot = <3>; 247 maxim,active-fps-power-down-slot = <4>; 248 }; 249 250 vdd_sys_1v2: ldo0 { 251 regulator-name = "AVDD_SYS_1V2"; 252 regulator-min-microvolt = <1200000>; 253 regulator-max-microvolt = <1200000>; 254 regulator-enable-ramp-delay = <26>; 255 regulator-disable-ramp-delay = <626>; 256 regulator-ramp-delay = <100000>; 257 regulator-ramp-delay-scale = <200>; 258 regulator-always-on; 259 regulator-boot-on; 260 261 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 262 maxim,active-fps-power-up-slot = <0>; 263 maxim,active-fps-power-down-slot = <7>; 264 }; 265 266 vdd_pex_1v05: ldo1 { 267 regulator-name = "VDD_PEX_1V05"; 268 regulator-min-microvolt = <1050000>; 269 regulator-max-microvolt = <1050000>; 270 regulator-enable-ramp-delay = <22>; 271 regulator-disable-ramp-delay = <650>; 272 regulator-ramp-delay = <100000>; 273 regulator-ramp-delay-scale = <200>; 274 275 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 276 maxim,active-fps-power-up-slot = <0>; 277 maxim,active-fps-power-down-slot = <7>; 278 }; 279 280 vddio_sdmmc: ldo2 { 281 regulator-name = "VDDIO_SDMMC"; 282 regulator-min-microvolt = <1800000>; 283 regulator-max-microvolt = <3300000>; 284 regulator-enable-ramp-delay = <62>; 285 regulator-disable-ramp-delay = <650>; 286 regulator-ramp-delay = <100000>; 287 regulator-ramp-delay-scale = <200>; 288 289 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 290 maxim,active-fps-power-up-slot = <0>; 291 maxim,active-fps-power-down-slot = <7>; 292 }; 293 294 ldo3 { 295 status = "disabled"; 296 }; 297 298 vdd_rtc: ldo4 { 299 regulator-name = "VDD_RTC"; 300 regulator-min-microvolt = <850000>; 301 regulator-max-microvolt = <1100000>; 302 regulator-enable-ramp-delay = <22>; 303 regulator-disable-ramp-delay = <610>; 304 regulator-ramp-delay = <100000>; 305 regulator-ramp-delay-scale = <200>; 306 regulator-disable-active-discharge; 307 regulator-always-on; 308 regulator-boot-on; 309 310 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 311 maxim,active-fps-power-up-slot = <1>; 312 maxim,active-fps-power-down-slot = <6>; 313 }; 314 315 ldo5 { 316 status = "disabled"; 317 }; 318 319 ldo6 { 320 status = "disabled"; 321 }; 322 323 avdd_1v05_pll: ldo7 { 324 regulator-name = "AVDD_1V05_PLL"; 325 regulator-min-microvolt = <1050000>; 326 regulator-max-microvolt = <1050000>; 327 regulator-enable-ramp-delay = <24>; 328 regulator-disable-ramp-delay = <2768>; 329 regulator-ramp-delay = <100000>; 330 regulator-ramp-delay-scale = <200>; 331 332 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 333 maxim,active-fps-power-up-slot = <3>; 334 maxim,active-fps-power-down-slot = <4>; 335 }; 336 337 avdd_1v05: ldo8 { 338 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 339 regulator-min-microvolt = <1050000>; 340 regulator-max-microvolt = <1050000>; 341 regulator-enable-ramp-delay = <22>; 342 regulator-disable-ramp-delay = <1160>; 343 regulator-ramp-delay = <100000>; 344 regulator-ramp-delay-scale = <200>; 345 346 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 347 maxim,active-fps-power-up-slot = <6>; 348 maxim,active-fps-power-down-slot = <1>; 349 }; 350 }; 351 }; 352 }; 353 354 pmc@7000e400 { 355 nvidia,invert-interrupt; 356 }; 357 358 hda@70030000 { 359 nvidia,model = "jetson-nano-hda"; 360 361 status = "okay"; 362 }; 363 364 usb@70090000 { 365 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 366 <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, 367 <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, 368 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 369 phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0"; 370 371 avdd-usb-supply = <&vdd_3v3_sys>; 372 dvddio-pex-supply = <&vdd_pex_1v05>; 373 hvddio-pex-supply = <&vdd_1v8>; 374 /* these really belong to the XUSB pad controller */ 375 avdd-pll-utmip-supply = <&vdd_1v8>; 376 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 377 dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>; 378 hvdd-usb-ss-pll-e-supply = <&vdd_1v8>; 379 380 status = "okay"; 381 }; 382 383 padctl@7009f000 { 384 status = "okay"; 385 386 avdd-pll-utmip-supply = <&vdd_1v8>; 387 avdd-pll-uerefe-supply = <&vdd_pex_1v05>; 388 dvdd-pex-pll-supply = <&vdd_pex_1v05>; 389 hvdd-pex-pll-e-supply = <&vdd_1v8>; 390 391 pads { 392 usb2 { 393 status = "okay"; 394 395 lanes { 396 usb2-0 { 397 nvidia,function = "xusb"; 398 status = "okay"; 399 }; 400 401 usb2-1 { 402 nvidia,function = "xusb"; 403 status = "okay"; 404 }; 405 406 usb2-2 { 407 nvidia,function = "xusb"; 408 status = "okay"; 409 }; 410 }; 411 }; 412 413 pcie { 414 status = "okay"; 415 416 lanes { 417 pcie-0 { 418 nvidia,function = "pcie-x1"; 419 status = "okay"; 420 }; 421 422 pcie-1 { 423 nvidia,function = "pcie-x4"; 424 status = "okay"; 425 }; 426 427 pcie-2 { 428 nvidia,function = "pcie-x4"; 429 status = "okay"; 430 }; 431 432 pcie-3 { 433 nvidia,function = "pcie-x4"; 434 status = "okay"; 435 }; 436 437 pcie-4 { 438 nvidia,function = "pcie-x4"; 439 status = "okay"; 440 }; 441 442 pcie-5 { 443 nvidia,function = "usb3-ss"; 444 status = "okay"; 445 }; 446 447 pcie-6 { 448 nvidia,function = "usb3-ss"; 449 status = "okay"; 450 }; 451 }; 452 }; 453 }; 454 455 ports { 456 usb2-0 { 457 status = "okay"; 458 mode = "otg"; 459 }; 460 461 usb2-1 { 462 status = "okay"; 463 mode = "host"; 464 }; 465 466 usb2-2 { 467 status = "okay"; 468 mode = "host"; 469 }; 470 471 usb3-0 { 472 status = "okay"; 473 nvidia,usb2-companion = <1>; 474 vbus-supply = <&vdd_hub_3v3>; 475 }; 476 }; 477 }; 478 479 sdhci@700b0000 { 480 status = "okay"; 481 bus-width = <4>; 482 483 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>; 484 485 vqmmc-supply = <&vddio_sdmmc>; 486 vmmc-supply = <&vdd_3v3_sd>; 487 }; 488 489 clocks { 490 compatible = "simple-bus"; 491 #address-cells = <1>; 492 #size-cells = <0>; 493 494 clk32k_in: clock@0 { 495 compatible = "fixed-clock"; 496 reg = <0>; 497 #clock-cells = <0>; 498 clock-frequency = <32768>; 499 }; 500 }; 501 502 cpus { 503 cpu@0 { 504 enable-method = "psci"; 505 }; 506 507 cpu@1 { 508 enable-method = "psci"; 509 }; 510 511 cpu@2 { 512 enable-method = "psci"; 513 }; 514 515 cpu@3 { 516 enable-method = "psci"; 517 }; 518 }; 519 520 gpio-keys { 521 compatible = "gpio-keys"; 522 523 power { 524 label = "Power"; 525 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 526 linux,input-type = <EV_KEY>; 527 linux,code = <KEY_POWER>; 528 debounce-interval = <30>; 529 wakeup-event-action = <EV_ACT_ASSERTED>; 530 wakeup-source; 531 }; 532 533 force-recovery { 534 label = "Force Recovery"; 535 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 536 linux,input-type = <EV_KEY>; 537 linux,code = <BTN_1>; 538 debounce-interval = <30>; 539 }; 540 }; 541 542 psci { 543 compatible = "arm,psci-1.0"; 544 method = "smc"; 545 }; 546 547 regulators { 548 compatible = "simple-bus"; 549 #address-cells = <1>; 550 #size-cells = <0>; 551 552 vdd_5v0_sys: regulator@0 { 553 compatible = "regulator-fixed"; 554 reg = <0>; 555 556 regulator-name = "VDD_5V0_SYS"; 557 regulator-min-microvolt = <5000000>; 558 regulator-max-microvolt = <5000000>; 559 regulator-always-on; 560 regulator-boot-on; 561 }; 562 563 vdd_3v3_sys: regulator@1 { 564 compatible = "regulator-fixed"; 565 reg = <1>; 566 regulator-name = "VDD_3V3_SYS"; 567 regulator-min-microvolt = <3300000>; 568 regulator-max-microvolt = <3300000>; 569 regulator-enable-ramp-delay = <240>; 570 regulator-disable-ramp-delay = <11340>; 571 regulator-always-on; 572 regulator-boot-on; 573 574 gpio = <&pmic 3 GPIO_ACTIVE_HIGH>; 575 enable-active-high; 576 577 vin-supply = <&vdd_5v0_sys>; 578 }; 579 580 vdd_3v3_sd: regulator@2 { 581 compatible = "regulator-fixed"; 582 reg = <2>; 583 584 regulator-name = "VDD_3V3_SD"; 585 regulator-min-microvolt = <3300000>; 586 regulator-max-microvolt = <3300000>; 587 588 gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>; 589 enable-active-high; 590 591 vin-supply = <&vdd_3v3_sys>; 592 }; 593 594 vdd_hdmi: regulator@3 { 595 compatible = "regulator-fixed"; 596 reg = <3>; 597 598 regulator-name = "VDD_HDMI_5V0"; 599 regulator-min-microvolt = <5000000>; 600 regulator-max-microvolt = <5000000>; 601 602 vin-supply = <&vdd_5v0_sys>; 603 }; 604 605 vdd_hub_3v3: regulator@4 { 606 compatible = "regulator-fixed"; 607 reg = <4>; 608 609 regulator-name = "VDD_HUB_3V3"; 610 regulator-min-microvolt = <3300000>; 611 regulator-max-microvolt = <3300000>; 612 613 gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>; 614 enable-active-high; 615 616 vin-supply = <&vdd_5v0_sys>; 617 }; 618 619 vdd_cpu: regulator@5 { 620 compatible = "regulator-fixed"; 621 reg = <5>; 622 623 regulator-name = "VDD_CPU"; 624 regulator-min-microvolt = <5000000>; 625 regulator-max-microvolt = <5000000>; 626 regulator-always-on; 627 regulator-boot-on; 628 629 gpio = <&pmic 5 GPIO_ACTIVE_HIGH>; 630 enable-active-high; 631 632 vin-supply = <&vdd_5v0_sys>; 633 }; 634 635 vdd_gpu: regulator@6 { 636 compatible = "regulator-fixed"; 637 reg = <6>; 638 639 regulator-name = "VDD_GPU"; 640 regulator-min-microvolt = <5000000>; 641 regulator-max-microvolt = <5000000>; 642 regulator-enable-ramp-delay = <250>; 643 644 gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; 645 enable-active-high; 646 647 vin-supply = <&vdd_5v0_sys>; 648 }; 649 }; 650}; 651