1// SPDX-License-Identifier: GPL-2.0 2#include "tegra186.dtsi" 3 4#include <dt-bindings/mfd/max77620.h> 5 6/ { 7 model = "NVIDIA Tegra186 P3310 Processor Module"; 8 compatible = "nvidia,p3310", "nvidia,tegra186"; 9 10 aliases { 11 sdhci0 = "/sdhci@3460000"; 12 sdhci1 = "/sdhci@3400000"; 13 serial0 = &uarta; 14 i2c0 = "/bpmp/i2c"; 15 i2c1 = "/i2c@3160000"; 16 i2c2 = "/i2c@c240000"; 17 i2c3 = "/i2c@3180000"; 18 i2c4 = "/i2c@3190000"; 19 i2c5 = "/i2c@31c0000"; 20 i2c6 = "/i2c@c250000"; 21 i2c7 = "/i2c@31e0000"; 22 }; 23 24 chosen { 25 bootargs = "earlycon console=ttyS0,115200n8"; 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 memory { 30 device_type = "memory"; 31 reg = <0x0 0x80000000 0x2 0x00000000>; 32 }; 33 34 ethernet@2490000 { 35 status = "okay"; 36 37 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4) 38 GPIO_ACTIVE_LOW>; 39 phy-handle = <&phy>; 40 phy-mode = "rgmii"; 41 42 mdio { 43 #address-cells = <1>; 44 #size-cells = <0>; 45 46 phy: phy@0 { 47 compatible = "ethernet-phy-ieee802.3-c22"; 48 reg = <0x0>; 49 interrupt-parent = <&gpio>; 50 interrupts = <TEGRA186_MAIN_GPIO(M, 5) 51 IRQ_TYPE_LEVEL_LOW>; 52 }; 53 }; 54 }; 55 56 memory-controller@2c00000 { 57 status = "okay"; 58 }; 59 60 serial@3100000 { 61 status = "okay"; 62 }; 63 64 i2c@3160000 { 65 status = "okay"; 66 67 power-monitor@40 { 68 compatible = "ti,ina3221"; 69 reg = <0x40>; 70 }; 71 72 power-monitor@41 { 73 compatible = "ti,ina3221"; 74 reg = <0x41>; 75 }; 76 }; 77 78 i2c@3180000 { 79 status = "okay"; 80 }; 81 82 ddc: i2c@3190000 { 83 status = "okay"; 84 }; 85 86 i2c@31c0000 { 87 status = "okay"; 88 }; 89 90 i2c@31e0000 { 91 status = "okay"; 92 }; 93 94 /* SDMMC1 (SD/MMC) */ 95 sdhci@3400000 { 96 cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>; 97 wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>; 98 99 vqmmc-supply = <&vddio_sdmmc1>; 100 }; 101 102 /* SDMMC3 (SDIO) */ 103 sdhci@3440000 { 104 status = "okay"; 105 }; 106 107 /* SDMMC4 (eMMC) */ 108 sdhci@3460000 { 109 status = "okay"; 110 bus-width = <8>; 111 non-removable; 112 113 vqmmc-supply = <&vdd_1v8_ap>; 114 vmmc-supply = <&vdd_3v3_sys>; 115 }; 116 117 hsp@3c00000 { 118 status = "okay"; 119 }; 120 121 i2c@c240000 { 122 status = "okay"; 123 }; 124 125 i2c@c250000 { 126 status = "okay"; 127 }; 128 129 rtc@c2a0000 { 130 status = "okay"; 131 }; 132 133 pmc@c360000 { 134 nvidia,invert-interrupt; 135 }; 136 137 cpus { 138 cpu@0 { 139 enable-method = "psci"; 140 }; 141 142 cpu@1 { 143 enable-method = "psci"; 144 }; 145 146 cpu@2 { 147 enable-method = "psci"; 148 }; 149 150 cpu@3 { 151 enable-method = "psci"; 152 }; 153 154 cpu@4 { 155 enable-method = "psci"; 156 }; 157 158 cpu@5 { 159 enable-method = "psci"; 160 }; 161 }; 162 163 bpmp { 164 i2c { 165 status = "okay"; 166 167 pmic: pmic@3c { 168 compatible = "maxim,max77620"; 169 reg = <0x3c>; 170 171 interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; 172 #interrupt-cells = <2>; 173 interrupt-controller; 174 175 #gpio-cells = <2>; 176 gpio-controller; 177 178 pinctrl-names = "default"; 179 pinctrl-0 = <&max77620_default>; 180 181 max77620_default: pinmux { 182 gpio0 { 183 pins = "gpio0"; 184 function = "gpio"; 185 }; 186 187 gpio1 { 188 pins = "gpio1"; 189 function = "fps-out"; 190 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 191 }; 192 193 gpio2 { 194 pins = "gpio2"; 195 function = "fps-out"; 196 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 197 }; 198 199 gpio3 { 200 pins = "gpio3"; 201 function = "fps-out"; 202 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 203 }; 204 205 gpio4 { 206 pins = "gpio4"; 207 function = "32k-out1"; 208 drive-push-pull = <1>; 209 }; 210 211 gpio5 { 212 pins = "gpio5"; 213 function = "gpio"; 214 drive-push-pull = <0>; 215 }; 216 217 gpio6 { 218 pins = "gpio6"; 219 function = "gpio"; 220 drive-push-pull = <1>; 221 }; 222 223 gpio7 { 224 pins = "gpio7"; 225 function = "gpio"; 226 drive-push-pull = <0>; 227 }; 228 }; 229 230 fps { 231 fps0 { 232 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 233 maxim,shutdown-fps-time-period-us = <640>; 234 }; 235 236 fps1 { 237 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 238 maxim,shutdown-fps-time-period-us = <640>; 239 }; 240 241 fps2 { 242 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 243 maxim,shutdown-fps-time-period-us = <640>; 244 }; 245 }; 246 247 regulators { 248 in-sd0-supply = <&vdd_5v0_sys>; 249 in-sd1-supply = <&vdd_5v0_sys>; 250 in-sd2-supply = <&vdd_5v0_sys>; 251 in-sd3-supply = <&vdd_5v0_sys>; 252 253 in-ldo0-1-supply = <&vdd_5v0_sys>; 254 in-ldo2-supply = <&vdd_5v0_sys>; 255 in-ldo3-5-supply = <&vdd_5v0_sys>; 256 in-ldo4-6-supply = <&vdd_1v8>; 257 in-ldo7-8-supply = <&avdd_dsi_csi>; 258 259 sd0 { 260 regulator-name = "VDD_DDR_1V1_PMIC"; 261 regulator-min-microvolt = <1100000>; 262 regulator-max-microvolt = <1100000>; 263 regulator-always-on; 264 regulator-boot-on; 265 }; 266 267 avdd_dsi_csi: sd1 { 268 regulator-name = "AVDD_DSI_CSI_1V2"; 269 regulator-min-microvolt = <1200000>; 270 regulator-max-microvolt = <1200000>; 271 }; 272 273 vdd_1v8: sd2 { 274 regulator-name = "VDD_1V8"; 275 regulator-min-microvolt = <1800000>; 276 regulator-max-microvolt = <1800000>; 277 }; 278 279 vdd_3v3_sys: sd3 { 280 regulator-name = "VDD_3V3_SYS"; 281 regulator-min-microvolt = <3300000>; 282 regulator-max-microvolt = <3300000>; 283 }; 284 285 vdd_1v8_pll: ldo0 { 286 regulator-name = "VDD_1V8_AP_PLL"; 287 regulator-min-microvolt = <1800000>; 288 regulator-max-microvolt = <1800000>; 289 }; 290 291 ldo2 { 292 regulator-name = "VDDIO_3V3_AOHV"; 293 regulator-min-microvolt = <3300000>; 294 regulator-max-microvolt = <3300000>; 295 regulator-always-on; 296 regulator-boot-on; 297 }; 298 299 vddio_sdmmc1: ldo3 { 300 regulator-name = "VDDIO_SDMMC1_AP"; 301 regulator-min-microvolt = <1800000>; 302 regulator-max-microvolt = <3300000>; 303 }; 304 305 ldo4 { 306 regulator-name = "VDD_RTC"; 307 regulator-min-microvolt = <1000000>; 308 regulator-max-microvolt = <1000000>; 309 }; 310 311 vddio_sdmmc3: ldo5 { 312 regulator-name = "VDDIO_SDMMC3_AP"; 313 regulator-min-microvolt = <2800000>; 314 regulator-max-microvolt = <2800000>; 315 }; 316 317 vdd_hdmi_1v05: ldo7 { 318 regulator-name = "VDD_HDMI_1V05"; 319 regulator-min-microvolt = <1050000>; 320 regulator-max-microvolt = <1050000>; 321 }; 322 323 vdd_pex: ldo8 { 324 regulator-name = "VDD_PEX_1V05"; 325 regulator-min-microvolt = <1050000>; 326 regulator-max-microvolt = <1050000>; 327 }; 328 }; 329 }; 330 }; 331 }; 332 333 psci { 334 compatible = "arm,psci-1.0"; 335 status = "okay"; 336 method = "smc"; 337 }; 338 339 regulators { 340 compatible = "simple-bus"; 341 #address-cells = <1>; 342 #size-cells = <0>; 343 344 gnd: regulator@0 { 345 compatible = "regulator-fixed"; 346 reg = <0>; 347 348 regulator-name = "GND"; 349 regulator-min-microvolt = <0>; 350 regulator-max-microvolt = <0>; 351 regulator-always-on; 352 regulator-boot-on; 353 }; 354 355 vdd_5v0_sys: regulator@1 { 356 compatible = "regulator-fixed"; 357 reg = <1>; 358 359 regulator-name = "VDD_5V0_SYS"; 360 regulator-min-microvolt = <5000000>; 361 regulator-max-microvolt = <5000000>; 362 regulator-always-on; 363 regulator-boot-on; 364 }; 365 366 vdd_1v8_ap: regulator@2 { 367 compatible = "regulator-fixed"; 368 reg = <2>; 369 370 regulator-name = "VDD_1V8_AP"; 371 regulator-min-microvolt = <1800000>; 372 regulator-max-microvolt = <1800000>; 373 374 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; 375 enable-active-high; 376 377 vin-supply = <&vdd_1v8>; 378 }; 379 }; 380}; 381