1 /* 2 * linux/arch/arm/mach-sa1100/assabet.c 3 * 4 * Author: Nicolas Pitre 5 * 6 * This file contains all Assabet-specific tweaks. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/errno.h> 16 #include <linux/ioport.h> 17 #include <linux/serial_core.h> 18 #include <linux/mfd/ucb1x00.h> 19 #include <linux/mtd/mtd.h> 20 #include <linux/mtd/partitions.h> 21 #include <linux/delay.h> 22 #include <linux/mm.h> 23 #include <linux/leds.h> 24 #include <linux/slab.h> 25 26 #include <video/sa1100fb.h> 27 28 #include <mach/hardware.h> 29 #include <asm/mach-types.h> 30 #include <asm/setup.h> 31 #include <asm/page.h> 32 #include <asm/pgtable-hwdef.h> 33 #include <asm/pgtable.h> 34 #include <asm/tlbflush.h> 35 36 #include <asm/mach/arch.h> 37 #include <asm/mach/flash.h> 38 #include <asm/mach/irda.h> 39 #include <asm/mach/map.h> 40 #include <asm/mach/serial_sa1100.h> 41 #include <mach/assabet.h> 42 #include <linux/platform_data/mfd-mcp-sa11x0.h> 43 #include <mach/irqs.h> 44 45 #include "generic.h" 46 47 #define ASSABET_BCR_DB1110 \ 48 (ASSABET_BCR_SPK_OFF | \ 49 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ 50 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ 51 ASSABET_BCR_IRDA_MD0) 52 53 #define ASSABET_BCR_DB1111 \ 54 (ASSABET_BCR_SPK_OFF | \ 55 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ 56 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ 57 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \ 58 ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST) 59 60 unsigned long SCR_value = ASSABET_SCR_INIT; 61 EXPORT_SYMBOL(SCR_value); 62 63 static unsigned long BCR_value = ASSABET_BCR_DB1110; 64 65 void ASSABET_BCR_frob(unsigned int mask, unsigned int val) 66 { 67 unsigned long flags; 68 69 local_irq_save(flags); 70 BCR_value = (BCR_value & ~mask) | val; 71 ASSABET_BCR = BCR_value; 72 local_irq_restore(flags); 73 } 74 75 EXPORT_SYMBOL(ASSABET_BCR_frob); 76 77 static void assabet_ucb1x00_reset(enum ucb1x00_reset state) 78 { 79 if (state == UCB_RST_PROBE) 80 ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); 81 } 82 83 84 /* 85 * Assabet flash support code. 86 */ 87 88 #ifdef ASSABET_REV_4 89 /* 90 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0: 91 */ 92 static struct mtd_partition assabet_partitions[] = { 93 { 94 .name = "bootloader", 95 .size = 0x00020000, 96 .offset = 0, 97 .mask_flags = MTD_WRITEABLE, 98 }, { 99 .name = "bootloader params", 100 .size = 0x00020000, 101 .offset = MTDPART_OFS_APPEND, 102 .mask_flags = MTD_WRITEABLE, 103 }, { 104 .name = "jffs", 105 .size = MTDPART_SIZ_FULL, 106 .offset = MTDPART_OFS_APPEND, 107 } 108 }; 109 #else 110 /* 111 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0: 112 */ 113 static struct mtd_partition assabet_partitions[] = { 114 { 115 .name = "bootloader", 116 .size = 0x00040000, 117 .offset = 0, 118 .mask_flags = MTD_WRITEABLE, 119 }, { 120 .name = "bootloader params", 121 .size = 0x00040000, 122 .offset = MTDPART_OFS_APPEND, 123 .mask_flags = MTD_WRITEABLE, 124 }, { 125 .name = "jffs", 126 .size = MTDPART_SIZ_FULL, 127 .offset = MTDPART_OFS_APPEND, 128 } 129 }; 130 #endif 131 132 static struct flash_platform_data assabet_flash_data = { 133 .map_name = "cfi_probe", 134 .parts = assabet_partitions, 135 .nr_parts = ARRAY_SIZE(assabet_partitions), 136 }; 137 138 static struct resource assabet_flash_resources[] = { 139 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), 140 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), 141 }; 142 143 144 /* 145 * Assabet IrDA support code. 146 */ 147 148 static int assabet_irda_set_power(struct device *dev, unsigned int state) 149 { 150 static unsigned int bcr_state[4] = { 151 ASSABET_BCR_IRDA_MD0, 152 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0, 153 ASSABET_BCR_IRDA_MD1, 154 0 155 }; 156 157 if (state < 4) { 158 state = bcr_state[state]; 159 ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1| 160 ASSABET_BCR_IRDA_MD0)); 161 ASSABET_BCR_set(state); 162 } 163 return 0; 164 } 165 166 static void assabet_irda_set_speed(struct device *dev, unsigned int speed) 167 { 168 if (speed < 4000000) 169 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL); 170 else 171 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL); 172 } 173 174 static struct irda_platform_data assabet_irda_data = { 175 .set_power = assabet_irda_set_power, 176 .set_speed = assabet_irda_set_speed, 177 }; 178 179 static struct ucb1x00_plat_data assabet_ucb1x00_data = { 180 .reset = assabet_ucb1x00_reset, 181 .gpio_base = -1, 182 }; 183 184 static struct mcp_plat_data assabet_mcp_data = { 185 .mccr0 = MCCR0_ADM, 186 .sclk_rate = 11981000, 187 .codec_pdata = &assabet_ucb1x00_data, 188 }; 189 190 static void assabet_lcd_set_visual(u32 visual) 191 { 192 u_int is_true_color = visual == FB_VISUAL_TRUECOLOR; 193 194 if (machine_is_assabet()) { 195 #if 1 // phase 4 or newer Assabet's 196 if (is_true_color) 197 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); 198 else 199 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); 200 #else 201 // older Assabet's 202 if (is_true_color) 203 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); 204 else 205 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); 206 #endif 207 } 208 } 209 210 #ifndef ASSABET_PAL_VIDEO 211 static void assabet_lcd_backlight_power(int on) 212 { 213 if (on) 214 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON); 215 else 216 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); 217 } 218 219 /* 220 * Turn on/off the backlight. When turning the backlight on, we wait 221 * 500us after turning it on so we don't cause the supplies to droop 222 * when we enable the LCD controller (and cause a hard reset.) 223 */ 224 static void assabet_lcd_power(int on) 225 { 226 if (on) { 227 ASSABET_BCR_set(ASSABET_BCR_LCD_ON); 228 udelay(500); 229 } else 230 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); 231 } 232 233 /* 234 * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually 235 * takes an RGB666 signal, but we provide it with an RGB565 signal 236 * instead (def_rgb_16). 237 */ 238 static struct sa1100fb_mach_info lq039q2ds54_info = { 239 .pixclock = 171521, .bpp = 16, 240 .xres = 320, .yres = 240, 241 242 .hsync_len = 5, .vsync_len = 1, 243 .left_margin = 61, .upper_margin = 3, 244 .right_margin = 9, .lower_margin = 0, 245 246 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 247 248 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, 249 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), 250 251 .backlight_power = assabet_lcd_backlight_power, 252 .lcd_power = assabet_lcd_power, 253 .set_visual = assabet_lcd_set_visual, 254 }; 255 #else 256 static void assabet_pal_backlight_power(int on) 257 { 258 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); 259 } 260 261 static void assabet_pal_power(int on) 262 { 263 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); 264 } 265 266 static struct sa1100fb_mach_info pal_info = { 267 .pixclock = 67797, .bpp = 16, 268 .xres = 640, .yres = 512, 269 270 .hsync_len = 64, .vsync_len = 6, 271 .left_margin = 125, .upper_margin = 70, 272 .right_margin = 115, .lower_margin = 36, 273 274 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, 275 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), 276 277 .backlight_power = assabet_pal_backlight_power, 278 .lcd_power = assabet_pal_power, 279 .set_visual = assabet_lcd_set_visual, 280 }; 281 #endif 282 283 #ifdef CONFIG_ASSABET_NEPONSET 284 static struct resource neponset_resources[] = { 285 DEFINE_RES_MEM(0x10000000, 0x08000000), 286 DEFINE_RES_MEM(0x18000000, 0x04000000), 287 DEFINE_RES_MEM(0x40000000, SZ_8K), 288 DEFINE_RES_IRQ(IRQ_GPIO25), 289 }; 290 #endif 291 292 static void __init assabet_init(void) 293 { 294 /* 295 * Ensure that the power supply is in "high power" mode. 296 */ 297 GPSR = GPIO_GPIO16; 298 GPDR |= GPIO_GPIO16; 299 300 /* 301 * Ensure that these pins are set as outputs and are driving 302 * logic 0. This ensures that we won't inadvertently toggle 303 * the WS latch in the CPLD, and we don't float causing 304 * excessive power drain. --rmk 305 */ 306 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; 307 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; 308 309 /* 310 * Also set GPIO27 as an output; this is used to clock UART3 311 * via the FPGA and as otherwise has no pullups or pulldowns, 312 * so stop it floating. 313 */ 314 GPCR = GPIO_GPIO27; 315 GPDR |= GPIO_GPIO27; 316 317 /* 318 * Set up registers for sleep mode. 319 */ 320 PWER = PWER_GPIO0; 321 PGSR = 0; 322 PCFR = 0; 323 PSDR = 0; 324 PPDR |= PPC_TXD3 | PPC_TXD1; 325 PPSR |= PPC_TXD3 | PPC_TXD1; 326 327 sa11x0_ppc_configure_mcp(); 328 329 if (machine_has_neponset()) { 330 /* 331 * Angel sets this, but other bootloaders may not. 332 * 333 * This must precede any driver calls to BCR_set() 334 * or BCR_clear(). 335 */ 336 ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111; 337 338 #ifndef CONFIG_ASSABET_NEPONSET 339 printk( "Warning: Neponset detected but full support " 340 "hasn't been configured in the kernel\n" ); 341 #else 342 platform_device_register_simple("neponset", 0, 343 neponset_resources, ARRAY_SIZE(neponset_resources)); 344 #endif 345 } 346 347 #ifndef ASSABET_PAL_VIDEO 348 sa11x0_register_lcd(&lq039q2ds54_info); 349 #else 350 sa11x0_register_lcd(&pal_video); 351 #endif 352 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, 353 ARRAY_SIZE(assabet_flash_resources)); 354 sa11x0_register_irda(&assabet_irda_data); 355 sa11x0_register_mcp(&assabet_mcp_data); 356 } 357 358 /* 359 * On Assabet, we must probe for the Neponset board _before_ 360 * paging_init() has occurred to actually determine the amount 361 * of RAM available. To do so, we map the appropriate IO section 362 * in the page table here in order to access GPIO registers. 363 */ 364 static void __init map_sa1100_gpio_regs( void ) 365 { 366 unsigned long phys = __PREG(GPLR) & PMD_MASK; 367 unsigned long virt = (unsigned long)io_p2v(phys); 368 int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); 369 pmd_t *pmd; 370 371 pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt); 372 *pmd = __pmd(phys | prot); 373 flush_pmd_entry(pmd); 374 } 375 376 /* 377 * Read System Configuration "Register" 378 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board 379 * User's Guide", section 4.4.1) 380 * 381 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S 382 * to set up the serial port for decompression status messages. We 383 * repeat it here because the kernel may not be loaded as a zImage, and 384 * also because it's a hassle to communicate the SCR value to the kernel 385 * from the decompressor. 386 * 387 * Note that IRQs are guaranteed to be disabled. 388 */ 389 static void __init get_assabet_scr(void) 390 { 391 unsigned long scr, i; 392 393 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ 394 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ 395 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ 396 for(i = 100; i--; ) /* Read GPIO 9:2 */ 397 scr = GPLR; 398 GPDR |= 0x3fc; /* restore correct pin direction */ 399 scr &= 0x3fc; /* save as system configuration byte. */ 400 SCR_value = scr; 401 } 402 403 static void __init 404 fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi) 405 { 406 /* This must be done before any call to machine_has_neponset() */ 407 map_sa1100_gpio_regs(); 408 get_assabet_scr(); 409 410 if (machine_has_neponset()) 411 printk("Neponset expansion board detected\n"); 412 } 413 414 415 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate) 416 { 417 if (port->mapbase == _Ser1UTCR0) { 418 if (state) 419 ASSABET_BCR_clear(ASSABET_BCR_RS232EN | 420 ASSABET_BCR_COM_RTS | 421 ASSABET_BCR_COM_DTR); 422 else 423 ASSABET_BCR_set(ASSABET_BCR_RS232EN | 424 ASSABET_BCR_COM_RTS | 425 ASSABET_BCR_COM_DTR); 426 } 427 } 428 429 /* 430 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port) 431 * and UART3 (radio module). We only handle them for UART1 here. 432 */ 433 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl) 434 { 435 if (port->mapbase == _Ser1UTCR0) { 436 u_int set = 0, clear = 0; 437 438 if (mctrl & TIOCM_RTS) 439 clear |= ASSABET_BCR_COM_RTS; 440 else 441 set |= ASSABET_BCR_COM_RTS; 442 443 if (mctrl & TIOCM_DTR) 444 clear |= ASSABET_BCR_COM_DTR; 445 else 446 set |= ASSABET_BCR_COM_DTR; 447 448 ASSABET_BCR_clear(clear); 449 ASSABET_BCR_set(set); 450 } 451 } 452 453 static u_int assabet_get_mctrl(struct uart_port *port) 454 { 455 u_int ret = 0; 456 u_int bsr = ASSABET_BSR; 457 458 /* need 2 reads to read current value */ 459 bsr = ASSABET_BSR; 460 461 if (port->mapbase == _Ser1UTCR0) { 462 if (bsr & ASSABET_BSR_COM_DCD) 463 ret |= TIOCM_CD; 464 if (bsr & ASSABET_BSR_COM_CTS) 465 ret |= TIOCM_CTS; 466 if (bsr & ASSABET_BSR_COM_DSR) 467 ret |= TIOCM_DSR; 468 } else if (port->mapbase == _Ser3UTCR0) { 469 if (bsr & ASSABET_BSR_RAD_DCD) 470 ret |= TIOCM_CD; 471 if (bsr & ASSABET_BSR_RAD_CTS) 472 ret |= TIOCM_CTS; 473 if (bsr & ASSABET_BSR_RAD_DSR) 474 ret |= TIOCM_DSR; 475 if (bsr & ASSABET_BSR_RAD_RI) 476 ret |= TIOCM_RI; 477 } else { 478 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; 479 } 480 481 return ret; 482 } 483 484 static struct sa1100_port_fns assabet_port_fns __initdata = { 485 .set_mctrl = assabet_set_mctrl, 486 .get_mctrl = assabet_get_mctrl, 487 .pm = assabet_uart_pm, 488 }; 489 490 static struct map_desc assabet_io_desc[] __initdata = { 491 { /* Board Control Register */ 492 .virtual = 0xf1000000, 493 .pfn = __phys_to_pfn(0x12000000), 494 .length = 0x00100000, 495 .type = MT_DEVICE 496 }, { /* MQ200 */ 497 .virtual = 0xf2800000, 498 .pfn = __phys_to_pfn(0x4b800000), 499 .length = 0x00800000, 500 .type = MT_DEVICE 501 } 502 }; 503 504 static void __init assabet_map_io(void) 505 { 506 sa1100_map_io(); 507 iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc)); 508 509 /* 510 * Set SUS bit in SDCR0 so serial port 1 functions. 511 * Its called GPCLKR0 in my SA1110 manual. 512 */ 513 Ser1SDCR0 |= SDCR0_SUS; 514 515 if (!machine_has_neponset()) 516 sa1100_register_uart_fns(&assabet_port_fns); 517 518 /* 519 * When Neponset is attached, the first UART should be 520 * UART3. That's what Angel is doing and many documents 521 * are stating this. 522 * 523 * We do the Neponset mapping even if Neponset support 524 * isn't compiled in so the user will still get something on 525 * the expected physical serial port. 526 * 527 * We no longer do this; not all boot loaders support it, 528 * and UART3 appears to be somewhat unreliable with blob. 529 */ 530 sa1100_register_uart(0, 1); 531 sa1100_register_uart(2, 3); 532 } 533 534 /* LEDs */ 535 #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) 536 struct assabet_led { 537 struct led_classdev cdev; 538 u32 mask; 539 }; 540 541 /* 542 * The triggers lines up below will only be used if the 543 * LED triggers are compiled in. 544 */ 545 static const struct { 546 const char *name; 547 const char *trigger; 548 } assabet_leds[] = { 549 { "assabet:red", "cpu0",}, 550 { "assabet:green", "heartbeat", }, 551 }; 552 553 /* 554 * The LED control in Assabet is reversed: 555 * - setting bit means turn off LED 556 * - clearing bit means turn on LED 557 */ 558 static void assabet_led_set(struct led_classdev *cdev, 559 enum led_brightness b) 560 { 561 struct assabet_led *led = container_of(cdev, 562 struct assabet_led, cdev); 563 564 if (b != LED_OFF) 565 ASSABET_BCR_clear(led->mask); 566 else 567 ASSABET_BCR_set(led->mask); 568 } 569 570 static enum led_brightness assabet_led_get(struct led_classdev *cdev) 571 { 572 struct assabet_led *led = container_of(cdev, 573 struct assabet_led, cdev); 574 575 return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL; 576 } 577 578 static int __init assabet_leds_init(void) 579 { 580 int i; 581 582 if (!machine_is_assabet()) 583 return -ENODEV; 584 585 for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) { 586 struct assabet_led *led; 587 588 led = kzalloc(sizeof(*led), GFP_KERNEL); 589 if (!led) 590 break; 591 592 led->cdev.name = assabet_leds[i].name; 593 led->cdev.brightness_set = assabet_led_set; 594 led->cdev.brightness_get = assabet_led_get; 595 led->cdev.default_trigger = assabet_leds[i].trigger; 596 597 if (!i) 598 led->mask = ASSABET_BCR_LED_RED; 599 else 600 led->mask = ASSABET_BCR_LED_GREEN; 601 602 if (led_classdev_register(NULL, &led->cdev) < 0) { 603 kfree(led); 604 break; 605 } 606 } 607 608 return 0; 609 } 610 611 /* 612 * Since we may have triggers on any subsystem, defer registration 613 * until after subsystem_init. 614 */ 615 fs_initcall(assabet_leds_init); 616 #endif 617 618 MACHINE_START(ASSABET, "Intel-Assabet") 619 .atag_offset = 0x100, 620 .fixup = fixup_assabet, 621 .map_io = assabet_map_io, 622 .nr_irqs = SA1100_NR_IRQS, 623 .init_irq = sa1100_init_irq, 624 .timer = &sa1100_timer, 625 .init_machine = assabet_init, 626 .init_late = sa11x0_init_late, 627 #ifdef CONFIG_SA1111 628 .dma_zone_size = SZ_1M, 629 #endif 630 .restart = sa11x0_restart, 631 MACHINE_END 632