1/* 2 * Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com) 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/ { 10 compatible = "snps,arc"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 chosen { }; 14 aliases { }; 15 16 cpus { 17 #address-cells = <1>; 18 #size-cells = <0>; 19 20 cpu@0 { 21 device_type = "cpu"; 22 compatible = "snps,archs38xN"; 23 reg = <0>; 24 }; 25 }; 26 27 /* TIMER0 with interrupt for clockevent */ 28 timer0 { 29 compatible = "snps,arc-timer"; 30 interrupts = <16>; 31 interrupt-parent = <&core_intc>; 32 clocks = <&core_clk>; 33 }; 34 35 /* 64-bit Global Free Running Counter */ 36 gfrc { 37 compatible = "snps,archs-timer-gfrc"; 38 clocks = <&core_clk>; 39 }; 40 41 memory { 42 device_type = "memory"; 43 reg = <0x80000000 0x10000000>; /* 256M */ 44 }; 45}; 46