xref: /linux/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml (revision 58f6259b7a08f8d47d4629609703d358b042f0fd) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
8
9maintainers:
10  - Balsam CHIHI <bchihi@baylibre.com>
11
12description: |
13  LVTS is a thermal management architecture composed of three subsystems,
14  a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
15  a Converter - Low Voltage Thermal Sensor converter (LVTS), and
16  a Digital controller (LVTS_CTRL).
17
18properties:
19  compatible:
20    enum:
21      - mediatek,mt8192-lvts-ap
22      - mediatek,mt8192-lvts-mcu
23      - mediatek,mt8195-lvts-ap
24      - mediatek,mt8195-lvts-mcu
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    maxItems: 1
34
35  resets:
36    maxItems: 1
37    description: LVTS reset for clearing temporary data on AP/MCU.
38
39  nvmem-cells:
40    minItems: 1
41    items:
42      - description: Calibration eFuse data 1 for LVTS
43      - description: Calibration eFuse data 2 for LVTS
44
45  nvmem-cell-names:
46    minItems: 1
47    items:
48      - const: lvts-calib-data-1
49      - const: lvts-calib-data-2
50
51  "#thermal-sensor-cells":
52    const: 1
53
54allOf:
55  - $ref: thermal-sensor.yaml#
56
57  - if:
58      properties:
59        compatible:
60          contains:
61            enum:
62              - mediatek,mt8192-lvts-ap
63              - mediatek,mt8192-lvts-mcu
64    then:
65      properties:
66        nvmem-cells:
67          maxItems: 1
68
69        nvmem-cell-names:
70          maxItems: 1
71
72  - if:
73      properties:
74        compatible:
75          contains:
76            enum:
77              - mediatek,mt8195-lvts-ap
78              - mediatek,mt8195-lvts-mcu
79    then:
80      properties:
81        nvmem-cells:
82          minItems: 2
83
84        nvmem-cell-names:
85          minItems: 2
86
87required:
88  - compatible
89  - reg
90  - interrupts
91  - clocks
92  - resets
93  - nvmem-cells
94  - nvmem-cell-names
95  - "#thermal-sensor-cells"
96
97additionalProperties: false
98
99examples:
100  - |
101    #include <dt-bindings/interrupt-controller/arm-gic.h>
102    #include <dt-bindings/clock/mt8195-clk.h>
103    #include <dt-bindings/reset/mt8195-resets.h>
104    #include <dt-bindings/thermal/mediatek,lvts-thermal.h>
105
106    soc {
107      #address-cells = <2>;
108      #size-cells = <2>;
109
110      lvts_mcu: thermal-sensor@11278000 {
111        compatible = "mediatek,mt8195-lvts-mcu";
112        reg = <0 0x11278000 0 0x1000>;
113        interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
114        clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
115        resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
116        nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
117        nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
118        #thermal-sensor-cells = <1>;
119      };
120    };
121
122    thermal_zones: thermal-zones {
123      cpu0-thermal {
124        polling-delay = <1000>;
125        polling-delay-passive = <250>;
126        thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
127
128        trips {
129          cpu0_alert: trip-alert {
130            temperature = <85000>;
131            hysteresis = <2000>;
132            type = "passive";
133          };
134
135          cpu0_crit: trip-crit {
136            temperature = <100000>;
137            hysteresis = <2000>;
138            type = "critical";
139          };
140        };
141      };
142    };
143