xref: /linux/Documentation/devicetree/bindings/spi/spi-pl022.yaml (revision a460513ed4b6994bfeb7bd86f72853140bc1ac12) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ARM PL022 SPI controller
8
9maintainers:
10  - Linus Walleij <linus.walleij@linaro.org>
11
12allOf:
13  - $ref: "spi-controller.yaml#"
14
15# We need a select here so we don't match all nodes with 'arm,primecell'
16select:
17  properties:
18    compatible:
19      contains:
20        const: arm,pl022
21  required:
22    - compatible
23
24properties:
25  compatible:
26    items:
27      - const: arm,pl022
28      - const: arm,primecell
29
30  reg:
31    maxItems: 1
32
33  interrupts:
34    maxItems: 1
35
36  clocks:
37    maxItems: 2
38
39  clock-names:
40    items:
41      - enum:
42          - SSPCLK
43          - sspclk
44      - const: apb_pclk
45
46  pl022,autosuspend-delay:
47    description: delay in ms following transfer completion before the
48      runtime power management system suspends the device. A setting of 0
49      indicates no delay and the device will be suspended immediately.
50    $ref: "/schemas/types.yaml#/definitions/uint32"
51
52  pl022,rt:
53    description: indicates the controller should run the message pump with realtime
54      priority to minimise the transfer latency on the bus (boolean)
55    type: boolean
56
57  dmas:
58    description:
59      Two or more DMA channel specifiers following the convention outlined
60      in bindings/dma/dma.txt
61    minItems: 2
62    maxItems: 32
63
64  dma-names:
65    description:
66      There must be at least one channel named "tx" for transmit and named "rx"
67      for receive.
68    minItems: 2
69    maxItems: 32
70    additionalItems: true
71    items:
72      - const: rx
73      - const: tx
74
75patternProperties:
76  "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
77    type: object
78    # SPI slave nodes must be children of the SPI master node and can
79    # contain the following properties.
80    properties:
81      pl022,interface:
82        description: SPI interface type
83        $ref: "/schemas/types.yaml#/definitions/uint32"
84        enum:
85          - 0      # SPI
86          - 1      # Texas Instruments Synchronous Serial Frame Format
87          - 2      # Microwire (Half Duplex)
88
89      pl022,com-mode:
90        description: Specifies the transfer mode
91        $ref: "/schemas/types.yaml#/definitions/uint32"
92        enum:
93          - 0      # interrupt mode
94          - 1      # polling mode
95          - 2      # DMA mode
96        default: 1
97
98      pl022,rx-level-trig:
99        description: Rx FIFO watermark level
100        $ref: "/schemas/types.yaml#/definitions/uint32"
101        minimum: 0
102        maximum: 4
103
104      pl022,tx-level-trig:
105        description: Tx FIFO watermark level
106        $ref: "/schemas/types.yaml#/definitions/uint32"
107        minimum: 0
108        maximum: 4
109
110      pl022,ctrl-len:
111        description: Microwire interface - Control length
112        $ref: "/schemas/types.yaml#/definitions/uint32"
113        minimum: 0x03
114        maximum: 0x1f
115
116      pl022,wait-state:
117        description: Microwire interface - Wait state
118        $ref: "/schemas/types.yaml#/definitions/uint32"
119        enum: [0, 1]
120
121      pl022,duplex:
122        description: Microwire interface - Full/Half duplex
123        $ref: "/schemas/types.yaml#/definitions/uint32"
124        enum: [0, 1]
125
126required:
127  - compatible
128  - reg
129  - interrupts
130
131unevaluatedProperties: false
132
133examples:
134  - |
135    spi@e0100000 {
136      compatible = "arm,pl022", "arm,primecell";
137      reg = <0xe0100000 0x1000>;
138      #address-cells = <1>;
139      #size-cells = <0>;
140      interrupts = <0 31 0x4>;
141      dmas = <&dma_controller 23 1>,
142        <&dma_controller 24 0>;
143      dma-names = "rx", "tx";
144
145      m25p80@1 {
146        compatible = "st,m25p80";
147        reg = <1>;
148        spi-max-frequency = <12000000>;
149        spi-cpol;
150        spi-cpha;
151        pl022,interface = <0>;
152        pl022,com-mode = <0x2>;
153        pl022,rx-level-trig = <0>;
154        pl022,tx-level-trig = <0>;
155        pl022,ctrl-len = <0x11>;
156        pl022,wait-state = <0>;
157        pl022,duplex = <0>;
158      };
159    };
160...
161