xref: /linux/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml (revision eeb9f5c2dcec90009d7cf12e780e7f9631993fc5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2022 Unisoc Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Unisoc System Global Register
9
10maintainers:
11  - Orson Zhai <orsonzhai@gmail.com>
12  - Baolin Wang <baolin.wang7@gmail.com>
13  - Chunyan Zhang <zhang.lyra@gmail.com>
14
15description:
16  Unisoc system global registers provide register map
17  for clocks and some multimedia modules of the SoC.
18
19properties:
20  compatible:
21    items:
22      - enum:
23          - sprd,ums512-glbregs
24          - sprd,ums9620-glbregs
25      - const: syscon
26      - const: simple-mfd
27
28  "#address-cells":
29    const: 1
30
31  "#size-cells":
32    const: 1
33
34  ranges:
35    maxItems: 1
36
37  reg:
38    maxItems: 1
39
40patternProperties:
41  "^clock-controller@[0-9a-f]+$":
42    type: object
43    $ref: /schemas/clock/sprd,ums512-clk.yaml#
44    description:
45      Clock controller for the SoC clocks.
46
47required:
48  - compatible
49  - reg
50
51additionalProperties: false
52
53examples:
54  - |
55    ap_apb_regs: syscon@71000000 {
56      compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";
57      reg = <0x71000000 0x3000>;
58      #address-cells = <1>;
59      #size-cells = <1>;
60      ranges = <0 0x71000000 0x3000>;
61
62      clock-controller@0 {
63        compatible = "sprd,ums512-apahb-gate";
64        reg = <0x0 0x2000>;
65        #clock-cells = <1>;
66      };
67    };
68
69  - |
70    ap_intc5_regs: syscon@32360000 {
71      compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";
72      reg = <0x32360000 0x1000>;
73    };
74