xref: /linux/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml (revision a460513ed4b6994bfeb7bd86f72853140bc1ac12)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Marvell MMP2 camera host interface bindings
9
10maintainers:
11  - Lubomir Rintel <lkundrak@v3.sk>
12
13properties:
14  $nodename:
15    pattern: '^camera@[a-f0-9]+$'
16
17  compatible:
18    const: marvell,mmp2-ccic
19
20  reg:
21    maxItems: 1
22
23  interrupts:
24    maxItems: 1
25
26  power-domains:
27    maxItems: 1
28
29  port:
30    $ref: /schemas/graph.yaml#/$defs/port-base
31    additionalProperties: false
32
33    properties:
34      endpoint:
35        $ref: video-interfaces.yaml#
36        unevaluatedProperties: false
37
38        properties:
39          hsync-active: true
40          vsync-active: true
41          pclk-sample: true
42          bus-type: true
43
44  clocks:
45    minItems: 1
46    maxItems: 3
47    items:
48      - description: AXI bus interface clock
49      - description: Peripheral clock
50      - description: Parallel video bus interface clock
51
52  clock-names:
53    const: axi
54
55  '#clock-cells':
56    const: 0
57
58  clock-output-names:
59    const: mclk
60
61required:
62  - compatible
63  - reg
64  - interrupts
65  - port
66
67additionalProperties: false
68
69examples:
70  - |
71    #include <dt-bindings/clock/marvell,mmp2.h>
72    #include <dt-bindings/power/marvell,mmp2.h>
73
74    camera@d420a000 {
75      compatible = "marvell,mmp2-ccic";
76      reg = <0xd420a000 0x800>;
77      interrupts = <42>;
78      clocks = <&soc_clocks MMP2_CLK_CCIC0>;
79      clock-names = "axi";
80      #clock-cells = <0>;
81      clock-output-names = "mclk";
82      power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
83
84      port {
85        camera0_0: endpoint {
86          remote-endpoint = <&ov7670_0>;
87          bus-type = <5>;      /* Parallel */
88          hsync-active = <1>;  /* Active high */
89          vsync-active = <1>;  /* Active high */
90          pclk-sample = <0>;   /* Falling */
91        };
92      };
93    };
94
95...
96