xref: /linux/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml (revision cbdb1f163af2bb90d01be1f0263df1d8d5c9d9d3) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: R-Mobile/R-Car/RZ/G interrupt controller
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - renesas,irqc-r8a73a4        # R-Mobile APE6
17          - renesas,irqc-r8a7742        # RZ/G1H
18          - renesas,irqc-r8a7743        # RZ/G1M
19          - renesas,irqc-r8a7744        # RZ/G1N
20          - renesas,irqc-r8a7745        # RZ/G1E
21          - renesas,irqc-r8a77470       # RZ/G1C
22          - renesas,irqc-r8a7790        # R-Car H2
23          - renesas,irqc-r8a7791        # R-Car M2-W
24          - renesas,irqc-r8a7792        # R-Car V2H
25          - renesas,irqc-r8a7793        # R-Car M2-N
26          - renesas,irqc-r8a7794        # R-Car E2
27          - renesas,intc-ex-r8a774a1    # RZ/G2M
28          - renesas,intc-ex-r8a774b1    # RZ/G2N
29          - renesas,intc-ex-r8a774c0    # RZ/G2E
30          - renesas,intc-ex-r8a774e1    # RZ/G2H
31          - renesas,intc-ex-r8a7795     # R-Car H3
32          - renesas,intc-ex-r8a7796     # R-Car M3-W
33          - renesas,intc-ex-r8a77961    # R-Car M3-W+
34          - renesas,intc-ex-r8a77965    # R-Car M3-N
35          - renesas,intc-ex-r8a77970    # R-Car V3M
36          - renesas,intc-ex-r8a77980    # R-Car V3H
37          - renesas,intc-ex-r8a77990    # R-Car E3
38          - renesas,intc-ex-r8a77995    # R-Car D3
39          - renesas,intc-ex-r8a779a0    # R-Car V3U
40          - renesas,intc-ex-r8a779g0    # R-Car V4H
41      - const: renesas,irqc
42
43  '#interrupt-cells':
44    # an interrupt index and flags, as defined in interrupts.txt in
45    # this directory
46    const: 2
47
48  interrupt-controller: true
49
50  reg:
51    maxItems: 1
52
53  interrupts:
54    minItems: 1
55    maxItems: 32
56
57  clocks:
58    maxItems: 1
59
60  power-domains:
61    maxItems: 1
62
63  resets:
64    maxItems: 1
65
66required:
67  - compatible
68  - '#interrupt-cells'
69  - interrupt-controller
70  - reg
71  - interrupts
72  - clocks
73
74additionalProperties: false
75
76examples:
77  - |
78    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
79    #include <dt-bindings/interrupt-controller/arm-gic.h>
80    #include <dt-bindings/interrupt-controller/irq.h>
81
82    irqc0: interrupt-controller@e61c0000 {
83        compatible = "renesas,irqc-r8a7790", "renesas,irqc";
84        #interrupt-cells = <2>;
85        interrupt-controller;
86        reg = <0xe61c0000 0x200>;
87        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
88                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
89                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
90                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
91        clocks = <&cpg CPG_MOD 407>;
92    };
93