xref: /linux/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml (revision 58f6259b7a08f8d47d4629609703d358b042f0fd)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-ecc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Intel Keem Bay OCS ECC
8
9maintainers:
10  - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
11  - Prabhjot Khurana <prabhjot.khurana@intel.com>
12
13description:
14  The Intel Keem Bay Offload and Crypto Subsystem (OCS) Elliptic Curve
15  Cryptography (ECC) device provides hardware acceleration for elliptic curve
16  cryptography using the NIST P-256 and NIST P-384 elliptic curves.
17
18properties:
19  compatible:
20    const: intel,keembay-ocs-ecc
21
22  reg:
23    maxItems: 1
24
25  interrupts:
26    maxItems: 1
27
28  clocks:
29    maxItems: 1
30
31required:
32  - compatible
33  - reg
34  - interrupts
35  - clocks
36
37additionalProperties: false
38
39examples:
40  - |
41    #include <dt-bindings/interrupt-controller/arm-gic.h>
42    crypto@30001000 {
43      compatible = "intel,keembay-ocs-ecc";
44      reg = <0x30001000 0x1000>;
45      interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
46      clocks = <&scmi_clk 95>;
47    };
48